git.sur5r.net Git - u-boot/blob - arch/arm/dts/fsl-ls1043a-rdb.dts

   1 /*
   2  * Device Tree Include file for Freescale Layerscape-1043A family SoC.
   3  *
   4  * Copyright (C) 2015, Freescale Semiconductor
   5  *
   6  * Mingkai Hu <Mingkai.hu@freescale.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 /dts-v1/;
  14 /include/ "fsl-ls1043a.dtsi"
  15
  16 / {
  17         model = "LS1043A RDB Board";
  18
  19         aliases {
  20                 spi1 = &dspi0;
  21         };
  22
  23 };
  24
  25 &dspi0 {
  26         bus-num = <0>;
  27         status = "okay";
  28
  29         dspiflash: n25q12a {
  30                 #address-cells = <1>;
  31                 #size-cells = <1>;
  32                 compatible = "spi-flash";
  33                 reg = <0>;
  34                 spi-max-frequency = <1000000>; /* input clock */
  35         };
  36
  37 };
  38
  39 &i2c0 {
  40         status = "okay";
  41         ina220@40 {
  42                 compatible = "ti,ina220";
  43                 reg = <0x40>;
  44                 shunt-resistor = <1000>;
  45         };
  46         adt7461a@4c {
  47                 compatible = "adi,adt7461a";
  48                 reg = <0x4c>;
  49         };
  50         eeprom@52 {
  51                 compatible = "at24,24c512";
  52                 reg = <0x52>;
  53         };
  54
  55         eeprom@53 {
  56                 compatible = "at24,24c512";
  57                 reg = <0x53>;
  58         };
  59
  60         rtc@68 {
  61                 compatible = "pericom,pt7c4338";
  62                 reg = <0x68>;
  63         };
  64 };
  65
  66 &ifc {
  67         status = "okay";
  68         #address-cells = <2>;
  69         #size-cells = <1>;
  70         /* NOR, NAND Flashes and FPGA on board */
  71         ranges = <0x0 0x0 0x0 0x60000000 0x08000000
  72                   0x1 0x0 0x0 0x7e800000 0x00010000
  73                   0x2 0x0 0x0 0x7fb00000 0x00000100>;
  74
  75                 nor@0,0 {
  76                         compatible = "cfi-flash";
  77                         #address-cells = <1>;
  78                         #size-cells = <1>;
  79                         reg = <0x0 0x0 0x8000000>;
  80                         bank-width = <2>;
  81                         device-width = <1>;
  82                 };
  83
  84                 nand@1,0 {
  85                         compatible = "fsl,ifc-nand";
  86                         #address-cells = <1>;
  87                         #size-cells = <1>;
  88                         reg = <0x1 0x0 0x10000>;
  89                 };
  90
  91                 cpld: board-control@2,0 {
  92                         compatible = "fsl,ls1043ardb-cpld";
  93                         reg = <0x2 0x0 0x0000100>;
  94                 };
  95 };
  96
  97 &duart0 {
  98         status = "okay";
  99 };
 100
 101 &duart1 {
 102         status = "okay";
 103 };