]> git.sur5r.net Git - u-boot/blob - arch/arm/dts/k2g.dtsi
ARM64: zynqmp: Sync GEM nodes with Linux
[u-boot] / arch / arm / dts / k2g.dtsi
1 /*
2  * Copyright 2014 Texas Instruments, Inc.
3  *
4  * Keystone 2 Galileo soc device tree
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "skeleton.dtsi"
13
14 / {
15         model = "Texas Instruments Keystone 2 SoC";
16         #address-cells = <1>;
17         #size-cells = <1>;
18         interrupt-parent = <&gic>;
19
20         aliases {
21                 serial0 = &uart0;
22         };
23
24         memory {
25                 device_type = "memory";
26                 reg = <0x80000000 0x80000000>;
27         };
28
29         cpus {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32
33                 interrupt-parent = <&gic>;
34
35                 cpu@0 {
36                         compatible = "arm,cortex-a15";
37                         device_type = "cpu";
38                         reg = <0>;
39                 };
40         };
41
42         gic: interrupt-controller {
43                 compatible = "arm,cortex-a15-gic";
44                 #interrupt-cells = <3>;
45                 interrupt-controller;
46                 reg = <0x0 0x02561000 0x0 0x1000>,
47                       <0x0 0x02562000 0x0 0x2000>,
48                       <0x0 0x02564000 0x0 0x1000>,
49                       <0x0 0x02566000 0x0 0x2000>;
50                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
51                                 IRQ_TYPE_LEVEL_HIGH)>;
52         };
53
54         soc {
55                 #address-cells = <1>;
56                 #size-cells = <1>;
57                 compatible = "ti,keystone","simple-bus";
58                 interrupt-parent = <&gic>;
59                 ranges;
60
61                 uart0: serial@02530c00 {
62                         compatible = "ns16550a";
63                         current-speed = <115200>;
64                         reg-shift = <2>;
65                         reg-io-width = <4>;
66                         reg = <0x02530c00 0x100>;
67                         clock-names = "uart";
68                         interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
69                 };
70
71                 mdio: mdio@4200f00 {
72                         compatible      = "ti,keystone_mdio", "ti,davinci_mdio";
73                         #address-cells = <1>;
74                         #size-cells = <0>;
75                         /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
76                         /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
77                         clock-names = "fck";
78                         reg = <0x04200f00 0x100>;
79                         status = "disabled";
80                         bus_freq = <2500000>;
81                 };
82
83                 #include "k2g-netcp.dtsi"
84
85                 pmmc: pmmc@2900000 {
86                         compatible = "ti,power-processor";
87                         reg = <0x02900000 0x40000>;
88                         ti,lpsc_module = <1>;
89                 };
90
91         };
92 };