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ARM64: zynqmp: Extend pcie node to support legacy interrupts
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1 /*
2  * Copyright 2014 Texas Instruments, Inc.
3  *
4  * Keystone 2 Lamarr SoC specific device tree
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 / {
12         cpus {
13                 #address-cells = <1>;
14                 #size-cells = <0>;
15
16                 interrupt-parent = <&gic>;
17
18                 cpu@0 {
19                         compatible = "arm,cortex-a15";
20                         device_type = "cpu";
21                         reg = <0>;
22                 };
23
24                 cpu@1 {
25                         compatible = "arm,cortex-a15";
26                         device_type = "cpu";
27                         reg = <1>;
28                 };
29         };
30
31         soc {
32                 /include/ "k2l-clocks.dtsi"
33
34                 uart2: serial@02348400 {
35                         compatible = "ns16550a";
36                         current-speed = <115200>;
37                         reg-shift = <2>;
38                         reg-io-width = <4>;
39                         reg = <0x02348400 0x100>;
40                         clocks  = <&clkuart2>;
41                         interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
42                 };
43
44                 uart3:  serial@02348800 {
45                         compatible = "ns16550a";
46                         current-speed = <115200>;
47                         reg-shift = <2>;
48                         reg-io-width = <4>;
49                         reg = <0x02348800 0x100>;
50                         clocks  = <&clkuart3>;
51                         interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
52                 };
53
54                 dspgpio0: keystone_dsp_gpio@02620240 {
55                         compatible = "ti,keystone-dsp-gpio";
56                         gpio-controller;
57                         #gpio-cells = <2>;
58                         gpio,syscon-dev = <&devctrl 0x240>;
59                 };
60
61                 dspgpio1: keystone_dsp_gpio@2620244 {
62                         compatible = "ti,keystone-dsp-gpio";
63                         gpio-controller;
64                         #gpio-cells = <2>;
65                         gpio,syscon-dev = <&devctrl 0x244>;
66                 };
67
68                 dspgpio2: keystone_dsp_gpio@2620248 {
69                         compatible = "ti,keystone-dsp-gpio";
70                         gpio-controller;
71                         #gpio-cells = <2>;
72                         gpio,syscon-dev = <&devctrl 0x248>;
73                 };
74
75                 dspgpio3: keystone_dsp_gpio@262024c {
76                         compatible = "ti,keystone-dsp-gpio";
77                         gpio-controller;
78                         #gpio-cells = <2>;
79                         gpio,syscon-dev = <&devctrl 0x24c>;
80                 };
81
82                 mdio: mdio@26200f00 {
83                         compatible      = "ti,keystone_mdio", "ti,davinci_mdio";
84                         #address-cells = <1>;
85                         #size-cells = <0>;
86                         reg = <0x26200f00 0x100>;
87                         status = "disabled";
88                         clocks = <&clkcpgmac>;
89                         clock-names = "fck";
90                         bus_freq        = <2500000>;
91                 };
92                 /include/ "k2l-netcp.dtsi"
93         };
94 };
95
96 &spi0 {
97        ti,davinci-spi-num-cs = <5>;
98 };
99
100 &spi1 {
101        ti,davinci-spi-num-cs = <3>;
102 };
103
104 &spi2 {
105        ti,davinci-spi-num-cs = <5>;
106        /* Pin muxed. Enabled and configured by Bootloader */
107        status = "disabled";
108 };