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1 /*
2  * Device Tree Source for Keystone 2 clock tree
3  *
4  * Copyright (C) 2013 Texas Instruments, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 clocks {
12         #address-cells = <1>;
13         #size-cells = <1>;
14         ranges;
15
16         mainmuxclk: mainmuxclk@2310108 {
17                 #clock-cells = <0>;
18                 compatible = "ti,keystone,pll-mux-clock";
19                 clocks = <&mainpllclk>, <&refclksys>;
20                 reg = <0x02310108 4>;
21                 bit-shift = <23>;
22                 bit-mask = <1>;
23                 clock-output-names = "mainmuxclk";
24         };
25
26         chipclk1: chipclk1 {
27                 #clock-cells = <0>;
28                 compatible = "fixed-factor-clock";
29                 clocks = <&mainmuxclk>;
30                 clock-div = <1>;
31                 clock-mult = <1>;
32                 clock-output-names = "chipclk1";
33         };
34
35         chipclk1rstiso: chipclk1rstiso {
36                 #clock-cells = <0>;
37                 compatible = "fixed-factor-clock";
38                 clocks = <&mainmuxclk>;
39                 clock-div = <1>;
40                 clock-mult = <1>;
41                 clock-output-names = "chipclk1rstiso";
42         };
43
44         gemtraceclk: gemtraceclk@2310120 {
45                 #clock-cells = <0>;
46                 compatible = "ti,keystone,pll-divider-clock";
47                 clocks = <&mainmuxclk>;
48                 reg = <0x02310120 4>;
49                 bit-shift = <0>;
50                 bit-mask = <8>;
51                 clock-output-names = "gemtraceclk";
52         };
53
54         chipstmxptclk: chipstmxptclk {
55                 #clock-cells = <0>;
56                 compatible = "ti,keystone,pll-divider-clock";
57                 clocks = <&mainmuxclk>;
58                 reg = <0x02310164 4>;
59                 bit-shift = <0>;
60                 bit-mask = <8>;
61                 clock-output-names = "chipstmxptclk";
62         };
63
64         chipclk12: chipclk12 {
65                 #clock-cells = <0>;
66                 compatible = "fixed-factor-clock";
67                 clocks = <&chipclk1>;
68                 clock-div = <2>;
69                 clock-mult = <1>;
70                 clock-output-names = "chipclk12";
71         };
72
73         chipclk13: chipclk13 {
74                 #clock-cells = <0>;
75                 compatible = "fixed-factor-clock";
76                 clocks = <&chipclk1>;
77                 clock-div = <3>;
78                 clock-mult = <1>;
79                 clock-output-names = "chipclk13";
80         };
81
82         paclk13: paclk13 {
83                 #clock-cells = <0>;
84                 compatible = "fixed-factor-clock";
85                 clocks = <&papllclk>;
86                 clock-div = <3>;
87                 clock-mult = <1>;
88                 clock-output-names = "paclk13";
89         };
90
91         chipclk14: chipclk14 {
92                 #clock-cells = <0>;
93                 compatible = "fixed-factor-clock";
94                 clocks = <&chipclk1>;
95                 clock-div = <4>;
96                 clock-mult = <1>;
97                 clock-output-names = "chipclk14";
98         };
99
100         chipclk16: chipclk16 {
101                 #clock-cells = <0>;
102                 compatible = "fixed-factor-clock";
103                 clocks = <&chipclk1>;
104                 clock-div = <6>;
105                 clock-mult = <1>;
106                 clock-output-names = "chipclk16";
107         };
108
109         chipclk112: chipclk112 {
110                 #clock-cells = <0>;
111                 compatible = "fixed-factor-clock";
112                 clocks = <&chipclk1>;
113                 clock-div = <12>;
114                 clock-mult = <1>;
115                 clock-output-names = "chipclk112";
116         };
117
118         chipclk124: chipclk124 {
119                 #clock-cells = <0>;
120                 compatible = "fixed-factor-clock";
121                 clocks = <&chipclk1>;
122                 clock-div = <24>;
123                 clock-mult = <1>;
124                 clock-output-names = "chipclk114";
125         };
126
127         chipclk1rstiso13: chipclk1rstiso13 {
128                 #clock-cells = <0>;
129                 compatible = "fixed-factor-clock";
130                 clocks = <&chipclk1rstiso>;
131                 clock-div = <3>;
132                 clock-mult = <1>;
133                 clock-output-names = "chipclk1rstiso13";
134         };
135
136         chipclk1rstiso14: chipclk1rstiso14 {
137                 #clock-cells = <0>;
138                 compatible = "fixed-factor-clock";
139                 clocks = <&chipclk1rstiso>;
140                 clock-div = <4>;
141                 clock-mult = <1>;
142                 clock-output-names = "chipclk1rstiso14";
143         };
144
145         chipclk1rstiso16: chipclk1rstiso16 {
146                 #clock-cells = <0>;
147                 compatible = "fixed-factor-clock";
148                 clocks = <&chipclk1rstiso>;
149                 clock-div = <6>;
150                 clock-mult = <1>;
151                 clock-output-names = "chipclk1rstiso16";
152         };
153
154         chipclk1rstiso112: chipclk1rstiso112 {
155                 #clock-cells = <0>;
156                 compatible = "fixed-factor-clock";
157                 clocks = <&chipclk1rstiso>;
158                 clock-div = <12>;
159                 clock-mult = <1>;
160                 clock-output-names = "chipclk1rstiso112";
161         };
162
163         clkmodrst0: clkmodrst0 {
164                 #clock-cells = <0>;
165                 compatible = "ti,keystone,psc-clock";
166                 clocks = <&chipclk16>;
167                 clock-output-names = "modrst0";
168                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
169                 reg-names = "control", "domain";
170                 domain-id = <0>;
171         };
172
173
174         clkusb: clkusb {
175                 #clock-cells = <0>;
176                 compatible = "ti,keystone,psc-clock";
177                 clocks = <&chipclk16>;
178                 clock-output-names = "usb";
179                 reg = <0x02350008 0xb00>, <0x02350000 0x400>;
180                 reg-names = "control", "domain";
181                 domain-id = <0>;
182         };
183
184         clkaemifspi: clkaemifspi {
185                 #clock-cells = <0>;
186                 compatible = "ti,keystone,psc-clock";
187                 clocks = <&chipclk16>;
188                 clock-output-names = "aemif-spi";
189                 reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
190                 reg-names = "control", "domain";
191                 domain-id = <0>;
192         };
193
194
195         clkdebugsstrc: clkdebugsstrc {
196                 #clock-cells = <0>;
197                 compatible = "ti,keystone,psc-clock";
198                 clocks = <&chipclk13>;
199                 clock-output-names = "debugss-trc";
200                 reg = <0x02350014 0xb00>, <0x02350000 0x400>;
201                 reg-names = "control", "domain";
202                 domain-id = <1>;
203         };
204
205         clktetbtrc: clktetbtrc {
206                 #clock-cells = <0>;
207                 compatible = "ti,keystone,psc-clock";
208                 clocks = <&chipclk13>;
209                 clock-output-names = "tetb-trc";
210                 reg = <0x02350018 0xb00>, <0x02350004 0x400>;
211                 reg-names = "control", "domain";
212                 domain-id = <1>;
213         };
214
215         clkpa: clkpa {
216                 #clock-cells = <0>;
217                 compatible = "ti,keystone,psc-clock";
218                 clocks = <&paclk13>;
219                 clock-output-names = "pa";
220                 reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
221                 reg-names = "control", "domain";
222                 domain-id = <2>;
223         };
224
225         clkcpgmac: clkcpgmac {
226                 #clock-cells = <0>;
227                 compatible = "ti,keystone,psc-clock";
228                 clocks = <&clkpa>;
229                 clock-output-names = "cpgmac";
230                 reg = <0x02350020 0xb00>, <0x02350008 0x400>;
231                 reg-names = "control", "domain";
232                 domain-id = <2>;
233         };
234
235         clksa: clksa {
236                 #clock-cells = <0>;
237                 compatible = "ti,keystone,psc-clock";
238                 clocks = <&clkpa>;
239                 clock-output-names = "sa";
240                 reg = <0x02350024 0xb00>, <0x02350008 0x400>;
241                 reg-names = "control", "domain";
242                 domain-id = <2>;
243         };
244
245         clkpcie: clkpcie {
246                 #clock-cells = <0>;
247                 compatible = "ti,keystone,psc-clock";
248                 clocks = <&chipclk12>;
249                 clock-output-names = "pcie";
250                 reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
251                 reg-names = "control", "domain";
252                 domain-id = <3>;
253         };
254
255         clksr: clksr {
256                 #clock-cells = <0>;
257                 compatible = "ti,keystone,psc-clock";
258                 clocks = <&chipclk1rstiso112>;
259                 clock-output-names = "sr";
260                 reg = <0x02350034 0xb00>, <0x02350018 0x400>;
261                 reg-names = "control", "domain";
262                 domain-id = <6>;
263         };
264
265         clkgem0: clkgem0 {
266                 #clock-cells = <0>;
267                 compatible = "ti,keystone,psc-clock";
268                 clocks = <&chipclk1>;
269                 clock-output-names = "gem0";
270                 reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
271                 reg-names = "control", "domain";
272                 domain-id = <8>;
273         };
274
275         clkddr30: clkddr30 {
276                 #clock-cells = <0>;
277                 compatible = "ti,keystone,psc-clock";
278                 clocks = <&chipclk12>;
279                 clock-output-names = "ddr3-0";
280                 reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
281                 reg-names = "control", "domain";
282                 domain-id = <16>;
283         };
284
285         clkwdtimer0: clkwdtimer0 {
286                 #clock-cells = <0>;
287                 compatible = "ti,keystone,psc-clock";
288                 clocks = <&clkmodrst0>;
289                 clock-output-names = "timer0";
290                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
291                 reg-names = "control", "domain";
292                 domain-id = <0>;
293         };
294
295         clkwdtimer1: clkwdtimer1 {
296                 #clock-cells = <0>;
297                 compatible = "ti,keystone,psc-clock";
298                 clocks = <&clkmodrst0>;
299                 clock-output-names = "timer1";
300                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
301                 reg-names = "control", "domain";
302                 domain-id = <0>;
303         };
304
305         clkwdtimer2: clkwdtimer2 {
306                 #clock-cells = <0>;
307                 compatible = "ti,keystone,psc-clock";
308                 clocks = <&clkmodrst0>;
309                 clock-output-names = "timer2";
310                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
311                 reg-names = "control", "domain";
312                 domain-id = <0>;
313         };
314
315         clkwdtimer3: clkwdtimer3 {
316                 #clock-cells = <0>;
317                 compatible = "ti,keystone,psc-clock";
318                 clocks = <&clkmodrst0>;
319                 clock-output-names = "timer3";
320                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
321                 reg-names = "control", "domain";
322                 domain-id = <0>;
323         };
324
325         clktimer15: clktimer15 {
326                 #clock-cells = <0>;
327                 compatible = "ti,keystone,psc-clock";
328                 clocks = <&clkmodrst0>;
329                 clock-output-names = "timer15";
330                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
331                 reg-names = "control", "domain";
332                 domain-id = <0>;
333         };
334
335         clkuart0: clkuart0 {
336                 #clock-cells = <0>;
337                 compatible = "ti,keystone,psc-clock";
338                 clocks = <&clkmodrst0>;
339                 clock-output-names = "uart0";
340                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
341                 reg-names = "control", "domain";
342                 domain-id = <0>;
343         };
344
345         clkuart1: clkuart1 {
346                 #clock-cells = <0>;
347                 compatible = "ti,keystone,psc-clock";
348                 clocks = <&clkmodrst0>;
349                 clock-output-names = "uart1";
350                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
351                 reg-names = "control", "domain";
352                 domain-id = <0>;
353         };
354
355         clkaemif: clkaemif {
356                 #clock-cells = <0>;
357                 compatible = "ti,keystone,psc-clock";
358                 clocks = <&clkaemifspi>;
359                 clock-output-names = "aemif";
360                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
361                 reg-names = "control", "domain";
362                 domain-id = <0>;
363         };
364
365         clkusim: clkusim {
366                 #clock-cells = <0>;
367                 compatible = "ti,keystone,psc-clock";
368                 clocks = <&clkmodrst0>;
369                 clock-output-names = "usim";
370                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
371                 reg-names = "control", "domain";
372                 domain-id = <0>;
373         };
374
375         clki2c: clki2c {
376                 #clock-cells = <0>;
377                 compatible = "ti,keystone,psc-clock";
378                 clocks = <&clkmodrst0>;
379                 clock-output-names = "i2c";
380                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
381                 reg-names = "control", "domain";
382                 domain-id = <0>;
383         };
384
385         clkspi: clkspi {
386                 #clock-cells = <0>;
387                 compatible = "ti,keystone,psc-clock";
388                 clocks = <&clkaemifspi>;
389                 clock-output-names = "spi";
390                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
391                 reg-names = "control", "domain";
392                 domain-id = <0>;
393         };
394
395         clkgpio: clkgpio {
396                 #clock-cells = <0>;
397                 compatible = "ti,keystone,psc-clock";
398                 clocks = <&clkmodrst0>;
399                 clock-output-names = "gpio";
400                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
401                 reg-names = "control", "domain";
402                 domain-id = <0>;
403         };
404
405         clkkeymgr: clkkeymgr {
406                 #clock-cells = <0>;
407                 compatible = "ti,keystone,psc-clock";
408                 clocks = <&clkmodrst0>;
409                 clock-output-names = "keymgr";
410                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
411                 reg-names = "control", "domain";
412                 domain-id = <0>;
413         };
414 };