2 * Copyright 2014 Texas Instruments, Inc.
4 * Device Tree Source for K2G SOC
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "skeleton.dtsi"
15 model = "Texas Instruments K2G SoC";
18 interrupt-parent = <&gic>;
30 device_type = "memory";
31 reg = <0x80000000 0x80000000>;
38 interrupt-parent = <&gic>;
41 compatible = "arm,cortex-a15";
47 gic: interrupt-controller {
48 compatible = "arm,cortex-a15-gic";
49 #interrupt-cells = <3>;
51 reg = <0x0 0x02561000 0x0 0x1000>,
52 <0x0 0x02562000 0x0 0x2000>,
53 <0x0 0x02564000 0x0 0x1000>,
54 <0x0 0x02566000 0x0 0x2000>;
55 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
56 IRQ_TYPE_LEVEL_HIGH)>;
62 compatible = "ti,keystone","simple-bus";
63 interrupt-parent = <&gic>;
66 uart0: serial@02530c00 {
67 compatible = "ns16550a";
68 current-speed = <115200>;
71 reg = <0x02530c00 0x100>;
73 interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
77 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
80 /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
81 /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
83 reg = <0x04200f00 0x100>;
89 compatible = "cadence,qspi";
92 reg = <0x02940000 0x1000>,
93 <0x24000000 0x4000000>;
94 interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
101 #include "keystone-k2g-netcp.dtsi"
104 compatible = "ti,power-processor";
105 reg = <0x02900000 0x40000>;
106 ti,lpsc_module = <1>;
110 compatible = "ti,keystone-spi", "ti,dm6441-spi";
111 reg = <0x21805400 0x200>;
113 ti,davinci-spi-intr-line = <0>;
114 interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
115 #address-cells = <1>;
121 compatible = "ti,keystone-spi", "ti,dm6441-spi";
122 reg = <0x21805800 0x200>;
124 ti,davinci-spi-intr-line = <0>;
125 interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
126 #address-cells = <1>;
132 compatible = "ti,keystone-spi", "ti,dm6441-spi";
133 reg = <0x21805C00 0x200>;
135 ti,davinci-spi-intr-line = <0>;
136 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
137 #address-cells = <1>;
143 compatible = "ti,keystone-spi", "ti,dm6441-spi";
144 reg = <0x21806000 0x200>;
146 ti,davinci-spi-intr-line = <0>;
147 interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
148 #address-cells = <1>;
154 compatible = "ti,omap4-hsmmc";
155 reg = <0x23000000 0x400>;
156 interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
158 ti,needs-special-reset;
160 max-frequency = <96000000>;
165 compatible = "ti,omap4-hsmmc";
166 reg = <0x23100000 0x400>;
167 interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
169 ti,needs-special-reset;
171 max-frequency = <96000000>;