2 * Copyright 2014 Texas Instruments, Inc.
4 * Device Tree Source for K2G SOC
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "skeleton.dtsi"
15 model = "Texas Instruments K2G SoC";
18 interrupt-parent = <&gic>;
33 device_type = "memory";
34 reg = <0x80000000 0x80000000>;
41 interrupt-parent = <&gic>;
44 compatible = "arm,cortex-a15";
50 gic: interrupt-controller {
51 compatible = "arm,cortex-a15-gic";
52 #interrupt-cells = <3>;
54 reg = <0x0 0x02561000 0x0 0x1000>,
55 <0x0 0x02562000 0x0 0x2000>,
56 <0x0 0x02564000 0x0 0x1000>,
57 <0x0 0x02566000 0x0 0x2000>;
58 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
59 IRQ_TYPE_LEVEL_HIGH)>;
65 compatible = "ti,keystone","simple-bus";
66 interrupt-parent = <&gic>;
69 uart0: serial@02530c00 {
70 compatible = "ns16550a";
71 current-speed = <115200>;
74 reg = <0x02530c00 0x100>;
76 interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
80 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
83 /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
84 /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
86 reg = <0x04200f00 0x100>;
92 compatible = "cadence,qspi";
95 reg = <0x02940000 0x1000>,
96 <0x24000000 0x4000000>;
97 interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
104 #include "keystone-k2g-netcp.dtsi"
107 compatible = "ti,power-processor";
108 reg = <0x02900000 0x40000>;
109 ti,lpsc_module = <1>;
113 compatible = "ti,keystone-spi", "ti,dm6441-spi";
114 reg = <0x21805400 0x200>;
116 ti,davinci-spi-intr-line = <0>;
117 interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
118 #address-cells = <1>;
124 compatible = "ti,keystone-spi", "ti,dm6441-spi";
125 reg = <0x21805800 0x200>;
127 ti,davinci-spi-intr-line = <0>;
128 interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
129 #address-cells = <1>;
135 compatible = "ti,keystone-spi", "ti,dm6441-spi";
136 reg = <0x21805C00 0x200>;
138 ti,davinci-spi-intr-line = <0>;
139 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
140 #address-cells = <1>;
146 compatible = "ti,keystone-spi", "ti,dm6441-spi";
147 reg = <0x21806000 0x200>;
149 ti,davinci-spi-intr-line = <0>;
150 interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
151 #address-cells = <1>;
156 compatible = "ti,keystone-i2c";
157 reg = <0x02530000 0x400>;
158 clock-frequency = <100000>;
159 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
160 #address-cells = <1>;
166 compatible = "ti,keystone-i2c";
167 reg = <0x02530400 0x400>;
168 clock-frequency = <100000>;
169 interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
170 #address-cells = <1>;
176 compatible = "ti,keystone-i2c";
177 reg = <0x02530800 0x400>;
178 clock-frequency = <100000>;
179 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
180 #address-cells = <1>;
186 compatible = "ti,omap4-hsmmc";
187 reg = <0x23000000 0x400>;
188 interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
190 ti,needs-special-reset;
192 max-frequency = <96000000>;
197 compatible = "ti,omap4-hsmmc";
198 reg = <0x23100000 0x400>;
199 interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
201 ti,needs-special-reset;
203 max-frequency = <96000000>;