2 * Copyright 2014 Texas Instruments, Inc.
4 * Device Tree Source for K2G SOC
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 model = "Texas Instruments K2G SoC";
17 interrupt-parent = <&gic>;
34 device_type = "memory";
35 reg = <0x80000000 0x80000000>;
42 interrupt-parent = <&gic>;
45 compatible = "arm,cortex-a15";
51 gic: interrupt-controller {
52 compatible = "arm,cortex-a15-gic";
53 #interrupt-cells = <3>;
55 reg = <0x0 0x02561000 0x0 0x1000>,
56 <0x0 0x02562000 0x0 0x2000>,
57 <0x0 0x02564000 0x0 0x1000>,
58 <0x0 0x02566000 0x0 0x2000>;
59 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
60 IRQ_TYPE_LEVEL_HIGH)>;
66 compatible = "ti,keystone","simple-bus";
67 interrupt-parent = <&gic>;
70 uart0: serial@02530c00 {
71 compatible = "ns16550a";
72 current-speed = <115200>;
75 reg = <0x02530c00 0x100>;
77 interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
81 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
84 /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
85 /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
87 reg = <0x04200f00 0x100>;
93 compatible = "cadence,qspi";
96 reg = <0x02940000 0x1000>,
97 <0x24000000 0x4000000>;
98 interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
105 #include "keystone-k2g-netcp.dtsi"
108 compatible = "ti,power-processor";
109 reg = <0x02900000 0x40000>;
110 ti,lpsc_module = <1>;
114 compatible = "ti,keystone-spi", "ti,dm6441-spi";
115 reg = <0x21805400 0x200>;
117 ti,davinci-spi-intr-line = <0>;
118 interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
119 #address-cells = <1>;
125 compatible = "ti,keystone-spi", "ti,dm6441-spi";
126 reg = <0x21805800 0x200>;
128 ti,davinci-spi-intr-line = <0>;
129 interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
130 #address-cells = <1>;
136 compatible = "ti,keystone-spi", "ti,dm6441-spi";
137 reg = <0x21805C00 0x200>;
139 ti,davinci-spi-intr-line = <0>;
140 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
141 #address-cells = <1>;
147 compatible = "ti,keystone-spi", "ti,dm6441-spi";
148 reg = <0x21806000 0x200>;
150 ti,davinci-spi-intr-line = <0>;
151 interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
152 #address-cells = <1>;
157 compatible = "ti,keystone-i2c";
158 reg = <0x02530000 0x400>;
159 clock-frequency = <100000>;
160 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
161 #address-cells = <1>;
167 compatible = "ti,keystone-i2c";
168 reg = <0x02530400 0x400>;
169 clock-frequency = <100000>;
170 interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
171 #address-cells = <1>;
177 compatible = "ti,keystone-i2c";
178 reg = <0x02530800 0x400>;
179 clock-frequency = <100000>;
180 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
181 #address-cells = <1>;
187 compatible = "ti,omap4-hsmmc";
188 reg = <0x23000000 0x400>;
189 interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
191 ti,needs-special-reset;
193 max-frequency = <96000000>;
198 compatible = "ti,omap4-hsmmc";
199 reg = <0x23100000 0x400>;
200 interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
202 ti,needs-special-reset;
204 max-frequency = <96000000>;