git.sur5r.net Git - u-boot/blob - arch/arm/dts/ls1021a-iot.dtsi

   1 /*
   2  * Freescale ls1021a IOT board device tree source
   3  *
   4  * Copyright 2016 Freescale Semiconductor, Inc.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9
  10 #include "ls1021a.dtsi"
  11
  12 / {
  13         model = "LS1021A IOT Board";
  14
  15         aliases {
  16                 enet2_rgmii_phy = &rgmii_phy1;
  17                 enet0_sgmii_phy = &sgmii_phy2;
  18                 enet1_sgmii_phy = &sgmii_phy0;
  19                 spi0 = &qspi;
  20                 spi1 = &dspi1;
  21         };
  22 };
  23
  24 &qspi {
  25         bus-num = <0>;
  26         status = "okay";
  27
  28         qflash0: n25q128a13@0 {
  29                 #address-cells = <1>;
  30                 #size-cells = <1>;
  31                 compatible = "spi-flash";
  32                 spi-max-frequency = <20000000>;
  33                 reg = <0>;
  34         };
  35 };
  36
  37 &dspi1 {
  38         bus-num = <0>;
  39         status = "okay";
  40
  41         dspiflash: at26df081a@0 {
  42                 #address-cells = <1>;
  43                 #size-cells = <1>;
  44                 compatible = "spi-flash";
  45                 spi-max-frequency = <16000000>;
  46                 spi-cpol;
  47                 spi-cpha;
  48                 reg = <0>;
  49         };
  50 };
  51
  52 &i2c0 {
  53         status = "okay";
  54 };
  55
  56 &i2c1 {
  57         status = "okay";
  58 };
  59
  60 &ifc {
  61         #address-cells = <2>;
  62         #size-cells = <1>;
  63         /* NOR Flash on board */
  64         ranges = <0x0 0x0 0x60000000 0x08000000>;
  65         status = "okay";
  66
  67         nor@0,0 {
  68                 #address-cells = <1>;
  69                 #size-cells = <1>;
  70                 compatible = "cfi-flash";
  71                 reg = <0x0 0x0 0x8000000>;
  72                 bank-width = <2>;
  73                 device-width = <1>;
  74         };
  75 };
  76
  77 &lpuart0 {
  78         status = "okay";
  79 };
  80
  81 &mdio0 {
  82         sgmii_phy0: ethernet-phy@0 {
  83                 reg = <0x0>;
  84         };
  85         rgmii_phy1: ethernet-phy@1 {
  86                 reg = <0x1>;
  87         };
  88         sgmii_phy2: ethernet-phy@2 {
  89                 reg = <0x2>;
  90         };
  91         tbi1: tbi-phy@1f {
  92                 reg = <0x1f>;
  93                 device_type = "tbi-phy";
  94         };
  95 };
  96
  97 &uart0 {
  98         status = "okay";
  99 };
 100
 101 &uart1 {
 102         status = "okay";
 103 };