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1 /*
2  * Copyright (c) 2016 Andreas Färber
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This library is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This library is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include <dt-bindings/gpio/gpio.h>
44 #include <dt-bindings/interrupt-controller/irq.h>
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
47 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
48
49 / {
50         compatible = "amlogic,meson-gxbb";
51         interrupt-parent = <&gic>;
52         #address-cells = <2>;
53         #size-cells = <2>;
54
55         cpus {
56                 #address-cells = <0x2>;
57                 #size-cells = <0x0>;
58
59                 cpu0: cpu@0 {
60                         device_type = "cpu";
61                         compatible = "arm,cortex-a53", "arm,armv8";
62                         reg = <0x0 0x0>;
63                         enable-method = "psci";
64                 };
65
66                 cpu1: cpu@1 {
67                         device_type = "cpu";
68                         compatible = "arm,cortex-a53", "arm,armv8";
69                         reg = <0x0 0x1>;
70                         enable-method = "psci";
71                 };
72
73                 cpu2: cpu@2 {
74                         device_type = "cpu";
75                         compatible = "arm,cortex-a53", "arm,armv8";
76                         reg = <0x0 0x2>;
77                         enable-method = "psci";
78                 };
79
80                 cpu3: cpu@3 {
81                         device_type = "cpu";
82                         compatible = "arm,cortex-a53", "arm,armv8";
83                         reg = <0x0 0x3>;
84                         enable-method = "psci";
85                 };
86         };
87
88         arm-pmu {
89                 compatible = "arm,cortex-a53-pmu";
90                 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
91                              <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
92                              <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
93                              <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
94                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
95         };
96
97         psci {
98                 compatible = "arm,psci-0.2";
99                 method = "smc";
100         };
101
102         timer {
103                 compatible = "arm,armv8-timer";
104                 interrupts = <GIC_PPI 13
105                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
106                              <GIC_PPI 14
107                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
108                              <GIC_PPI 11
109                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
110                              <GIC_PPI 10
111                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
112         };
113
114         xtal: xtal-clk {
115                 compatible = "fixed-clock";
116                 clock-frequency = <24000000>;
117                 clock-output-names = "xtal";
118                 #clock-cells = <0>;
119         };
120
121         soc {
122                 compatible = "simple-bus";
123                 #address-cells = <2>;
124                 #size-cells = <2>;
125                 ranges;
126
127                 cbus: cbus@c1100000 {
128                         compatible = "simple-bus";
129                         reg = <0x0 0xc1100000 0x0 0x100000>;
130                         #address-cells = <2>;
131                         #size-cells = <2>;
132                         ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
133
134                         reset: reset-controller@4404 {
135                                 compatible = "amlogic,meson-gxbb-reset";
136                                 reg = <0x0 0x04404 0x0 0x20>;
137                                 #reset-cells = <1>;
138                         };
139
140                         uart_A: serial@84c0 {
141                                 compatible = "amlogic,meson-uart";
142                                 reg = <0x0 0x84c0 0x0 0x14>;
143                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
144                                 clocks = <&xtal>;
145                                 status = "disabled";
146                         };
147
148                         uart_B: serial@84dc {
149                                 compatible = "amlogic,meson-uart";
150                                 reg = <0x0 0x84dc 0x0 0x14>;
151                                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
152                                 clocks = <&xtal>;
153                                 status = "disabled";
154                         };
155
156                         uart_C: serial@8700 {
157                                 compatible = "amlogic,meson-uart";
158                                 reg = <0x0 0x8700 0x0 0x14>;
159                                 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
160                                 clocks = <&xtal>;
161                                 status = "disabled";
162                         };
163                 };
164
165                 gic: interrupt-controller@c4301000 {
166                         compatible = "arm,gic-400";
167                         reg = <0x0 0xc4301000 0 0x1000>,
168                               <0x0 0xc4302000 0 0x2000>,
169                               <0x0 0xc4304000 0 0x2000>,
170                               <0x0 0xc4306000 0 0x2000>;
171                         interrupt-controller;
172                         interrupts = <GIC_PPI 9
173                                 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
174                         #interrupt-cells = <3>;
175                         #address-cells = <0>;
176                 };
177
178                 aobus: aobus@c8100000 {
179                         compatible = "simple-bus";
180                         reg = <0x0 0xc8100000 0x0 0x100000>;
181                         #address-cells = <2>;
182                         #size-cells = <2>;
183                         ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
184
185                         pinctrl_aobus: pinctrl@14 {
186                                 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
187                                 #address-cells = <2>;
188                                 #size-cells = <2>;
189                                 ranges;
190
191                                 gpio_ao: bank@14 {
192                                         reg = <0x0 0x00014 0x0 0x8>,
193                                               <0x0 0x0002c 0x0 0x4>,
194                                               <0x0 0x00024 0x0 0x8>;
195                                         reg-names = "mux", "pull", "gpio";
196                                         gpio-controller;
197                                         #gpio-cells = <2>;
198                                 };
199
200                                 uart_ao_a_pins: uart_ao_a {
201                                         mux {
202                                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
203                                                 function = "uart_ao";
204                                         };
205                                 };
206                         };
207
208                         uart_AO: serial@4c0 {
209                                 compatible = "amlogic,meson-uart";
210                                 reg = <0x0 0x004c0 0x0 0x14>;
211                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
212                                 clocks = <&xtal>;
213                                 status = "disabled";
214                         };
215                 };
216
217                 periphs: periphs@c8834000 {
218                         compatible = "simple-bus";
219                         reg = <0x0 0xc8834000 0x0 0x2000>;
220                         #address-cells = <2>;
221                         #size-cells = <2>;
222                         ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
223
224                         rng {
225                                 compatible = "amlogic,meson-rng";
226                                 reg = <0x0 0x0 0x0 0x4>;
227                         };
228
229                         pinctrl_periphs: pinctrl@4b0 {
230                                 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
231                                 #address-cells = <2>;
232                                 #size-cells = <2>;
233                                 ranges;
234
235                                 gpio: bank@4b0 {
236                                         reg = <0x0 0x004b0 0x0 0x28>,
237                                               <0x0 0x004e8 0x0 0x14>,
238                                               <0x0 0x00120 0x0 0x14>,
239                                               <0x0 0x00430 0x0 0x40>;
240                                         reg-names = "mux", "pull", "pull-enable", "gpio";
241                                         gpio-controller;
242                                         #gpio-cells = <2>;
243                                 };
244
245                                 emmc_pins: emmc {
246                                         mux {
247                                                 groups = "emmc_nand_d07",
248                                                        "emmc_cmd",
249                                                        "emmc_clk";
250                                                 function = "emmc";
251                                         };
252                                 };
253
254                                 sdcard_pins: sdcard {
255                                         mux {
256                                                 groups = "sdcard_d0",
257                                                        "sdcard_d1",
258                                                        "sdcard_d2",
259                                                        "sdcard_d3",
260                                                        "sdcard_cmd",
261                                                        "sdcard_clk";
262                                                 function = "sdcard";
263                                         };
264                                 };
265
266                                 uart_a_pins: uart_a {
267                                         mux {
268                                                 groups = "uart_tx_a",
269                                                        "uart_rx_a";
270                                                 function = "uart_a";
271                                         };
272                                 };
273
274                                 uart_b_pins: uart_b {
275                                         mux {
276                                                 groups = "uart_tx_b",
277                                                        "uart_rx_b";
278                                                 function = "uart_b";
279                                         };
280                                 };
281
282                                 uart_c_pins: uart_c {
283                                         mux {
284                                                 groups = "uart_tx_c",
285                                                        "uart_rx_c";
286                                                 function = "uart_c";
287                                         };
288                                 };
289
290                                 eth_pins: eth_c {
291                                         mux {
292                                                 groups = "eth_mdio",
293                                                        "eth_mdc",
294                                                        "eth_clk_rx_clk",
295                                                        "eth_rx_dv",
296                                                        "eth_rxd0",
297                                                        "eth_rxd1",
298                                                        "eth_rxd2",
299                                                        "eth_rxd3",
300                                                        "eth_rgmii_tx_clk",
301                                                        "eth_tx_en",
302                                                        "eth_txd0",
303                                                        "eth_txd1",
304                                                        "eth_txd2",
305                                                        "eth_txd3";
306                                                 function = "eth";
307                                         };
308                                 };
309                         };
310                 };
311
312                 hiubus: hiubus@c883c000 {
313                         compatible = "simple-bus";
314                         reg = <0x0 0xc883c000 0x0 0x2000>;
315                         #address-cells = <2>;
316                         #size-cells = <2>;
317                         ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
318
319                         clkc: clock-controller@0 {
320                                 compatible = "amlogic,gxbb-clkc";
321                                 #clock-cells = <1>;
322                                 reg = <0x0 0x0 0x0 0x3db>;
323                         };
324                 };
325
326                 apb: apb@d0000000 {
327                         compatible = "simple-bus";
328                         reg = <0x0 0xd0000000 0x0 0x200000>;
329                         #address-cells = <2>;
330                         #size-cells = <2>;
331                         ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
332                 };
333
334                 ethmac: ethernet@c9410000 {
335                         compatible = "amlogic,meson6-dwmac", "snps,dwmac";
336                         reg = <0x0 0xc9410000 0x0 0x10000
337                                0x0 0xc8834540 0x0 0x4>;
338                         interrupts = <0 8 1>;
339                         interrupt-names = "macirq";
340                         clocks = <&xtal>;
341                         clock-names = "stmmaceth";
342                         phy-mode = "rgmii";
343                         status = "disabled";
344                 };
345         };
346 };