2 * Device Tree Source for the Alt board
4 * Copyright (C) 2014 Renesas Electronics Corporation
6 * SPDX-License-Identifier: GPL-2.0
10 #include "r8a7794.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
15 compatible = "renesas,alt", "renesas,r8a7794";
24 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
25 stdout-path = "serial0:115200n8";
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
33 d3_3v: regulator-d3-3v {
34 compatible = "regulator-fixed";
35 regulator-name = "D3.3V";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
42 vcc_sdhi0: regulator-vcc-sdhi0 {
43 compatible = "regulator-fixed";
45 regulator-name = "SDHI0 Vcc";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
49 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
53 vccq_sdhi0: regulator-vccq-sdhi0 {
54 compatible = "regulator-gpio";
56 regulator-name = "SDHI0 VccQ";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <3300000>;
60 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
66 vcc_sdhi1: regulator-vcc-sdhi1 {
67 compatible = "regulator-fixed";
69 regulator-name = "SDHI1 Vcc";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
73 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
77 vccq_sdhi1: regulator-vccq-sdhi1 {
78 compatible = "regulator-gpio";
80 regulator-name = "SDHI1 VccQ";
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <3300000>;
84 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
96 compatible = "adi,adv7123";
104 adv7123_in: endpoint {
105 remote-endpoint = <&du_out_rgb1>;
110 adv7123_out: endpoint {
111 remote-endpoint = <&vga_in>;
118 compatible = "vga-connector";
122 remote-endpoint = <&adv7123_out>;
128 compatible = "fixed-clock";
130 clock-frequency = <74250000>;
134 compatible = "fixed-clock";
136 clock-frequency = <148500000>;
140 #address-cells = <1>;
142 compatible = "i2c-gpio";
144 gpios = <&gpio4 9 GPIO_ACTIVE_HIGH /* sda */
145 &gpio4 8 GPIO_ACTIVE_HIGH /* scl */
147 i2c-gpio,delay-us = <5>;
151 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
152 * A fallback to GPIO is provided.
155 compatible = "i2c-demux-pinctrl";
156 i2c-parent = <&i2c4>, <&gpioi2c4>;
157 i2c-bus-name = "i2c-exio4";
158 #address-cells = <1>;
164 pinctrl-0 = <&du_pins>;
165 pinctrl-names = "default";
168 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
169 <&x13_clk>, <&x2_clk>;
170 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
175 remote-endpoint = <&adv7123_in>;
182 clock-frequency = <20000000>;
186 pinctrl-0 = <&scif_clk_pins>;
187 pinctrl-names = "default";
190 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
195 groups = "scif2_data";
199 scif_clk_pins: scif_clk {
201 function = "scif_clk";
205 groups = "eth_link", "eth_mdio", "eth_rmii";
210 groups = "intc_irq8";
225 groups = "vin0_data8", "vin0_clk";
229 mmcif0_pins: mmcif0 {
230 groups = "mmc_data8", "mmc_ctrl";
235 groups = "sdhi0_data4", "sdhi0_ctrl";
237 power-source = <3300>;
240 sdhi0_pins_uhs: sd0_uhs {
241 groups = "sdhi0_data4", "sdhi0_ctrl";
243 power-source = <1800>;
247 groups = "sdhi1_data4", "sdhi1_ctrl";
249 power-source = <3300>;
252 sdhi1_pins_uhs: sd1_uhs {
253 groups = "sdhi1_data4", "sdhi1_ctrl";
255 power-source = <1800>;
265 groups = "qspi_ctrl", "qspi_data4";
271 pinctrl-0 = <ðer_pins &phy1_pins>;
272 pinctrl-names = "default";
274 phy-handle = <&phy1>;
275 renesas,ether-link-active-low;
278 phy1: ethernet-phy@1 {
280 interrupt-parent = <&irqc0>;
281 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
282 micrel,led-mode = <1>;
287 pinctrl-0 = <&mmcif0_pins>;
288 pinctrl-names = "default";
290 vmmc-supply = <&d3_3v>;
291 vqmmc-supply = <&d3_3v>;
298 pinctrl-0 = <&sdhi0_pins>;
299 pinctrl-1 = <&sdhi0_pins_uhs>;
300 pinctrl-names = "default", "state_uhs";
302 vmmc-supply = <&vcc_sdhi0>;
303 vqmmc-supply = <&vccq_sdhi0>;
304 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
305 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
312 pinctrl-0 = <&sdhi1_pins>;
313 pinctrl-1 = <&sdhi1_pins_uhs>;
314 pinctrl-names = "default", "state_uhs";
316 vmmc-supply = <&vcc_sdhi1>;
317 vqmmc-supply = <&vccq_sdhi1>;
318 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
319 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
325 pinctrl-0 = <&i2c1_pins>;
326 pinctrl-names = "default";
329 clock-frequency = <400000>;
332 compatible = "adi,adv7180";
339 remote-endpoint = <&vin0ep>;
346 pinctrl-0 = <&i2c4_pins>;
347 pinctrl-names = "i2c-exio4";
352 pinctrl-0 = <&vin0_pins>;
353 pinctrl-names = "default";
356 #address-cells = <1>;
360 remote-endpoint = <&adv7180>;
367 pinctrl-0 = <&scif2_pins>;
368 pinctrl-names = "default";
374 clock-frequency = <14745600>;
378 pinctrl-0 = <&qspi_pins>;
379 pinctrl-names = "default";
384 compatible = "spansion,s25fl512s", "jedec,spi-nor";
386 spi-max-frequency = <30000000>;
387 spi-tx-bus-width = <4>;
388 spi-rx-bus-width = <4>;
394 compatible = "fixed-partitions";
395 #address-cells = <1>;
400 reg = <0x00000000 0x00040000>;
405 reg = <0x00040000 0x00040000>;
410 reg = <0x00080000 0x03f80000>;