1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Alt board
5 * Copyright (C) 2014 Renesas Electronics Corporation
9 #include "r8a7794.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "renesas,alt", "renesas,r8a7794";
25 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
26 stdout-path = "serial0:115200n8";
30 device_type = "memory";
31 reg = <0 0x40000000 0 0x40000000>;
34 d3_3v: regulator-d3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "D3.3V";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
43 vcc_sdhi0: regulator-vcc-sdhi0 {
44 compatible = "regulator-fixed";
46 regulator-name = "SDHI0 Vcc";
47 regulator-min-microvolt = <3300000>;
48 regulator-max-microvolt = <3300000>;
50 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
54 vccq_sdhi0: regulator-vccq-sdhi0 {
55 compatible = "regulator-gpio";
57 regulator-name = "SDHI0 VccQ";
58 regulator-min-microvolt = <1800000>;
59 regulator-max-microvolt = <3300000>;
61 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
67 vcc_sdhi1: regulator-vcc-sdhi1 {
68 compatible = "regulator-fixed";
70 regulator-name = "SDHI1 Vcc";
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
74 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
78 vccq_sdhi1: regulator-vccq-sdhi1 {
79 compatible = "regulator-gpio";
81 regulator-name = "SDHI1 VccQ";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <3300000>;
85 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
97 compatible = "adi,adv7123";
100 #address-cells = <1>;
105 adv7123_in: endpoint {
106 remote-endpoint = <&du_out_rgb1>;
111 adv7123_out: endpoint {
112 remote-endpoint = <&vga_in>;
119 compatible = "vga-connector";
123 remote-endpoint = <&adv7123_out>;
129 compatible = "fixed-clock";
131 clock-frequency = <74250000>;
135 compatible = "fixed-clock";
137 clock-frequency = <148500000>;
141 #address-cells = <1>;
143 compatible = "i2c-gpio";
145 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
146 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
150 #address-cells = <1>;
152 compatible = "i2c-gpio";
154 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
155 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
156 i2c-gpio,delay-us = <5>;
160 * A fallback to GPIO is provided for I2C1.
163 compatible = "i2c-demux-pinctrl";
164 i2c-parent = <&i2c1>, <&gpioi2c1>;
165 i2c-bus-name = "i2c-hdmi";
166 #address-cells = <1>;
170 compatible = "adi,adv7180";
177 remote-endpoint = <&vin0ep>;
184 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
185 * A fallback to GPIO is provided.
188 compatible = "i2c-demux-pinctrl";
189 i2c-parent = <&i2c4>, <&gpioi2c4>;
190 i2c-bus-name = "i2c-exio4";
191 #address-cells = <1>;
197 pinctrl-0 = <&du_pins>;
198 pinctrl-names = "default";
201 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
202 <&x13_clk>, <&x2_clk>;
203 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
208 remote-endpoint = <&adv7123_in>;
215 clock-frequency = <20000000>;
219 pinctrl-0 = <&scif_clk_pins>;
220 pinctrl-names = "default";
223 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
228 groups = "scif2_data";
232 scif_clk_pins: scif_clk {
234 function = "scif_clk";
238 groups = "eth_link", "eth_mdio", "eth_rmii";
243 groups = "intc_irq8";
258 groups = "vin0_data8", "vin0_clk";
262 mmcif0_pins: mmcif0 {
263 groups = "mmc_data8", "mmc_ctrl";
268 groups = "sdhi0_data4", "sdhi0_ctrl";
270 power-source = <3300>;
273 sdhi0_pins_uhs: sd0_uhs {
274 groups = "sdhi0_data4", "sdhi0_ctrl";
276 power-source = <1800>;
280 groups = "sdhi1_data4", "sdhi1_ctrl";
282 power-source = <3300>;
285 sdhi1_pins_uhs: sd1_uhs {
286 groups = "sdhi1_data4", "sdhi1_ctrl";
288 power-source = <1800>;
298 groups = "qspi_ctrl", "qspi_data4";
304 pinctrl-0 = <ðer_pins &phy1_pins>;
305 pinctrl-names = "default";
307 phy-handle = <&phy1>;
308 renesas,ether-link-active-low;
311 phy1: ethernet-phy@1 {
313 interrupt-parent = <&irqc0>;
314 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
315 micrel,led-mode = <1>;
320 pinctrl-0 = <&mmcif0_pins>;
321 pinctrl-names = "default";
323 vmmc-supply = <&d3_3v>;
324 vqmmc-supply = <&d3_3v>;
331 pinctrl-0 = <&sdhi0_pins>;
332 pinctrl-1 = <&sdhi0_pins_uhs>;
333 pinctrl-names = "default", "state_uhs";
335 vmmc-supply = <&vcc_sdhi0>;
336 vqmmc-supply = <&vccq_sdhi0>;
337 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
338 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
345 pinctrl-0 = <&sdhi1_pins>;
346 pinctrl-1 = <&sdhi1_pins_uhs>;
347 pinctrl-names = "default", "state_uhs";
349 vmmc-supply = <&vcc_sdhi1>;
350 vqmmc-supply = <&vccq_sdhi1>;
351 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
352 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
358 pinctrl-0 = <&i2c1_pins>;
359 pinctrl-names = "i2c-hdmi";
361 clock-frequency = <400000>;
365 pinctrl-0 = <&i2c4_pins>;
366 pinctrl-names = "i2c-exio4";
371 pinctrl-0 = <&vin0_pins>;
372 pinctrl-names = "default";
375 #address-cells = <1>;
379 remote-endpoint = <&adv7180>;
386 pinctrl-0 = <&scif2_pins>;
387 pinctrl-names = "default";
393 clock-frequency = <14745600>;
397 pinctrl-0 = <&qspi_pins>;
398 pinctrl-names = "default";
403 compatible = "spansion,s25fl512s", "jedec,spi-nor";
405 spi-max-frequency = <30000000>;
406 spi-tx-bus-width = <4>;
407 spi-rx-bus-width = <4>;
413 compatible = "fixed-partitions";
414 #address-cells = <1>;
419 reg = <0x00000000 0x00040000>;
424 reg = <0x00040000 0x00040000>;
429 reg = <0x00080000 0x03f80000>;