git.sur5r.net Git - u-boot/blob - arch/arm/dts/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         psci {
  32                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  33                 method = "smc";
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 a57_0: cpu@0 {
  41                         compatible = "arm,cortex-a57", "arm,armv8";
  42                         reg = <0x0>;
  43                         device_type = "cpu";
  44                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  45                         next-level-cache = <&L2_CA57>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a57_1: cpu@1 {
  50                         compatible = "arm,cortex-a57","arm,armv8";
  51                         reg = <0x1>;
  52                         device_type = "cpu";
  53                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  54                         next-level-cache = <&L2_CA57>;
  55                         enable-method = "psci";
  56                 };
  57
  58                 a57_2: cpu@2 {
  59                         compatible = "arm,cortex-a57","arm,armv8";
  60                         reg = <0x2>;
  61                         device_type = "cpu";
  62                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  63                         next-level-cache = <&L2_CA57>;
  64                         enable-method = "psci";
  65                 };
  66
  67                 a57_3: cpu@3 {
  68                         compatible = "arm,cortex-a57","arm,armv8";
  69                         reg = <0x3>;
  70                         device_type = "cpu";
  71                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  72                         next-level-cache = <&L2_CA57>;
  73                         enable-method = "psci";
  74                 };
  75
  76                 a53_0: cpu@100 {
  77                         compatible = "arm,cortex-a53", "arm,armv8";
  78                         reg = <0x100>;
  79                         device_type = "cpu";
  80                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
  81                         next-level-cache = <&L2_CA53>;
  82                         enable-method = "psci";
  83                 };
  84
  85                 a53_1: cpu@101 {
  86                         compatible = "arm,cortex-a53","arm,armv8";
  87                         reg = <0x101>;
  88                         device_type = "cpu";
  89                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
  90                         next-level-cache = <&L2_CA53>;
  91                         enable-method = "psci";
  92                 };
  93
  94                 a53_2: cpu@102 {
  95                         compatible = "arm,cortex-a53","arm,armv8";
  96                         reg = <0x102>;
  97                         device_type = "cpu";
  98                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
  99                         next-level-cache = <&L2_CA53>;
 100                         enable-method = "psci";
 101                 };
 102
 103                 a53_3: cpu@103 {
 104                         compatible = "arm,cortex-a53","arm,armv8";
 105                         reg = <0x103>;
 106                         device_type = "cpu";
 107                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 108                         next-level-cache = <&L2_CA53>;
 109                         enable-method = "psci";
 110                 };
 111
 112                 L2_CA57: cache-controller-0 {
 113                         compatible = "cache";
 114                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 115                         cache-unified;
 116                         cache-level = <2>;
 117                 };
 118
 119                 L2_CA53: cache-controller-1 {
 120                         compatible = "cache";
 121                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 122                         cache-unified;
 123                         cache-level = <2>;
 124                 };
 125         };
 126
 127         extal_clk: extal {
 128                 compatible = "fixed-clock";
 129                 #clock-cells = <0>;
 130                 /* This value must be overridden by the board */
 131                 clock-frequency = <0>;
 132         };
 133
 134         extalr_clk: extalr {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 /* This value must be overridden by the board */
 138                 clock-frequency = <0>;
 139         };
 140
 141         /*
 142          * The external audio clocks are configured as 0 Hz fixed frequency
 143          * clocks by default.
 144          * Boards that provide audio clocks should override them.
 145          */
 146         audio_clk_a: audio_clk_a {
 147                 compatible = "fixed-clock";
 148                 #clock-cells = <0>;
 149                 clock-frequency = <0>;
 150         };
 151
 152         audio_clk_b: audio_clk_b {
 153                 compatible = "fixed-clock";
 154                 #clock-cells = <0>;
 155                 clock-frequency = <0>;
 156         };
 157
 158         audio_clk_c: audio_clk_c {
 159                 compatible = "fixed-clock";
 160                 #clock-cells = <0>;
 161                 clock-frequency = <0>;
 162         };
 163
 164         /* External CAN clock - to be overridden by boards that provide it */
 165         can_clk: can {
 166                 compatible = "fixed-clock";
 167                 #clock-cells = <0>;
 168                 clock-frequency = <0>;
 169         };
 170
 171         /* External SCIF clock - to be overridden by boards that provide it */
 172         scif_clk: scif {
 173                 compatible = "fixed-clock";
 174                 #clock-cells = <0>;
 175                 clock-frequency = <0>;
 176         };
 177
 178         /* External PCIe clock - can be overridden by the board */
 179         pcie_bus_clk: pcie_bus {
 180                 compatible = "fixed-clock";
 181                 #clock-cells = <0>;
 182                 clock-frequency = <0>;
 183         };
 184
 185         soc {
 186                 compatible = "simple-bus";
 187                 interrupt-parent = <&gic>;
 188
 189                 #address-cells = <2>;
 190                 #size-cells = <2>;
 191                 ranges;
 192
 193                 gic: interrupt-controller@f1010000 {
 194                         compatible = "arm,gic-400";
 195                         #interrupt-cells = <3>;
 196                         #address-cells = <0>;
 197                         interrupt-controller;
 198                         reg = <0x0 0xf1010000 0 0x1000>,
 199                               <0x0 0xf1020000 0 0x20000>,
 200                               <0x0 0xf1040000 0 0x20000>,
 201                               <0x0 0xf1060000 0 0x20000>;
 202                         interrupts = <GIC_PPI 9
 203                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 204                         clocks = <&cpg CPG_MOD 408>;
 205                         clock-names = "clk";
 206                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 207                         resets = <&cpg 408>;
 208                 };
 209
 210                 wdt0: watchdog@e6020000 {
 211                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 212                         reg = <0 0xe6020000 0 0x0c>;
 213                         clocks = <&cpg CPG_MOD 402>;
 214                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 215                         resets = <&cpg 402>;
 216                         status = "disabled";
 217                 };
 218
 219                 gpio0: gpio@e6050000 {
 220                         compatible = "renesas,gpio-r8a7795",
 221                                      "renesas,gpio-rcar";
 222                         reg = <0 0xe6050000 0 0x50>;
 223                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 224                         #gpio-cells = <2>;
 225                         gpio-controller;
 226                         gpio-ranges = <&pfc 0 0 16>;
 227                         #interrupt-cells = <2>;
 228                         interrupt-controller;
 229                         clocks = <&cpg CPG_MOD 912>;
 230                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 231                         resets = <&cpg 912>;
 232                 };
 233
 234                 gpio1: gpio@e6051000 {
 235                         compatible = "renesas,gpio-r8a7795",
 236                                      "renesas,gpio-rcar";
 237                         reg = <0 0xe6051000 0 0x50>;
 238                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 239                         #gpio-cells = <2>;
 240                         gpio-controller;
 241                         gpio-ranges = <&pfc 0 32 28>;
 242                         #interrupt-cells = <2>;
 243                         interrupt-controller;
 244                         clocks = <&cpg CPG_MOD 911>;
 245                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 246                         resets = <&cpg 911>;
 247                 };
 248
 249                 gpio2: gpio@e6052000 {
 250                         compatible = "renesas,gpio-r8a7795",
 251                                      "renesas,gpio-rcar";
 252                         reg = <0 0xe6052000 0 0x50>;
 253                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 254                         #gpio-cells = <2>;
 255                         gpio-controller;
 256                         gpio-ranges = <&pfc 0 64 15>;
 257                         #interrupt-cells = <2>;
 258                         interrupt-controller;
 259                         clocks = <&cpg CPG_MOD 910>;
 260                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 261                         resets = <&cpg 910>;
 262                 };
 263
 264                 gpio3: gpio@e6053000 {
 265                         compatible = "renesas,gpio-r8a7795",
 266                                      "renesas,gpio-rcar";
 267                         reg = <0 0xe6053000 0 0x50>;
 268                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 269                         #gpio-cells = <2>;
 270                         gpio-controller;
 271                         gpio-ranges = <&pfc 0 96 16>;
 272                         #interrupt-cells = <2>;
 273                         interrupt-controller;
 274                         clocks = <&cpg CPG_MOD 909>;
 275                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 276                         resets = <&cpg 909>;
 277                 };
 278
 279                 gpio4: gpio@e6054000 {
 280                         compatible = "renesas,gpio-r8a7795",
 281                                      "renesas,gpio-rcar";
 282                         reg = <0 0xe6054000 0 0x50>;
 283                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 284                         #gpio-cells = <2>;
 285                         gpio-controller;
 286                         gpio-ranges = <&pfc 0 128 18>;
 287                         #interrupt-cells = <2>;
 288                         interrupt-controller;
 289                         clocks = <&cpg CPG_MOD 908>;
 290                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 291                         resets = <&cpg 908>;
 292                 };
 293
 294                 gpio5: gpio@e6055000 {
 295                         compatible = "renesas,gpio-r8a7795",
 296                                      "renesas,gpio-rcar";
 297                         reg = <0 0xe6055000 0 0x50>;
 298                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 299                         #gpio-cells = <2>;
 300                         gpio-controller;
 301                         gpio-ranges = <&pfc 0 160 26>;
 302                         #interrupt-cells = <2>;
 303                         interrupt-controller;
 304                         clocks = <&cpg CPG_MOD 907>;
 305                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 306                         resets = <&cpg 907>;
 307                 };
 308
 309                 gpio6: gpio@e6055400 {
 310                         compatible = "renesas,gpio-r8a7795",
 311                                      "renesas,gpio-rcar";
 312                         reg = <0 0xe6055400 0 0x50>;
 313                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 314                         #gpio-cells = <2>;
 315                         gpio-controller;
 316                         gpio-ranges = <&pfc 0 192 32>;
 317                         #interrupt-cells = <2>;
 318                         interrupt-controller;
 319                         clocks = <&cpg CPG_MOD 906>;
 320                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 321                         resets = <&cpg 906>;
 322                 };
 323
 324                 gpio7: gpio@e6055800 {
 325                         compatible = "renesas,gpio-r8a7795",
 326                                      "renesas,gpio-rcar";
 327                         reg = <0 0xe6055800 0 0x50>;
 328                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 329                         #gpio-cells = <2>;
 330                         gpio-controller;
 331                         gpio-ranges = <&pfc 0 224 4>;
 332                         #interrupt-cells = <2>;
 333                         interrupt-controller;
 334                         clocks = <&cpg CPG_MOD 905>;
 335                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 336                         resets = <&cpg 905>;
 337                 };
 338
 339                 pmu_a57 {
 340                         compatible = "arm,cortex-a57-pmu";
 341                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 342                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 343                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 345                         interrupt-affinity = <&a57_0>,
 346                                              <&a57_1>,
 347                                              <&a57_2>,
 348                                              <&a57_3>;
 349                 };
 350
 351                 pmu_a53 {
 352                         compatible = "arm,cortex-a53-pmu";
 353                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 354                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 355                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 356                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 357                         interrupt-affinity = <&a53_0>,
 358                                              <&a53_1>,
 359                                              <&a53_2>,
 360                                              <&a53_3>;
 361                 };
 362
 363                 timer {
 364                         compatible = "arm,armv8-timer";
 365                         interrupts = <GIC_PPI 13
 366                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 367                                      <GIC_PPI 14
 368                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 369                                      <GIC_PPI 11
 370                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 371                                      <GIC_PPI 10
 372                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 373                 };
 374
 375                 cpg: clock-controller@e6150000 {
 376                         compatible = "renesas,r8a7795-cpg-mssr";
 377                         reg = <0 0xe6150000 0 0x1000>;
 378                         clocks = <&extal_clk>, <&extalr_clk>;
 379                         clock-names = "extal", "extalr";
 380                         #clock-cells = <2>;
 381                         #power-domain-cells = <0>;
 382                         #reset-cells = <1>;
 383                 };
 384
 385                 rst: reset-controller@e6160000 {
 386                         compatible = "renesas,r8a7795-rst";
 387                         reg = <0 0xe6160000 0 0x0200>;
 388                 };
 389
 390                 prr: chipid@fff00044 {
 391                         compatible = "renesas,prr";
 392                         reg = <0 0xfff00044 0 4>;
 393                 };
 394
 395                 sysc: system-controller@e6180000 {
 396                         compatible = "renesas,r8a7795-sysc";
 397                         reg = <0 0xe6180000 0 0x0400>;
 398                         #power-domain-cells = <1>;
 399                 };
 400
 401                 pfc: pfc@e6060000 {
 402                         compatible = "renesas,pfc-r8a7795";
 403                         reg = <0 0xe6060000 0 0x50c>;
 404                 };
 405
 406                 intc_ex: interrupt-controller@e61c0000 {
 407                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 408                         #interrupt-cells = <2>;
 409                         interrupt-controller;
 410                         reg = <0 0xe61c0000 0 0x200>;
 411                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 412                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 413                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 414                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 415                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 416                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 417                         clocks = <&cpg CPG_MOD 407>;
 418                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 419                         resets = <&cpg 407>;
 420                 };
 421
 422                 dmac0: dma-controller@e6700000 {
 423                         compatible = "renesas,dmac-r8a7795",
 424                                      "renesas,rcar-dmac";
 425                         reg = <0 0xe6700000 0 0x10000>;
 426                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 438                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 439                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 440                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 441                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 442                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 443                         interrupt-names = "error",
 444                                         "ch0", "ch1", "ch2", "ch3",
 445                                         "ch4", "ch5", "ch6", "ch7",
 446                                         "ch8", "ch9", "ch10", "ch11",
 447                                         "ch12", "ch13", "ch14", "ch15";
 448                         clocks = <&cpg CPG_MOD 219>;
 449                         clock-names = "fck";
 450                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 451                         resets = <&cpg 219>;
 452                         #dma-cells = <1>;
 453                         dma-channels = <16>;
 454                 };
 455
 456                 dmac1: dma-controller@e7300000 {
 457                         compatible = "renesas,dmac-r8a7795",
 458                                      "renesas,rcar-dmac";
 459                         reg = <0 0xe7300000 0 0x10000>;
 460                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 471                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 472                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 473                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 475                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 476                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 477                         interrupt-names = "error",
 478                                         "ch0", "ch1", "ch2", "ch3",
 479                                         "ch4", "ch5", "ch6", "ch7",
 480                                         "ch8", "ch9", "ch10", "ch11",
 481                                         "ch12", "ch13", "ch14", "ch15";
 482                         clocks = <&cpg CPG_MOD 218>;
 483                         clock-names = "fck";
 484                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 485                         resets = <&cpg 218>;
 486                         #dma-cells = <1>;
 487                         dma-channels = <16>;
 488                 };
 489
 490                 dmac2: dma-controller@e7310000 {
 491                         compatible = "renesas,dmac-r8a7795",
 492                                      "renesas,rcar-dmac";
 493                         reg = <0 0xe7310000 0 0x10000>;
 494                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 495                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 496                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 497                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 498                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 499                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 501                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 502                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 503                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 504                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 505                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 506                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 507                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 508                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 509                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 510                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 511                         interrupt-names = "error",
 512                                         "ch0", "ch1", "ch2", "ch3",
 513                                         "ch4", "ch5", "ch6", "ch7",
 514                                         "ch8", "ch9", "ch10", "ch11",
 515                                         "ch12", "ch13", "ch14", "ch15";
 516                         clocks = <&cpg CPG_MOD 217>;
 517                         clock-names = "fck";
 518                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 519                         resets = <&cpg 217>;
 520                         #dma-cells = <1>;
 521                         dma-channels = <16>;
 522                 };
 523
 524                 audma0: dma-controller@ec700000 {
 525                         compatible = "renesas,dmac-r8a7795",
 526                                      "renesas,rcar-dmac";
 527                         reg = <0 0xec700000 0 0x10000>;
 528                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 529                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 530                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 531                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 532                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 533                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 534                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 535                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 536                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 537                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 538                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 539                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 540                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 541                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 542                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 543                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 544                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 545                         interrupt-names = "error",
 546                                         "ch0", "ch1", "ch2", "ch3",
 547                                         "ch4", "ch5", "ch6", "ch7",
 548                                         "ch8", "ch9", "ch10", "ch11",
 549                                         "ch12", "ch13", "ch14", "ch15";
 550                         clocks = <&cpg CPG_MOD 502>;
 551                         clock-names = "fck";
 552                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 553                         resets = <&cpg 502>;
 554                         #dma-cells = <1>;
 555                         dma-channels = <16>;
 556                 };
 557
 558                 audma1: dma-controller@ec720000 {
 559                         compatible = "renesas,dmac-r8a7795",
 560                                      "renesas,rcar-dmac";
 561                         reg = <0 0xec720000 0 0x10000>;
 562                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 563                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 564                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 565                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 566                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 567                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 570                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 571                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 572                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 573                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 574                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 575                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 576                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 577                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 578                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 579                         interrupt-names = "error",
 580                                         "ch0", "ch1", "ch2", "ch3",
 581                                         "ch4", "ch5", "ch6", "ch7",
 582                                         "ch8", "ch9", "ch10", "ch11",
 583                                         "ch12", "ch13", "ch14", "ch15";
 584                         clocks = <&cpg CPG_MOD 501>;
 585                         clock-names = "fck";
 586                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 587                         resets = <&cpg 501>;
 588                         #dma-cells = <1>;
 589                         dma-channels = <16>;
 590                 };
 591
 592                 avb: ethernet@e6800000 {
 593                         compatible = "renesas,etheravb-r8a7795",
 594                                      "renesas,etheravb-rcar-gen3";
 595                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 596                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 597                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 598                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 599                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 600                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 601                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 602                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 603                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 604                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 608                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 614                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 615                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 616                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 617                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 620                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 621                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 622                                           "ch4", "ch5", "ch6", "ch7",
 623                                           "ch8", "ch9", "ch10", "ch11",
 624                                           "ch12", "ch13", "ch14", "ch15",
 625                                           "ch16", "ch17", "ch18", "ch19",
 626                                           "ch20", "ch21", "ch22", "ch23",
 627                                           "ch24";
 628                         clocks = <&cpg CPG_MOD 812>;
 629                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 630                         resets = <&cpg 812>;
 631                         phy-mode = "rgmii-txid";
 632                         #address-cells = <1>;
 633                         #size-cells = <0>;
 634                         status = "disabled";
 635                 };
 636
 637                 can0: can@e6c30000 {
 638                         compatible = "renesas,can-r8a7795",
 639                                      "renesas,rcar-gen3-can";
 640                         reg = <0 0xe6c30000 0 0x1000>;
 641                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 642                         clocks = <&cpg CPG_MOD 916>,
 643                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 644                                <&can_clk>;
 645                         clock-names = "clkp1", "clkp2", "can_clk";
 646                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 647                         assigned-clock-rates = <40000000>;
 648                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 649                         resets = <&cpg 916>;
 650                         status = "disabled";
 651                 };
 652
 653                 can1: can@e6c38000 {
 654                         compatible = "renesas,can-r8a7795",
 655                                      "renesas,rcar-gen3-can";
 656                         reg = <0 0xe6c38000 0 0x1000>;
 657                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 658                         clocks = <&cpg CPG_MOD 915>,
 659                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 660                                <&can_clk>;
 661                         clock-names = "clkp1", "clkp2", "can_clk";
 662                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 663                         assigned-clock-rates = <40000000>;
 664                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 665                         resets = <&cpg 915>;
 666                         status = "disabled";
 667                 };
 668
 669                 canfd: can@e66c0000 {
 670                         compatible = "renesas,r8a7795-canfd",
 671                                      "renesas,rcar-gen3-canfd";
 672                         reg = <0 0xe66c0000 0 0x8000>;
 673                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 674                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 675                         clocks = <&cpg CPG_MOD 914>,
 676                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 677                                <&can_clk>;
 678                         clock-names = "fck", "canfd", "can_clk";
 679                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 680                         assigned-clock-rates = <40000000>;
 681                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 682                         resets = <&cpg 914>;
 683                         status = "disabled";
 684
 685                         channel0 {
 686                                 status = "disabled";
 687                         };
 688
 689                         channel1 {
 690                                 status = "disabled";
 691                         };
 692                 };
 693
 694                 hscif0: serial@e6540000 {
 695                         compatible = "renesas,hscif-r8a7795",
 696                                      "renesas,rcar-gen3-hscif",
 697                                      "renesas,hscif";
 698                         reg = <0 0xe6540000 0 96>;
 699                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 700                         clocks = <&cpg CPG_MOD 520>,
 701                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 702                                  <&scif_clk>;
 703                         clock-names = "fck", "brg_int", "scif_clk";
 704                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 705                         dma-names = "tx", "rx";
 706                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 707                         resets = <&cpg 520>;
 708                         status = "disabled";
 709                 };
 710
 711                 hscif1: serial@e6550000 {
 712                         compatible = "renesas,hscif-r8a7795",
 713                                      "renesas,rcar-gen3-hscif",
 714                                      "renesas,hscif";
 715                         reg = <0 0xe6550000 0 96>;
 716                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 717                         clocks = <&cpg CPG_MOD 519>,
 718                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 719                                  <&scif_clk>;
 720                         clock-names = "fck", "brg_int", "scif_clk";
 721                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 722                         dma-names = "tx", "rx";
 723                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 724                         resets = <&cpg 519>;
 725                         status = "disabled";
 726                 };
 727
 728                 hscif2: serial@e6560000 {
 729                         compatible = "renesas,hscif-r8a7795",
 730                                      "renesas,rcar-gen3-hscif",
 731                                      "renesas,hscif";
 732                         reg = <0 0xe6560000 0 96>;
 733                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 734                         clocks = <&cpg CPG_MOD 518>,
 735                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 736                                  <&scif_clk>;
 737                         clock-names = "fck", "brg_int", "scif_clk";
 738                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 739                         dma-names = "tx", "rx";
 740                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 741                         resets = <&cpg 518>;
 742                         status = "disabled";
 743                 };
 744
 745                 hscif3: serial@e66a0000 {
 746                         compatible = "renesas,hscif-r8a7795",
 747                                      "renesas,rcar-gen3-hscif",
 748                                      "renesas,hscif";
 749                         reg = <0 0xe66a0000 0 96>;
 750                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 751                         clocks = <&cpg CPG_MOD 517>,
 752                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 753                                  <&scif_clk>;
 754                         clock-names = "fck", "brg_int", "scif_clk";
 755                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 756                         dma-names = "tx", "rx";
 757                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 758                         resets = <&cpg 517>;
 759                         status = "disabled";
 760                 };
 761
 762                 hscif4: serial@e66b0000 {
 763                         compatible = "renesas,hscif-r8a7795",
 764                                      "renesas,rcar-gen3-hscif",
 765                                      "renesas,hscif";
 766                         reg = <0 0xe66b0000 0 96>;
 767                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 768                         clocks = <&cpg CPG_MOD 516>,
 769                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 770                                  <&scif_clk>;
 771                         clock-names = "fck", "brg_int", "scif_clk";
 772                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 773                         dma-names = "tx", "rx";
 774                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 775                         resets = <&cpg 516>;
 776                         status = "disabled";
 777                 };
 778
 779                 scif0: serial@e6e60000 {
 780                         compatible = "renesas,scif-r8a7795",
 781                                      "renesas,rcar-gen3-scif", "renesas,scif";
 782                         reg = <0 0xe6e60000 0 64>;
 783                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 784                         clocks = <&cpg CPG_MOD 207>,
 785                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 786                                  <&scif_clk>;
 787                         clock-names = "fck", "brg_int", "scif_clk";
 788                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 789                         dma-names = "tx", "rx";
 790                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 791                         resets = <&cpg 207>;
 792                         status = "disabled";
 793                 };
 794
 795                 scif1: serial@e6e68000 {
 796                         compatible = "renesas,scif-r8a7795",
 797                                      "renesas,rcar-gen3-scif", "renesas,scif";
 798                         reg = <0 0xe6e68000 0 64>;
 799                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 800                         clocks = <&cpg CPG_MOD 206>,
 801                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 802                                  <&scif_clk>;
 803                         clock-names = "fck", "brg_int", "scif_clk";
 804                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 805                         dma-names = "tx", "rx";
 806                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 807                         resets = <&cpg 206>;
 808                         status = "disabled";
 809                 };
 810
 811                 scif2: serial@e6e88000 {
 812                         compatible = "renesas,scif-r8a7795",
 813                                      "renesas,rcar-gen3-scif", "renesas,scif";
 814                         reg = <0 0xe6e88000 0 64>;
 815                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 816                         clocks = <&cpg CPG_MOD 310>,
 817                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 818                                  <&scif_clk>;
 819                         clock-names = "fck", "brg_int", "scif_clk";
 820                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 821                         dma-names = "tx", "rx";
 822                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 823                         resets = <&cpg 310>;
 824                         status = "disabled";
 825                 };
 826
 827                 scif3: serial@e6c50000 {
 828                         compatible = "renesas,scif-r8a7795",
 829                                      "renesas,rcar-gen3-scif", "renesas,scif";
 830                         reg = <0 0xe6c50000 0 64>;
 831                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 832                         clocks = <&cpg CPG_MOD 204>,
 833                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 834                                  <&scif_clk>;
 835                         clock-names = "fck", "brg_int", "scif_clk";
 836                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 837                         dma-names = "tx", "rx";
 838                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 839                         resets = <&cpg 204>;
 840                         status = "disabled";
 841                 };
 842
 843                 scif4: serial@e6c40000 {
 844                         compatible = "renesas,scif-r8a7795",
 845                                      "renesas,rcar-gen3-scif", "renesas,scif";
 846                         reg = <0 0xe6c40000 0 64>;
 847                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 848                         clocks = <&cpg CPG_MOD 203>,
 849                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 850                                  <&scif_clk>;
 851                         clock-names = "fck", "brg_int", "scif_clk";
 852                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 853                         dma-names = "tx", "rx";
 854                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 855                         resets = <&cpg 203>;
 856                         status = "disabled";
 857                 };
 858
 859                 scif5: serial@e6f30000 {
 860                         compatible = "renesas,scif-r8a7795",
 861                                      "renesas,rcar-gen3-scif", "renesas,scif";
 862                         reg = <0 0xe6f30000 0 64>;
 863                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 864                         clocks = <&cpg CPG_MOD 202>,
 865                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 866                                  <&scif_clk>;
 867                         clock-names = "fck", "brg_int", "scif_clk";
 868                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 869                         dma-names = "tx", "rx";
 870                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 871                         resets = <&cpg 202>;
 872                         status = "disabled";
 873                 };
 874
 875                 i2c_dvfs: i2c@e60b0000 {
 876                         #address-cells = <1>;
 877                         #size-cells = <0>;
 878                         compatible = "renesas,iic-r8a7795",
 879                                      "renesas,rcar-gen3-iic",
 880                                      "renesas,rmobile-iic";
 881                         reg = <0 0xe60b0000 0 0x425>;
 882                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 883                         clocks = <&cpg CPG_MOD 926>;
 884                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 885                         resets = <&cpg 926>;
 886                         status = "disabled";
 887                 };
 888
 889                 i2c0: i2c@e6500000 {
 890                         #address-cells = <1>;
 891                         #size-cells = <0>;
 892                         compatible = "renesas,i2c-r8a7795",
 893                                      "renesas,rcar-gen3-i2c";
 894                         reg = <0 0xe6500000 0 0x40>;
 895                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 896                         clocks = <&cpg CPG_MOD 931>;
 897                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 898                         resets = <&cpg 931>;
 899                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 900                         dma-names = "tx", "rx";
 901                         i2c-scl-internal-delay-ns = <110>;
 902                         status = "disabled";
 903                 };
 904
 905                 i2c1: i2c@e6508000 {
 906                         #address-cells = <1>;
 907                         #size-cells = <0>;
 908                         compatible = "renesas,i2c-r8a7795",
 909                                      "renesas,rcar-gen3-i2c";
 910                         reg = <0 0xe6508000 0 0x40>;
 911                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 912                         clocks = <&cpg CPG_MOD 930>;
 913                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 914                         resets = <&cpg 930>;
 915                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 916                         dma-names = "tx", "rx";
 917                         i2c-scl-internal-delay-ns = <6>;
 918                         status = "disabled";
 919                 };
 920
 921                 i2c2: i2c@e6510000 {
 922                         #address-cells = <1>;
 923                         #size-cells = <0>;
 924                         compatible = "renesas,i2c-r8a7795",
 925                                      "renesas,rcar-gen3-i2c";
 926                         reg = <0 0xe6510000 0 0x40>;
 927                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 928                         clocks = <&cpg CPG_MOD 929>;
 929                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 930                         resets = <&cpg 929>;
 931                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 932                         dma-names = "tx", "rx";
 933                         i2c-scl-internal-delay-ns = <6>;
 934                         status = "disabled";
 935                 };
 936
 937                 i2c3: i2c@e66d0000 {
 938                         #address-cells = <1>;
 939                         #size-cells = <0>;
 940                         compatible = "renesas,i2c-r8a7795",
 941                                      "renesas,rcar-gen3-i2c";
 942                         reg = <0 0xe66d0000 0 0x40>;
 943                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 944                         clocks = <&cpg CPG_MOD 928>;
 945                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 946                         resets = <&cpg 928>;
 947                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 948                         dma-names = "tx", "rx";
 949                         i2c-scl-internal-delay-ns = <110>;
 950                         status = "disabled";
 951                 };
 952
 953                 i2c4: i2c@e66d8000 {
 954                         #address-cells = <1>;
 955                         #size-cells = <0>;
 956                         compatible = "renesas,i2c-r8a7795",
 957                                      "renesas,rcar-gen3-i2c";
 958                         reg = <0 0xe66d8000 0 0x40>;
 959                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 960                         clocks = <&cpg CPG_MOD 927>;
 961                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 962                         resets = <&cpg 927>;
 963                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 964                         dma-names = "tx", "rx";
 965                         i2c-scl-internal-delay-ns = <110>;
 966                         status = "disabled";
 967                 };
 968
 969                 i2c5: i2c@e66e0000 {
 970                         #address-cells = <1>;
 971                         #size-cells = <0>;
 972                         compatible = "renesas,i2c-r8a7795",
 973                                      "renesas,rcar-gen3-i2c";
 974                         reg = <0 0xe66e0000 0 0x40>;
 975                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 976                         clocks = <&cpg CPG_MOD 919>;
 977                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 978                         resets = <&cpg 919>;
 979                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 980                         dma-names = "tx", "rx";
 981                         i2c-scl-internal-delay-ns = <110>;
 982                         status = "disabled";
 983                 };
 984
 985                 i2c6: i2c@e66e8000 {
 986                         #address-cells = <1>;
 987                         #size-cells = <0>;
 988                         compatible = "renesas,i2c-r8a7795",
 989                                      "renesas,rcar-gen3-i2c";
 990                         reg = <0 0xe66e8000 0 0x40>;
 991                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 992                         clocks = <&cpg CPG_MOD 918>;
 993                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 994                         resets = <&cpg 918>;
 995                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 996                         dma-names = "tx", "rx";
 997                         i2c-scl-internal-delay-ns = <6>;
 998                         status = "disabled";
 999                 };
1000
1001                 pwm0: pwm@e6e30000 {
1002                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1003                         reg = <0 0xe6e30000 0 0x8>;
1004                         clocks = <&cpg CPG_MOD 523>;
1005                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1006                         resets = <&cpg 523>;
1007                         #pwm-cells = <2>;
1008                         status = "disabled";
1009                 };
1010
1011                 pwm1: pwm@e6e31000 {
1012                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1013                         reg = <0 0xe6e31000 0 0x8>;
1014                         clocks = <&cpg CPG_MOD 523>;
1015                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1016                         resets = <&cpg 523>;
1017                         #pwm-cells = <2>;
1018                         status = "disabled";
1019                 };
1020
1021                 pwm2: pwm@e6e32000 {
1022                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1023                         reg = <0 0xe6e32000 0 0x8>;
1024                         clocks = <&cpg CPG_MOD 523>;
1025                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1026                         resets = <&cpg 523>;
1027                         #pwm-cells = <2>;
1028                         status = "disabled";
1029                 };
1030
1031                 pwm3: pwm@e6e33000 {
1032                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1033                         reg = <0 0xe6e33000 0 0x8>;
1034                         clocks = <&cpg CPG_MOD 523>;
1035                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1036                         resets = <&cpg 523>;
1037                         #pwm-cells = <2>;
1038                         status = "disabled";
1039                 };
1040
1041                 pwm4: pwm@e6e34000 {
1042                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1043                         reg = <0 0xe6e34000 0 0x8>;
1044                         clocks = <&cpg CPG_MOD 523>;
1045                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1046                         resets = <&cpg 523>;
1047                         #pwm-cells = <2>;
1048                         status = "disabled";
1049                 };
1050
1051                 pwm5: pwm@e6e35000 {
1052                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1053                         reg = <0 0xe6e35000 0 0x8>;
1054                         clocks = <&cpg CPG_MOD 523>;
1055                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1056                         resets = <&cpg 523>;
1057                         #pwm-cells = <2>;
1058                         status = "disabled";
1059                 };
1060
1061                 pwm6: pwm@e6e36000 {
1062                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1063                         reg = <0 0xe6e36000 0 0x8>;
1064                         clocks = <&cpg CPG_MOD 523>;
1065                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1066                         resets = <&cpg 523>;
1067                         #pwm-cells = <2>;
1068                         status = "disabled";
1069                 };
1070
1071                 rcar_sound: sound@ec500000 {
1072                         /*
1073                          * #sound-dai-cells is required
1074                          *
1075                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1076                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1077                          */
1078                         /*
1079                          * #clock-cells is required for audio_clkout0/1/2/3
1080                          *
1081                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1082                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1083                          */
1084                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1085                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1086                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1087                                 <0 0xec540000 0 0x1000>, /* SSIU */
1088                                 <0 0xec541000 0 0x280>,  /* SSI */
1089                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1090                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1091
1092                         clocks = <&cpg CPG_MOD 1005>,
1093                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1094                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1095                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1096                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1097                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1098                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1099                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1100                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1101                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1102                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1103                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1104                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1105                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1106                                  <&audio_clk_a>, <&audio_clk_b>,
1107                                  <&audio_clk_c>,
1108                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1109                         clock-names = "ssi-all",
1110                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1111                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1112                                       "ssi.1", "ssi.0",
1113                                       "src.9", "src.8", "src.7", "src.6",
1114                                       "src.5", "src.4", "src.3", "src.2",
1115                                       "src.1", "src.0",
1116                                       "mix.1", "mix.0",
1117                                       "ctu.1", "ctu.0",
1118                                       "dvc.0", "dvc.1",
1119                                       "clk_a", "clk_b", "clk_c", "clk_i";
1120                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1121                         status = "disabled";
1122
1123                         rcar_sound,dvc {
1124                                 dvc0: dvc-0 {
1125                                         dmas = <&audma1 0xbc>;
1126                                         dma-names = "tx";
1127                                 };
1128                                 dvc1: dvc-1 {
1129                                         dmas = <&audma1 0xbe>;
1130                                         dma-names = "tx";
1131                                 };
1132                         };
1133
1134                         rcar_sound,mix {
1135                                 mix0: mix-0 { };
1136                                 mix1: mix-1 { };
1137                         };
1138
1139                         rcar_sound,ctu {
1140                                 ctu00: ctu-0 { };
1141                                 ctu01: ctu-1 { };
1142                                 ctu02: ctu-2 { };
1143                                 ctu03: ctu-3 { };
1144                                 ctu10: ctu-4 { };
1145                                 ctu11: ctu-5 { };
1146                                 ctu12: ctu-6 { };
1147                                 ctu13: ctu-7 { };
1148                         };
1149
1150                         rcar_sound,src {
1151                                 src0: src-0 {
1152                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1153                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1154                                         dma-names = "rx", "tx";
1155                                 };
1156                                 src1: src-1 {
1157                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1158                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1159                                         dma-names = "rx", "tx";
1160                                 };
1161                                 src2: src-2 {
1162                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1163                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1164                                         dma-names = "rx", "tx";
1165                                 };
1166                                 src3: src-3 {
1167                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1168                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1169                                         dma-names = "rx", "tx";
1170                                 };
1171                                 src4: src-4 {
1172                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1173                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1174                                         dma-names = "rx", "tx";
1175                                 };
1176                                 src5: src-5 {
1177                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1178                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1179                                         dma-names = "rx", "tx";
1180                                 };
1181                                 src6: src-6 {
1182                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1183                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1184                                         dma-names = "rx", "tx";
1185                                 };
1186                                 src7: src-7 {
1187                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1188                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1189                                         dma-names = "rx", "tx";
1190                                 };
1191                                 src8: src-8 {
1192                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1193                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1194                                         dma-names = "rx", "tx";
1195                                 };
1196                                 src9: src-9 {
1197                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1198                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1199                                         dma-names = "rx", "tx";
1200                                 };
1201                         };
1202
1203                         rcar_sound,ssi {
1204                                 ssi0: ssi-0 {
1205                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1206                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1207                                         dma-names = "rx", "tx", "rxu", "txu";
1208                                 };
1209                                 ssi1: ssi-1 {
1210                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1211                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1212                                         dma-names = "rx", "tx", "rxu", "txu";
1213                                 };
1214                                 ssi2: ssi-2 {
1215                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1216                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1217                                         dma-names = "rx", "tx", "rxu", "txu";
1218                                 };
1219                                 ssi3: ssi-3 {
1220                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1221                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1222                                         dma-names = "rx", "tx", "rxu", "txu";
1223                                 };
1224                                 ssi4: ssi-4 {
1225                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1226                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1227                                         dma-names = "rx", "tx", "rxu", "txu";
1228                                 };
1229                                 ssi5: ssi-5 {
1230                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1231                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1232                                         dma-names = "rx", "tx", "rxu", "txu";
1233                                 };
1234                                 ssi6: ssi-6 {
1235                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1236                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1237                                         dma-names = "rx", "tx", "rxu", "txu";
1238                                 };
1239                                 ssi7: ssi-7 {
1240                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1241                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1242                                         dma-names = "rx", "tx", "rxu", "txu";
1243                                 };
1244                                 ssi8: ssi-8 {
1245                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1246                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1247                                         dma-names = "rx", "tx", "rxu", "txu";
1248                                 };
1249                                 ssi9: ssi-9 {
1250                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1251                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1252                                         dma-names = "rx", "tx", "rxu", "txu";
1253                                 };
1254                         };
1255                 };
1256
1257                 sata: sata@ee300000 {
1258                         compatible = "renesas,sata-r8a7795";
1259                         reg = <0 0xee300000 0 0x200000>;
1260                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1261                         clocks = <&cpg CPG_MOD 815>;
1262                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1263                         resets = <&cpg 815>;
1264                         status = "disabled";
1265                 };
1266
1267                 xhci0: usb@ee000000 {
1268                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1269                         reg = <0 0xee000000 0 0xc00>;
1270                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1271                         clocks = <&cpg CPG_MOD 328>;
1272                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1273                         resets = <&cpg 328>;
1274                         status = "disabled";
1275                 };
1276
1277                 xhci1: usb@ee0400000 {
1278                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1279                         reg = <0 0xee040000 0 0xc00>;
1280                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1281                         clocks = <&cpg CPG_MOD 327>;
1282                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1283                         resets = <&cpg 327>;
1284                         status = "disabled";
1285                 };
1286
1287                 usb_dmac0: dma-controller@e65a0000 {
1288                         compatible = "renesas,r8a7795-usb-dmac",
1289                                      "renesas,usb-dmac";
1290                         reg = <0 0xe65a0000 0 0x100>;
1291                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1292                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1293                         interrupt-names = "ch0", "ch1";
1294                         clocks = <&cpg CPG_MOD 330>;
1295                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1296                         resets = <&cpg 330>;
1297                         #dma-cells = <1>;
1298                         dma-channels = <2>;
1299                 };
1300
1301                 usb_dmac1: dma-controller@e65b0000 {
1302                         compatible = "renesas,r8a7795-usb-dmac",
1303                                      "renesas,usb-dmac";
1304                         reg = <0 0xe65b0000 0 0x100>;
1305                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1306                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1307                         interrupt-names = "ch0", "ch1";
1308                         clocks = <&cpg CPG_MOD 331>;
1309                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1310                         resets = <&cpg 331>;
1311                         #dma-cells = <1>;
1312                         dma-channels = <2>;
1313                 };
1314
1315                 sdhi0: sd@ee100000 {
1316                         compatible = "renesas,sdhi-r8a7795";
1317                         reg = <0 0xee100000 0 0x2000>;
1318                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1319                         clocks = <&cpg CPG_MOD 314>;
1320                         max-frequency = <200000000>;
1321                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1322                         resets = <&cpg 314>;
1323                         status = "disabled";
1324                 };
1325
1326                 sdhi1: sd@ee120000 {
1327                         compatible = "renesas,sdhi-r8a7795";
1328                         reg = <0 0xee120000 0 0x2000>;
1329                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1330                         clocks = <&cpg CPG_MOD 313>;
1331                         max-frequency = <200000000>;
1332                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1333                         resets = <&cpg 313>;
1334                         status = "disabled";
1335                 };
1336
1337                 sdhi2: sd@ee140000 {
1338                         compatible = "renesas,sdhi-r8a7795";
1339                         reg = <0 0xee140000 0 0x2000>;
1340                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1341                         clocks = <&cpg CPG_MOD 312>;
1342                         max-frequency = <200000000>;
1343                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1344                         resets = <&cpg 312>;
1345                         status = "disabled";
1346                 };
1347
1348                 sdhi3: sd@ee160000 {
1349                         compatible = "renesas,sdhi-r8a7795";
1350                         reg = <0 0xee160000 0 0x2000>;
1351                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1352                         clocks = <&cpg CPG_MOD 311>;
1353                         max-frequency = <200000000>;
1354                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1355                         resets = <&cpg 311>;
1356                         status = "disabled";
1357                 };
1358
1359                 usb2_phy0: usb-phy@ee080200 {
1360                         compatible = "renesas,usb2-phy-r8a7795",
1361                                      "renesas,rcar-gen3-usb2-phy";
1362                         reg = <0 0xee080200 0 0x700>;
1363                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1364                         clocks = <&cpg CPG_MOD 703>;
1365                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1366                         resets = <&cpg 703>;
1367                         #phy-cells = <0>;
1368                         status = "disabled";
1369                 };
1370
1371                 usb2_phy1: usb-phy@ee0a0200 {
1372                         compatible = "renesas,usb2-phy-r8a7795",
1373                                      "renesas,rcar-gen3-usb2-phy";
1374                         reg = <0 0xee0a0200 0 0x700>;
1375                         clocks = <&cpg CPG_MOD 702>;
1376                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1377                         resets = <&cpg 702>;
1378                         #phy-cells = <0>;
1379                         status = "disabled";
1380                 };
1381
1382                 usb2_phy2: usb-phy@ee0c0200 {
1383                         compatible = "renesas,usb2-phy-r8a7795",
1384                                      "renesas,rcar-gen3-usb2-phy";
1385                         reg = <0 0xee0c0200 0 0x700>;
1386                         clocks = <&cpg CPG_MOD 701>;
1387                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1388                         resets = <&cpg 701>;
1389                         #phy-cells = <0>;
1390                         status = "disabled";
1391                 };
1392
1393                 ehci0: usb@ee080100 {
1394                         compatible = "generic-ehci";
1395                         reg = <0 0xee080100 0 0x100>;
1396                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1397                         clocks = <&cpg CPG_MOD 703>;
1398                         phys = <&usb2_phy0>;
1399                         phy-names = "usb";
1400                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1401                         resets = <&cpg 703>;
1402                         status = "disabled";
1403                 };
1404
1405                 ehci1: usb@ee0a0100 {
1406                         compatible = "generic-ehci";
1407                         reg = <0 0xee0a0100 0 0x100>;
1408                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1409                         clocks = <&cpg CPG_MOD 702>;
1410                         phys = <&usb2_phy1>;
1411                         phy-names = "usb";
1412                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1413                         resets = <&cpg 702>;
1414                         status = "disabled";
1415                 };
1416
1417                 ehci2: usb@ee0c0100 {
1418                         compatible = "generic-ehci";
1419                         reg = <0 0xee0c0100 0 0x100>;
1420                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1421                         clocks = <&cpg CPG_MOD 701>;
1422                         phys = <&usb2_phy2>;
1423                         phy-names = "usb";
1424                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1425                         resets = <&cpg 701>;
1426                         status = "disabled";
1427                 };
1428
1429                 ohci0: usb@ee080000 {
1430                         compatible = "generic-ohci";
1431                         reg = <0 0xee080000 0 0x100>;
1432                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1433                         clocks = <&cpg CPG_MOD 703>;
1434                         phys = <&usb2_phy0>;
1435                         phy-names = "usb";
1436                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1437                         resets = <&cpg 703>;
1438                         status = "disabled";
1439                 };
1440
1441                 ohci1: usb@ee0a0000 {
1442                         compatible = "generic-ohci";
1443                         reg = <0 0xee0a0000 0 0x100>;
1444                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1445                         clocks = <&cpg CPG_MOD 702>;
1446                         phys = <&usb2_phy1>;
1447                         phy-names = "usb";
1448                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1449                         resets = <&cpg 702>;
1450                         status = "disabled";
1451                 };
1452
1453                 ohci2: usb@ee0c0000 {
1454                         compatible = "generic-ohci";
1455                         reg = <0 0xee0c0000 0 0x100>;
1456                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1457                         clocks = <&cpg CPG_MOD 701>;
1458                         phys = <&usb2_phy2>;
1459                         phy-names = "usb";
1460                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1461                         resets = <&cpg 701>;
1462                         status = "disabled";
1463                 };
1464
1465                 hsusb: usb@e6590000 {
1466                         compatible = "renesas,usbhs-r8a7795",
1467                                      "renesas,rcar-gen3-usbhs";
1468                         reg = <0 0xe6590000 0 0x100>;
1469                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1470                         clocks = <&cpg CPG_MOD 704>;
1471                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1472                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1473                         dma-names = "ch0", "ch1", "ch2", "ch3";
1474                         renesas,buswait = <11>;
1475                         phys = <&usb2_phy0>;
1476                         phy-names = "usb";
1477                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1478                         resets = <&cpg 704>;
1479                         status = "disabled";
1480                 };
1481
1482                 pciec0: pcie@fe000000 {
1483                         compatible = "renesas,pcie-r8a7795",
1484                                      "renesas,pcie-rcar-gen3";
1485                         reg = <0 0xfe000000 0 0x80000>;
1486                         #address-cells = <3>;
1487                         #size-cells = <2>;
1488                         bus-range = <0x00 0xff>;
1489                         device_type = "pci";
1490                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1491                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1492                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1493                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1494                         /* Map all possible DDR as inbound ranges */
1495                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1496                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1497                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1498                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1499                         #interrupt-cells = <1>;
1500                         interrupt-map-mask = <0 0 0 0>;
1501                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1502                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1503                         clock-names = "pcie", "pcie_bus";
1504                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1505                         resets = <&cpg 319>;
1506                         status = "disabled";
1507                 };
1508
1509                 pciec1: pcie@ee800000 {
1510                         compatible = "renesas,pcie-r8a7795",
1511                                      "renesas,pcie-rcar-gen3";
1512                         reg = <0 0xee800000 0 0x80000>;
1513                         #address-cells = <3>;
1514                         #size-cells = <2>;
1515                         bus-range = <0x00 0xff>;
1516                         device_type = "pci";
1517                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1518                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1519                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1520                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1521                         /* Map all possible DDR as inbound ranges */
1522                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1523                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1524                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1525                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1526                         #interrupt-cells = <1>;
1527                         interrupt-map-mask = <0 0 0 0>;
1528                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1529                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1530                         clock-names = "pcie", "pcie_bus";
1531                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1532                         resets = <&cpg 318>;
1533                         status = "disabled";
1534                 };
1535
1536                 vspbc: vsp@fe920000 {
1537                         compatible = "renesas,vsp2";
1538                         reg = <0 0xfe920000 0 0x8000>;
1539                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1540                         clocks = <&cpg CPG_MOD 624>;
1541                         power-domains = <&sysc R8A7795_PD_A3VP>;
1542                         resets = <&cpg 624>;
1543
1544                         renesas,fcp = <&fcpvb1>;
1545                 };
1546
1547                 fcpvb1: fcp@fe92f000 {
1548                         compatible = "renesas,fcpv";
1549                         reg = <0 0xfe92f000 0 0x200>;
1550                         clocks = <&cpg CPG_MOD 606>;
1551                         power-domains = <&sysc R8A7795_PD_A3VP>;
1552                         resets = <&cpg 606>;
1553                 };
1554
1555                 fcpf0: fcp@fe950000 {
1556                         compatible = "renesas,fcpf";
1557                         reg = <0 0xfe950000 0 0x200>;
1558                         clocks = <&cpg CPG_MOD 615>;
1559                         power-domains = <&sysc R8A7795_PD_A3VP>;
1560                         resets = <&cpg 615>;
1561                 };
1562
1563                 fcpf1: fcp@fe951000 {
1564                         compatible = "renesas,fcpf";
1565                         reg = <0 0xfe951000 0 0x200>;
1566                         clocks = <&cpg CPG_MOD 614>;
1567                         power-domains = <&sysc R8A7795_PD_A3VP>;
1568                         resets = <&cpg 614>;
1569                 };
1570
1571                 fcpf2: fcp@fe952000 {
1572                         compatible = "renesas,fcpf";
1573                         reg = <0 0xfe952000 0 0x200>;
1574                         clocks = <&cpg CPG_MOD 613>;
1575                         power-domains = <&sysc R8A7795_PD_A3VP>;
1576                         resets = <&cpg 613>;
1577                 };
1578
1579                 vspbd: vsp@fe960000 {
1580                         compatible = "renesas,vsp2";
1581                         reg = <0 0xfe960000 0 0x8000>;
1582                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1583                         clocks = <&cpg CPG_MOD 626>;
1584                         power-domains = <&sysc R8A7795_PD_A3VP>;
1585                         resets = <&cpg 626>;
1586
1587                         renesas,fcp = <&fcpvb0>;
1588                 };
1589
1590                 fcpvb0: fcp@fe96f000 {
1591                         compatible = "renesas,fcpv";
1592                         reg = <0 0xfe96f000 0 0x200>;
1593                         clocks = <&cpg CPG_MOD 607>;
1594                         power-domains = <&sysc R8A7795_PD_A3VP>;
1595                         resets = <&cpg 607>;
1596                 };
1597
1598                 vspi0: vsp@fe9a0000 {
1599                         compatible = "renesas,vsp2";
1600                         reg = <0 0xfe9a0000 0 0x8000>;
1601                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1602                         clocks = <&cpg CPG_MOD 631>;
1603                         power-domains = <&sysc R8A7795_PD_A3VP>;
1604                         resets = <&cpg 631>;
1605
1606                         renesas,fcp = <&fcpvi0>;
1607                 };
1608
1609                 fcpvi0: fcp@fe9af000 {
1610                         compatible = "renesas,fcpv";
1611                         reg = <0 0xfe9af000 0 0x200>;
1612                         clocks = <&cpg CPG_MOD 611>;
1613                         power-domains = <&sysc R8A7795_PD_A3VP>;
1614                         resets = <&cpg 611>;
1615                 };
1616
1617                 vspi1: vsp@fe9b0000 {
1618                         compatible = "renesas,vsp2";
1619                         reg = <0 0xfe9b0000 0 0x8000>;
1620                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1621                         clocks = <&cpg CPG_MOD 630>;
1622                         power-domains = <&sysc R8A7795_PD_A3VP>;
1623                         resets = <&cpg 630>;
1624
1625                         renesas,fcp = <&fcpvi1>;
1626                 };
1627
1628                 fcpvi1: fcp@fe9bf000 {
1629                         compatible = "renesas,fcpv";
1630                         reg = <0 0xfe9bf000 0 0x200>;
1631                         clocks = <&cpg CPG_MOD 610>;
1632                         power-domains = <&sysc R8A7795_PD_A3VP>;
1633                         resets = <&cpg 610>;
1634                 };
1635
1636                 vspi2: vsp@fe9c0000 {
1637                         compatible = "renesas,vsp2";
1638                         reg = <0 0xfe9c0000 0 0x8000>;
1639                         interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1640                         clocks = <&cpg CPG_MOD 629>;
1641                         power-domains = <&sysc R8A7795_PD_A3VP>;
1642                         resets = <&cpg 629>;
1643
1644                         renesas,fcp = <&fcpvi2>;
1645                 };
1646
1647                 fcpvi2: fcp@fe9cf000 {
1648                         compatible = "renesas,fcpv";
1649                         reg = <0 0xfe9cf000 0 0x200>;
1650                         clocks = <&cpg CPG_MOD 609>;
1651                         power-domains = <&sysc R8A7795_PD_A3VP>;
1652                         resets = <&cpg 609>;
1653                 };
1654
1655                 vspd0: vsp@fea20000 {
1656                         compatible = "renesas,vsp2";
1657                         reg = <0 0xfea20000 0 0x4000>;
1658                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1659                         clocks = <&cpg CPG_MOD 623>;
1660                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1661                         resets = <&cpg 623>;
1662
1663                         renesas,fcp = <&fcpvd0>;
1664                 };
1665
1666                 fcpvd0: fcp@fea27000 {
1667                         compatible = "renesas,fcpv";
1668                         reg = <0 0xfea27000 0 0x200>;
1669                         clocks = <&cpg CPG_MOD 603>;
1670                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1671                         resets = <&cpg 603>;
1672                 };
1673
1674                 vspd1: vsp@fea28000 {
1675                         compatible = "renesas,vsp2";
1676                         reg = <0 0xfea28000 0 0x4000>;
1677                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1678                         clocks = <&cpg CPG_MOD 622>;
1679                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1680                         resets = <&cpg 622>;
1681
1682                         renesas,fcp = <&fcpvd1>;
1683                 };
1684
1685                 fcpvd1: fcp@fea2f000 {
1686                         compatible = "renesas,fcpv";
1687                         reg = <0 0xfea2f000 0 0x200>;
1688                         clocks = <&cpg CPG_MOD 602>;
1689                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1690                         resets = <&cpg 602>;
1691                 };
1692
1693                 vspd2: vsp@fea30000 {
1694                         compatible = "renesas,vsp2";
1695                         reg = <0 0xfea30000 0 0x4000>;
1696                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1697                         clocks = <&cpg CPG_MOD 621>;
1698                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1699                         resets = <&cpg 621>;
1700
1701                         renesas,fcp = <&fcpvd2>;
1702                 };
1703
1704                 fcpvd2: fcp@fea37000 {
1705                         compatible = "renesas,fcpv";
1706                         reg = <0 0xfea37000 0 0x200>;
1707                         clocks = <&cpg CPG_MOD 601>;
1708                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1709                         resets = <&cpg 601>;
1710                 };
1711
1712                 vspd3: vsp@fea38000 {
1713                         compatible = "renesas,vsp2";
1714                         reg = <0 0xfea38000 0 0x4000>;
1715                         interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1716                         clocks = <&cpg CPG_MOD 620>;
1717                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1718                         resets = <&cpg 620>;
1719
1720                         renesas,fcp = <&fcpvd3>;
1721                 };
1722
1723                 fcpvd3: fcp@fea3f000 {
1724                         compatible = "renesas,fcpv";
1725                         reg = <0 0xfea3f000 0 0x200>;
1726                         clocks = <&cpg CPG_MOD 600>;
1727                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1728                         resets = <&cpg 600>;
1729                 };
1730
1731                 fdp1@fe940000 {
1732                         compatible = "renesas,fdp1";
1733                         reg = <0 0xfe940000 0 0x2400>;
1734                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1735                         clocks = <&cpg CPG_MOD 119>;
1736                         power-domains = <&sysc R8A7795_PD_A3VP>;
1737                         resets = <&cpg 119>;
1738                         renesas,fcp = <&fcpf0>;
1739                 };
1740
1741                 fdp1@fe944000 {
1742                         compatible = "renesas,fdp1";
1743                         reg = <0 0xfe944000 0 0x2400>;
1744                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1745                         clocks = <&cpg CPG_MOD 118>;
1746                         power-domains = <&sysc R8A7795_PD_A3VP>;
1747                         resets = <&cpg 118>;
1748                         renesas,fcp = <&fcpf1>;
1749                 };
1750
1751                 fdp1@fe948000 {
1752                         compatible = "renesas,fdp1";
1753                         reg = <0 0xfe948000 0 0x2400>;
1754                         interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1755                         clocks = <&cpg CPG_MOD 117>;
1756                         power-domains = <&sysc R8A7795_PD_A3VP>;
1757                         resets = <&cpg 117>;
1758                         renesas,fcp = <&fcpf2>;
1759                 };
1760
1761                 du: display@feb00000 {
1762                         compatible = "renesas,du-r8a7795";
1763                         reg = <0 0xfeb00000 0 0x80000>,
1764                               <0 0xfeb90000 0 0x14>;
1765                         reg-names = "du", "lvds.0";
1766                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1767                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1768                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1769                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1770                         clocks = <&cpg CPG_MOD 724>,
1771                                  <&cpg CPG_MOD 723>,
1772                                  <&cpg CPG_MOD 722>,
1773                                  <&cpg CPG_MOD 721>,
1774                                  <&cpg CPG_MOD 727>;
1775                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1776                         status = "disabled";
1777
1778                         vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1779
1780                         ports {
1781                                 #address-cells = <1>;
1782                                 #size-cells = <0>;
1783
1784                                 port@0 {
1785                                         reg = <0>;
1786                                         du_out_rgb: endpoint {
1787                                         };
1788                                 };
1789                                 port@1 {
1790                                         reg = <1>;
1791                                         du_out_hdmi0: endpoint {
1792                                         };
1793                                 };
1794                                 port@2 {
1795                                         reg = <2>;
1796                                         du_out_hdmi1: endpoint {
1797                                         };
1798                                 };
1799                                 port@3 {
1800                                         reg = <3>;
1801                                         du_out_lvds0: endpoint {
1802                                         };
1803                                 };
1804                         };
1805                 };
1806
1807                 tsc: thermal@e6198000 {
1808                         compatible = "renesas,r8a7795-thermal";
1809                         reg = <0 0xe6198000 0 0x68>,
1810                               <0 0xe61a0000 0 0x5c>,
1811                               <0 0xe61a8000 0 0x5c>;
1812                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1813                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1814                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1815                         clocks = <&cpg CPG_MOD 522>;
1816                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1817                         resets = <&cpg 522>;
1818                         #thermal-sensor-cells = <1>;
1819                         status = "okay";
1820                 };
1821
1822                 thermal-zones {
1823                         sensor_thermal1: sensor-thermal1 {
1824                                 polling-delay-passive = <250>;
1825                                 polling-delay = <1000>;
1826                                 thermal-sensors = <&tsc 0>;
1827
1828                                 trips {
1829                                         sensor1_crit: sensor1-crit {
1830                                                 temperature = <120000>;
1831                                                 hysteresis = <2000>;
1832                                                 type = "critical";
1833                                         };
1834                                 };
1835                         };
1836
1837                         sensor_thermal2: sensor-thermal2 {
1838                                 polling-delay-passive = <250>;
1839                                 polling-delay = <1000>;
1840                                 thermal-sensors = <&tsc 1>;
1841
1842                                 trips {
1843                                         sensor2_crit: sensor2-crit {
1844                                                 temperature = <120000>;
1845                                                 hysteresis = <2000>;
1846                                                 type = "critical";
1847                                         };
1848                                 };
1849                         };
1850
1851                         sensor_thermal3: sensor-thermal3 {
1852                                 polling-delay-passive = <250>;
1853                                 polling-delay = <1000>;
1854                                 thermal-sensors = <&tsc 2>;
1855
1856                                 trips {
1857                                         sensor3_crit: sensor3-crit {
1858                                                 temperature = <120000>;
1859                                                 hysteresis = <2000>;
1860                                                 type = "critical";
1861                                         };
1862                                 };
1863                         };
1864                 };
1865         };
1866 };