git.sur5r.net Git - u-boot/blob - arch/arm/dts/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         psci {
  32                 compatible = "arm,psci-1.0", "arm,psci-0.2";
  33                 method = "smc";
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 a57_0: cpu@0 {
  41                         compatible = "arm,cortex-a57", "arm,armv8";
  42                         reg = <0x0>;
  43                         device_type = "cpu";
  44                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  45                         next-level-cache = <&L2_CA57>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a57_1: cpu@1 {
  50                         compatible = "arm,cortex-a57","arm,armv8";
  51                         reg = <0x1>;
  52                         device_type = "cpu";
  53                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  54                         next-level-cache = <&L2_CA57>;
  55                         enable-method = "psci";
  56                 };
  57
  58                 a57_2: cpu@2 {
  59                         compatible = "arm,cortex-a57","arm,armv8";
  60                         reg = <0x2>;
  61                         device_type = "cpu";
  62                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  63                         next-level-cache = <&L2_CA57>;
  64                         enable-method = "psci";
  65                 };
  66
  67                 a57_3: cpu@3 {
  68                         compatible = "arm,cortex-a57","arm,armv8";
  69                         reg = <0x3>;
  70                         device_type = "cpu";
  71                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  72                         next-level-cache = <&L2_CA57>;
  73                         enable-method = "psci";
  74                 };
  75
  76                 a53_0: cpu@100 {
  77                         compatible = "arm,cortex-a53", "arm,armv8";
  78                         reg = <0x100>;
  79                         device_type = "cpu";
  80                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
  81                         next-level-cache = <&L2_CA53>;
  82                         enable-method = "psci";
  83                 };
  84
  85                 a53_1: cpu@101 {
  86                         compatible = "arm,cortex-a53","arm,armv8";
  87                         reg = <0x101>;
  88                         device_type = "cpu";
  89                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
  90                         next-level-cache = <&L2_CA53>;
  91                         enable-method = "psci";
  92                 };
  93
  94                 a53_2: cpu@102 {
  95                         compatible = "arm,cortex-a53","arm,armv8";
  96                         reg = <0x102>;
  97                         device_type = "cpu";
  98                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
  99                         next-level-cache = <&L2_CA53>;
 100                         enable-method = "psci";
 101                 };
 102
 103                 a53_3: cpu@103 {
 104                         compatible = "arm,cortex-a53","arm,armv8";
 105                         reg = <0x103>;
 106                         device_type = "cpu";
 107                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 108                         next-level-cache = <&L2_CA53>;
 109                         enable-method = "psci";
 110                 };
 111
 112                 L2_CA57: cache-controller-0 {
 113                         compatible = "cache";
 114                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 115                         cache-unified;
 116                         cache-level = <2>;
 117                 };
 118
 119                 L2_CA53: cache-controller-1 {
 120                         compatible = "cache";
 121                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 122                         cache-unified;
 123                         cache-level = <2>;
 124                 };
 125         };
 126
 127         extal_clk: extal {
 128                 compatible = "fixed-clock";
 129                 #clock-cells = <0>;
 130                 /* This value must be overridden by the board */
 131                 clock-frequency = <0>;
 132                 u-boot,dm-pre-reloc;
 133         };
 134
 135         extalr_clk: extalr {
 136                 compatible = "fixed-clock";
 137                 #clock-cells = <0>;
 138                 /* This value must be overridden by the board */
 139                 clock-frequency = <0>;
 140                 u-boot,dm-pre-reloc;
 141         };
 142
 143         /*
 144          * The external audio clocks are configured as 0 Hz fixed frequency
 145          * clocks by default.
 146          * Boards that provide audio clocks should override them.
 147          */
 148         audio_clk_a: audio_clk_a {
 149                 compatible = "fixed-clock";
 150                 #clock-cells = <0>;
 151                 clock-frequency = <0>;
 152         };
 153
 154         audio_clk_b: audio_clk_b {
 155                 compatible = "fixed-clock";
 156                 #clock-cells = <0>;
 157                 clock-frequency = <0>;
 158         };
 159
 160         audio_clk_c: audio_clk_c {
 161                 compatible = "fixed-clock";
 162                 #clock-cells = <0>;
 163                 clock-frequency = <0>;
 164         };
 165
 166         /* External CAN clock - to be overridden by boards that provide it */
 167         can_clk: can {
 168                 compatible = "fixed-clock";
 169                 #clock-cells = <0>;
 170                 clock-frequency = <0>;
 171         };
 172
 173         /* External SCIF clock - to be overridden by boards that provide it */
 174         scif_clk: scif {
 175                 compatible = "fixed-clock";
 176                 #clock-cells = <0>;
 177                 clock-frequency = <0>;
 178         };
 179
 180         /* External PCIe clock - can be overridden by the board */
 181         pcie_bus_clk: pcie_bus {
 182                 compatible = "fixed-clock";
 183                 #clock-cells = <0>;
 184                 clock-frequency = <0>;
 185         };
 186
 187         soc {
 188                 compatible = "simple-bus";
 189                 interrupt-parent = <&gic>;
 190
 191                 #address-cells = <2>;
 192                 #size-cells = <2>;
 193                 ranges;
 194                 u-boot,dm-pre-reloc;
 195
 196                 gic: interrupt-controller@f1010000 {
 197                         compatible = "arm,gic-400";
 198                         #interrupt-cells = <3>;
 199                         #address-cells = <0>;
 200                         interrupt-controller;
 201                         reg = <0x0 0xf1010000 0 0x1000>,
 202                               <0x0 0xf1020000 0 0x20000>,
 203                               <0x0 0xf1040000 0 0x20000>,
 204                               <0x0 0xf1060000 0 0x20000>;
 205                         interrupts = <GIC_PPI 9
 206                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 207                         clocks = <&cpg CPG_MOD 408>;
 208                         clock-names = "clk";
 209                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 210                         resets = <&cpg 408>;
 211                 };
 212
 213                 wdt0: watchdog@e6020000 {
 214                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 215                         reg = <0 0xe6020000 0 0x0c>;
 216                         clocks = <&cpg CPG_MOD 402>;
 217                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 218                         resets = <&cpg 402>;
 219                         status = "disabled";
 220                 };
 221
 222                 gpio0: gpio@e6050000 {
 223                         compatible = "renesas,gpio-r8a7795",
 224                                      "renesas,gpio-rcar";
 225                         reg = <0 0xe6050000 0 0x50>;
 226                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 227                         #gpio-cells = <2>;
 228                         gpio-controller;
 229                         gpio-ranges = <&pfc 0 0 16>;
 230                         #interrupt-cells = <2>;
 231                         interrupt-controller;
 232                         clocks = <&cpg CPG_MOD 912>;
 233                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 234                         resets = <&cpg 912>;
 235                 };
 236
 237                 gpio1: gpio@e6051000 {
 238                         compatible = "renesas,gpio-r8a7795",
 239                                      "renesas,gpio-rcar";
 240                         reg = <0 0xe6051000 0 0x50>;
 241                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 242                         #gpio-cells = <2>;
 243                         gpio-controller;
 244                         gpio-ranges = <&pfc 0 32 28>;
 245                         #interrupt-cells = <2>;
 246                         interrupt-controller;
 247                         clocks = <&cpg CPG_MOD 911>;
 248                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 249                         resets = <&cpg 911>;
 250                 };
 251
 252                 gpio2: gpio@e6052000 {
 253                         compatible = "renesas,gpio-r8a7795",
 254                                      "renesas,gpio-rcar";
 255                         reg = <0 0xe6052000 0 0x50>;
 256                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 257                         #gpio-cells = <2>;
 258                         gpio-controller;
 259                         gpio-ranges = <&pfc 0 64 15>;
 260                         #interrupt-cells = <2>;
 261                         interrupt-controller;
 262                         clocks = <&cpg CPG_MOD 910>;
 263                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 264                         resets = <&cpg 910>;
 265                 };
 266
 267                 gpio3: gpio@e6053000 {
 268                         compatible = "renesas,gpio-r8a7795",
 269                                      "renesas,gpio-rcar";
 270                         reg = <0 0xe6053000 0 0x50>;
 271                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 272                         #gpio-cells = <2>;
 273                         gpio-controller;
 274                         gpio-ranges = <&pfc 0 96 16>;
 275                         #interrupt-cells = <2>;
 276                         interrupt-controller;
 277                         clocks = <&cpg CPG_MOD 909>;
 278                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 279                         resets = <&cpg 909>;
 280                 };
 281
 282                 gpio4: gpio@e6054000 {
 283                         compatible = "renesas,gpio-r8a7795",
 284                                      "renesas,gpio-rcar";
 285                         reg = <0 0xe6054000 0 0x50>;
 286                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 287                         #gpio-cells = <2>;
 288                         gpio-controller;
 289                         gpio-ranges = <&pfc 0 128 18>;
 290                         #interrupt-cells = <2>;
 291                         interrupt-controller;
 292                         clocks = <&cpg CPG_MOD 908>;
 293                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 294                         resets = <&cpg 908>;
 295                 };
 296
 297                 gpio5: gpio@e6055000 {
 298                         compatible = "renesas,gpio-r8a7795",
 299                                      "renesas,gpio-rcar";
 300                         reg = <0 0xe6055000 0 0x50>;
 301                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 302                         #gpio-cells = <2>;
 303                         gpio-controller;
 304                         gpio-ranges = <&pfc 0 160 26>;
 305                         #interrupt-cells = <2>;
 306                         interrupt-controller;
 307                         clocks = <&cpg CPG_MOD 907>;
 308                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 309                         resets = <&cpg 907>;
 310                 };
 311
 312                 gpio6: gpio@e6055400 {
 313                         compatible = "renesas,gpio-r8a7795",
 314                                      "renesas,gpio-rcar";
 315                         reg = <0 0xe6055400 0 0x50>;
 316                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 317                         #gpio-cells = <2>;
 318                         gpio-controller;
 319                         gpio-ranges = <&pfc 0 192 32>;
 320                         #interrupt-cells = <2>;
 321                         interrupt-controller;
 322                         clocks = <&cpg CPG_MOD 906>;
 323                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 324                         resets = <&cpg 906>;
 325                 };
 326
 327                 gpio7: gpio@e6055800 {
 328                         compatible = "renesas,gpio-r8a7795",
 329                                      "renesas,gpio-rcar";
 330                         reg = <0 0xe6055800 0 0x50>;
 331                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 332                         #gpio-cells = <2>;
 333                         gpio-controller;
 334                         gpio-ranges = <&pfc 0 224 4>;
 335                         #interrupt-cells = <2>;
 336                         interrupt-controller;
 337                         clocks = <&cpg CPG_MOD 905>;
 338                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 339                         resets = <&cpg 905>;
 340                 };
 341
 342                 pmu_a57 {
 343                         compatible = "arm,cortex-a57-pmu";
 344                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 345                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 346                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 347                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 348                         interrupt-affinity = <&a57_0>,
 349                                              <&a57_1>,
 350                                              <&a57_2>,
 351                                              <&a57_3>;
 352                 };
 353
 354                 pmu_a53 {
 355                         compatible = "arm,cortex-a53-pmu";
 356                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 357                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 358                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 359                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 360                         interrupt-affinity = <&a53_0>,
 361                                              <&a53_1>,
 362                                              <&a53_2>,
 363                                              <&a53_3>;
 364                 };
 365
 366                 timer {
 367                         compatible = "arm,armv8-timer";
 368                         interrupts = <GIC_PPI 13
 369                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 370                                      <GIC_PPI 14
 371                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 372                                      <GIC_PPI 11
 373                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 374                                      <GIC_PPI 10
 375                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 376                 };
 377
 378                 cpg: clock-controller@e6150000 {
 379                         compatible = "renesas,r8a7795-cpg-mssr";
 380                         reg = <0 0xe6150000 0 0x1000>;
 381                         clocks = <&extal_clk>, <&extalr_clk>;
 382                         clock-names = "extal", "extalr";
 383                         #clock-cells = <2>;
 384                         #power-domain-cells = <0>;
 385                         #reset-cells = <1>;
 386                         u-boot,dm-pre-reloc;
 387                 };
 388
 389                 rst: reset-controller@e6160000 {
 390                         compatible = "renesas,r8a7795-rst";
 391                         reg = <0 0xe6160000 0 0x0200>;
 392                 };
 393
 394                 prr: chipid@fff00044 {
 395                         compatible = "renesas,prr";
 396                         reg = <0 0xfff00044 0 4>;
 397                 };
 398
 399                 sysc: system-controller@e6180000 {
 400                         compatible = "renesas,r8a7795-sysc";
 401                         reg = <0 0xe6180000 0 0x0400>;
 402                         #power-domain-cells = <1>;
 403                 };
 404
 405                 pfc: pfc@e6060000 {
 406                         compatible = "renesas,pfc-r8a7795";
 407                         reg = <0 0xe6060000 0 0x50c>;
 408                 };
 409
 410                 intc_ex: interrupt-controller@e61c0000 {
 411                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 412                         #interrupt-cells = <2>;
 413                         interrupt-controller;
 414                         reg = <0 0xe61c0000 0 0x200>;
 415                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 416                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 417                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 418                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 419                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 420                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 421                         clocks = <&cpg CPG_MOD 407>;
 422                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 423                         resets = <&cpg 407>;
 424                 };
 425
 426                 dmac0: dma-controller@e6700000 {
 427                         compatible = "renesas,dmac-r8a7795",
 428                                      "renesas,rcar-dmac";
 429                         reg = <0 0xe6700000 0 0x10000>;
 430                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 438                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 439                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 440                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 441                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 442                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 443                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 444                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 445                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 446                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 447                         interrupt-names = "error",
 448                                         "ch0", "ch1", "ch2", "ch3",
 449                                         "ch4", "ch5", "ch6", "ch7",
 450                                         "ch8", "ch9", "ch10", "ch11",
 451                                         "ch12", "ch13", "ch14", "ch15";
 452                         clocks = <&cpg CPG_MOD 219>;
 453                         clock-names = "fck";
 454                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 455                         resets = <&cpg 219>;
 456                         #dma-cells = <1>;
 457                         dma-channels = <16>;
 458                 };
 459
 460                 dmac1: dma-controller@e7300000 {
 461                         compatible = "renesas,dmac-r8a7795",
 462                                      "renesas,rcar-dmac";
 463                         reg = <0 0xe7300000 0 0x10000>;
 464                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 471                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 472                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 473                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 475                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 476                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 477                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 478                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 479                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 480                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 481                         interrupt-names = "error",
 482                                         "ch0", "ch1", "ch2", "ch3",
 483                                         "ch4", "ch5", "ch6", "ch7",
 484                                         "ch8", "ch9", "ch10", "ch11",
 485                                         "ch12", "ch13", "ch14", "ch15";
 486                         clocks = <&cpg CPG_MOD 218>;
 487                         clock-names = "fck";
 488                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 489                         resets = <&cpg 218>;
 490                         #dma-cells = <1>;
 491                         dma-channels = <16>;
 492                 };
 493
 494                 dmac2: dma-controller@e7310000 {
 495                         compatible = "renesas,dmac-r8a7795",
 496                                      "renesas,rcar-dmac";
 497                         reg = <0 0xe7310000 0 0x10000>;
 498                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 499                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 501                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 502                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 503                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 504                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 505                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 506                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 507                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 508                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 509                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 510                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 511                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 512                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 513                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 514                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 515                         interrupt-names = "error",
 516                                         "ch0", "ch1", "ch2", "ch3",
 517                                         "ch4", "ch5", "ch6", "ch7",
 518                                         "ch8", "ch9", "ch10", "ch11",
 519                                         "ch12", "ch13", "ch14", "ch15";
 520                         clocks = <&cpg CPG_MOD 217>;
 521                         clock-names = "fck";
 522                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 523                         resets = <&cpg 217>;
 524                         #dma-cells = <1>;
 525                         dma-channels = <16>;
 526                 };
 527
 528                 audma0: dma-controller@ec700000 {
 529                         compatible = "renesas,dmac-r8a7795",
 530                                      "renesas,rcar-dmac";
 531                         reg = <0 0xec700000 0 0x10000>;
 532                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 533                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 534                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 535                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 536                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 537                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 538                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 539                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 540                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 541                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 542                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 543                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 544                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 545                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 546                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 547                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 548                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 549                         interrupt-names = "error",
 550                                         "ch0", "ch1", "ch2", "ch3",
 551                                         "ch4", "ch5", "ch6", "ch7",
 552                                         "ch8", "ch9", "ch10", "ch11",
 553                                         "ch12", "ch13", "ch14", "ch15";
 554                         clocks = <&cpg CPG_MOD 502>;
 555                         clock-names = "fck";
 556                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 557                         resets = <&cpg 502>;
 558                         #dma-cells = <1>;
 559                         dma-channels = <16>;
 560                 };
 561
 562                 audma1: dma-controller@ec720000 {
 563                         compatible = "renesas,dmac-r8a7795",
 564                                      "renesas,rcar-dmac";
 565                         reg = <0 0xec720000 0 0x10000>;
 566                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 567                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 570                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 571                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 572                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 573                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 574                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 575                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 576                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 577                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 578                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 579                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 580                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 581                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 582                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 583                         interrupt-names = "error",
 584                                         "ch0", "ch1", "ch2", "ch3",
 585                                         "ch4", "ch5", "ch6", "ch7",
 586                                         "ch8", "ch9", "ch10", "ch11",
 587                                         "ch12", "ch13", "ch14", "ch15";
 588                         clocks = <&cpg CPG_MOD 501>;
 589                         clock-names = "fck";
 590                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 591                         resets = <&cpg 501>;
 592                         #dma-cells = <1>;
 593                         dma-channels = <16>;
 594                 };
 595
 596                 avb: ethernet@e6800000 {
 597                         compatible = "renesas,etheravb-r8a7795",
 598                                      "renesas,etheravb-rcar-gen3";
 599                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 600                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 601                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 602                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 603                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 604                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 608                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 611                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 614                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 615                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 616                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 617                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 620                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 621                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 622                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 623                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 624                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 625                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 626                                           "ch4", "ch5", "ch6", "ch7",
 627                                           "ch8", "ch9", "ch10", "ch11",
 628                                           "ch12", "ch13", "ch14", "ch15",
 629                                           "ch16", "ch17", "ch18", "ch19",
 630                                           "ch20", "ch21", "ch22", "ch23",
 631                                           "ch24";
 632                         clocks = <&cpg CPG_MOD 812>;
 633                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 634                         resets = <&cpg 812>;
 635                         phy-mode = "rgmii-txid";
 636                         #address-cells = <1>;
 637                         #size-cells = <0>;
 638                         status = "disabled";
 639                 };
 640
 641                 can0: can@e6c30000 {
 642                         compatible = "renesas,can-r8a7795",
 643                                      "renesas,rcar-gen3-can";
 644                         reg = <0 0xe6c30000 0 0x1000>;
 645                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 646                         clocks = <&cpg CPG_MOD 916>,
 647                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 648                                <&can_clk>;
 649                         clock-names = "clkp1", "clkp2", "can_clk";
 650                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 651                         assigned-clock-rates = <40000000>;
 652                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 653                         resets = <&cpg 916>;
 654                         status = "disabled";
 655                 };
 656
 657                 can1: can@e6c38000 {
 658                         compatible = "renesas,can-r8a7795",
 659                                      "renesas,rcar-gen3-can";
 660                         reg = <0 0xe6c38000 0 0x1000>;
 661                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 662                         clocks = <&cpg CPG_MOD 915>,
 663                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 664                                <&can_clk>;
 665                         clock-names = "clkp1", "clkp2", "can_clk";
 666                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 667                         assigned-clock-rates = <40000000>;
 668                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 669                         resets = <&cpg 915>;
 670                         status = "disabled";
 671                 };
 672
 673                 canfd: can@e66c0000 {
 674                         compatible = "renesas,r8a7795-canfd",
 675                                      "renesas,rcar-gen3-canfd";
 676                         reg = <0 0xe66c0000 0 0x8000>;
 677                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 678                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 679                         clocks = <&cpg CPG_MOD 914>,
 680                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 681                                <&can_clk>;
 682                         clock-names = "fck", "canfd", "can_clk";
 683                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 684                         assigned-clock-rates = <40000000>;
 685                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 686                         resets = <&cpg 914>;
 687                         status = "disabled";
 688
 689                         channel0 {
 690                                 status = "disabled";
 691                         };
 692
 693                         channel1 {
 694                                 status = "disabled";
 695                         };
 696                 };
 697
 698                 hscif0: serial@e6540000 {
 699                         compatible = "renesas,hscif-r8a7795",
 700                                      "renesas,rcar-gen3-hscif",
 701                                      "renesas,hscif";
 702                         reg = <0 0xe6540000 0 96>;
 703                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 704                         clocks = <&cpg CPG_MOD 520>,
 705                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 706                                  <&scif_clk>;
 707                         clock-names = "fck", "brg_int", "scif_clk";
 708                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 709                         dma-names = "tx", "rx";
 710                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 711                         resets = <&cpg 520>;
 712                         status = "disabled";
 713                 };
 714
 715                 hscif1: serial@e6550000 {
 716                         compatible = "renesas,hscif-r8a7795",
 717                                      "renesas,rcar-gen3-hscif",
 718                                      "renesas,hscif";
 719                         reg = <0 0xe6550000 0 96>;
 720                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 721                         clocks = <&cpg CPG_MOD 519>,
 722                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 723                                  <&scif_clk>;
 724                         clock-names = "fck", "brg_int", "scif_clk";
 725                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 726                         dma-names = "tx", "rx";
 727                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 728                         resets = <&cpg 519>;
 729                         status = "disabled";
 730                 };
 731
 732                 hscif2: serial@e6560000 {
 733                         compatible = "renesas,hscif-r8a7795",
 734                                      "renesas,rcar-gen3-hscif",
 735                                      "renesas,hscif";
 736                         reg = <0 0xe6560000 0 96>;
 737                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 738                         clocks = <&cpg CPG_MOD 518>,
 739                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 740                                  <&scif_clk>;
 741                         clock-names = "fck", "brg_int", "scif_clk";
 742                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 743                         dma-names = "tx", "rx";
 744                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 745                         resets = <&cpg 518>;
 746                         status = "disabled";
 747                 };
 748
 749                 hscif3: serial@e66a0000 {
 750                         compatible = "renesas,hscif-r8a7795",
 751                                      "renesas,rcar-gen3-hscif",
 752                                      "renesas,hscif";
 753                         reg = <0 0xe66a0000 0 96>;
 754                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 755                         clocks = <&cpg CPG_MOD 517>,
 756                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 757                                  <&scif_clk>;
 758                         clock-names = "fck", "brg_int", "scif_clk";
 759                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 760                         dma-names = "tx", "rx";
 761                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 762                         resets = <&cpg 517>;
 763                         status = "disabled";
 764                 };
 765
 766                 hscif4: serial@e66b0000 {
 767                         compatible = "renesas,hscif-r8a7795",
 768                                      "renesas,rcar-gen3-hscif",
 769                                      "renesas,hscif";
 770                         reg = <0 0xe66b0000 0 96>;
 771                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 772                         clocks = <&cpg CPG_MOD 516>,
 773                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 774                                  <&scif_clk>;
 775                         clock-names = "fck", "brg_int", "scif_clk";
 776                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 777                         dma-names = "tx", "rx";
 778                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 779                         resets = <&cpg 516>;
 780                         status = "disabled";
 781                 };
 782
 783                 scif0: serial@e6e60000 {
 784                         compatible = "renesas,scif-r8a7795",
 785                                      "renesas,rcar-gen3-scif", "renesas,scif";
 786                         reg = <0 0xe6e60000 0 64>;
 787                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 788                         clocks = <&cpg CPG_MOD 207>,
 789                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 790                                  <&scif_clk>;
 791                         clock-names = "fck", "brg_int", "scif_clk";
 792                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 793                         dma-names = "tx", "rx";
 794                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 795                         resets = <&cpg 207>;
 796                         status = "disabled";
 797                 };
 798
 799                 scif1: serial@e6e68000 {
 800                         compatible = "renesas,scif-r8a7795",
 801                                      "renesas,rcar-gen3-scif", "renesas,scif";
 802                         reg = <0 0xe6e68000 0 64>;
 803                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 804                         clocks = <&cpg CPG_MOD 206>,
 805                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 806                                  <&scif_clk>;
 807                         clock-names = "fck", "brg_int", "scif_clk";
 808                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 809                         dma-names = "tx", "rx";
 810                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 811                         resets = <&cpg 206>;
 812                         status = "disabled";
 813                 };
 814
 815                 scif2: serial@e6e88000 {
 816                         compatible = "renesas,scif-r8a7795",
 817                                      "renesas,rcar-gen3-scif", "renesas,scif";
 818                         reg = <0 0xe6e88000 0 64>;
 819                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 820                         clocks = <&cpg CPG_MOD 310>,
 821                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 822                                  <&scif_clk>;
 823                         clock-names = "fck", "brg_int", "scif_clk";
 824                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 825                         dma-names = "tx", "rx";
 826                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 827                         resets = <&cpg 310>;
 828                         status = "disabled";
 829                 };
 830
 831                 scif3: serial@e6c50000 {
 832                         compatible = "renesas,scif-r8a7795",
 833                                      "renesas,rcar-gen3-scif", "renesas,scif";
 834                         reg = <0 0xe6c50000 0 64>;
 835                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 836                         clocks = <&cpg CPG_MOD 204>,
 837                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 838                                  <&scif_clk>;
 839                         clock-names = "fck", "brg_int", "scif_clk";
 840                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 841                         dma-names = "tx", "rx";
 842                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 843                         resets = <&cpg 204>;
 844                         status = "disabled";
 845                 };
 846
 847                 scif4: serial@e6c40000 {
 848                         compatible = "renesas,scif-r8a7795",
 849                                      "renesas,rcar-gen3-scif", "renesas,scif";
 850                         reg = <0 0xe6c40000 0 64>;
 851                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 852                         clocks = <&cpg CPG_MOD 203>,
 853                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 854                                  <&scif_clk>;
 855                         clock-names = "fck", "brg_int", "scif_clk";
 856                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 857                         dma-names = "tx", "rx";
 858                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 859                         resets = <&cpg 203>;
 860                         status = "disabled";
 861                 };
 862
 863                 scif5: serial@e6f30000 {
 864                         compatible = "renesas,scif-r8a7795",
 865                                      "renesas,rcar-gen3-scif", "renesas,scif";
 866                         reg = <0 0xe6f30000 0 64>;
 867                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 868                         clocks = <&cpg CPG_MOD 202>,
 869                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 870                                  <&scif_clk>;
 871                         clock-names = "fck", "brg_int", "scif_clk";
 872                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 873                         dma-names = "tx", "rx";
 874                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 875                         resets = <&cpg 202>;
 876                         status = "disabled";
 877                 };
 878
 879                 i2c_dvfs: i2c@e60b0000 {
 880                         #address-cells = <1>;
 881                         #size-cells = <0>;
 882                         compatible = "renesas,iic-r8a7795",
 883                                      "renesas,rcar-gen3-iic",
 884                                      "renesas,rmobile-iic";
 885                         reg = <0 0xe60b0000 0 0x425>;
 886                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 887                         clocks = <&cpg CPG_MOD 926>;
 888                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 889                         resets = <&cpg 926>;
 890                         status = "disabled";
 891                 };
 892
 893                 i2c0: i2c@e6500000 {
 894                         #address-cells = <1>;
 895                         #size-cells = <0>;
 896                         compatible = "renesas,i2c-r8a7795",
 897                                      "renesas,rcar-gen3-i2c";
 898                         reg = <0 0xe6500000 0 0x40>;
 899                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 900                         clocks = <&cpg CPG_MOD 931>;
 901                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 902                         resets = <&cpg 931>;
 903                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 904                         dma-names = "tx", "rx";
 905                         i2c-scl-internal-delay-ns = <110>;
 906                         status = "disabled";
 907                 };
 908
 909                 i2c1: i2c@e6508000 {
 910                         #address-cells = <1>;
 911                         #size-cells = <0>;
 912                         compatible = "renesas,i2c-r8a7795",
 913                                      "renesas,rcar-gen3-i2c";
 914                         reg = <0 0xe6508000 0 0x40>;
 915                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 916                         clocks = <&cpg CPG_MOD 930>;
 917                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 918                         resets = <&cpg 930>;
 919                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 920                         dma-names = "tx", "rx";
 921                         i2c-scl-internal-delay-ns = <6>;
 922                         status = "disabled";
 923                 };
 924
 925                 i2c2: i2c@e6510000 {
 926                         #address-cells = <1>;
 927                         #size-cells = <0>;
 928                         compatible = "renesas,i2c-r8a7795",
 929                                      "renesas,rcar-gen3-i2c";
 930                         reg = <0 0xe6510000 0 0x40>;
 931                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 932                         clocks = <&cpg CPG_MOD 929>;
 933                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 934                         resets = <&cpg 929>;
 935                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 936                         dma-names = "tx", "rx";
 937                         i2c-scl-internal-delay-ns = <6>;
 938                         status = "disabled";
 939                 };
 940
 941                 i2c3: i2c@e66d0000 {
 942                         #address-cells = <1>;
 943                         #size-cells = <0>;
 944                         compatible = "renesas,i2c-r8a7795",
 945                                      "renesas,rcar-gen3-i2c";
 946                         reg = <0 0xe66d0000 0 0x40>;
 947                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 948                         clocks = <&cpg CPG_MOD 928>;
 949                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 950                         resets = <&cpg 928>;
 951                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 952                         dma-names = "tx", "rx";
 953                         i2c-scl-internal-delay-ns = <110>;
 954                         status = "disabled";
 955                 };
 956
 957                 i2c4: i2c@e66d8000 {
 958                         #address-cells = <1>;
 959                         #size-cells = <0>;
 960                         compatible = "renesas,i2c-r8a7795",
 961                                      "renesas,rcar-gen3-i2c";
 962                         reg = <0 0xe66d8000 0 0x40>;
 963                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 964                         clocks = <&cpg CPG_MOD 927>;
 965                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 966                         resets = <&cpg 927>;
 967                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 968                         dma-names = "tx", "rx";
 969                         i2c-scl-internal-delay-ns = <110>;
 970                         status = "disabled";
 971                 };
 972
 973                 i2c5: i2c@e66e0000 {
 974                         #address-cells = <1>;
 975                         #size-cells = <0>;
 976                         compatible = "renesas,i2c-r8a7795",
 977                                      "renesas,rcar-gen3-i2c";
 978                         reg = <0 0xe66e0000 0 0x40>;
 979                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 980                         clocks = <&cpg CPG_MOD 919>;
 981                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 982                         resets = <&cpg 919>;
 983                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 984                         dma-names = "tx", "rx";
 985                         i2c-scl-internal-delay-ns = <110>;
 986                         status = "disabled";
 987                 };
 988
 989                 i2c6: i2c@e66e8000 {
 990                         #address-cells = <1>;
 991                         #size-cells = <0>;
 992                         compatible = "renesas,i2c-r8a7795",
 993                                      "renesas,rcar-gen3-i2c";
 994                         reg = <0 0xe66e8000 0 0x40>;
 995                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 996                         clocks = <&cpg CPG_MOD 918>;
 997                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 998                         resets = <&cpg 918>;
 999                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
1000                         dma-names = "tx", "rx";
1001                         i2c-scl-internal-delay-ns = <6>;
1002                         status = "disabled";
1003                 };
1004
1005                 pwm0: pwm@e6e30000 {
1006                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1007                         reg = <0 0xe6e30000 0 0x8>;
1008                         clocks = <&cpg CPG_MOD 523>;
1009                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1010                         resets = <&cpg 523>;
1011                         #pwm-cells = <2>;
1012                         status = "disabled";
1013                 };
1014
1015                 pwm1: pwm@e6e31000 {
1016                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1017                         reg = <0 0xe6e31000 0 0x8>;
1018                         clocks = <&cpg CPG_MOD 523>;
1019                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1020                         resets = <&cpg 523>;
1021                         #pwm-cells = <2>;
1022                         status = "disabled";
1023                 };
1024
1025                 pwm2: pwm@e6e32000 {
1026                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1027                         reg = <0 0xe6e32000 0 0x8>;
1028                         clocks = <&cpg CPG_MOD 523>;
1029                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1030                         resets = <&cpg 523>;
1031                         #pwm-cells = <2>;
1032                         status = "disabled";
1033                 };
1034
1035                 pwm3: pwm@e6e33000 {
1036                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1037                         reg = <0 0xe6e33000 0 0x8>;
1038                         clocks = <&cpg CPG_MOD 523>;
1039                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1040                         resets = <&cpg 523>;
1041                         #pwm-cells = <2>;
1042                         status = "disabled";
1043                 };
1044
1045                 pwm4: pwm@e6e34000 {
1046                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1047                         reg = <0 0xe6e34000 0 0x8>;
1048                         clocks = <&cpg CPG_MOD 523>;
1049                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1050                         resets = <&cpg 523>;
1051                         #pwm-cells = <2>;
1052                         status = "disabled";
1053                 };
1054
1055                 pwm5: pwm@e6e35000 {
1056                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1057                         reg = <0 0xe6e35000 0 0x8>;
1058                         clocks = <&cpg CPG_MOD 523>;
1059                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1060                         resets = <&cpg 523>;
1061                         #pwm-cells = <2>;
1062                         status = "disabled";
1063                 };
1064
1065                 pwm6: pwm@e6e36000 {
1066                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1067                         reg = <0 0xe6e36000 0 0x8>;
1068                         clocks = <&cpg CPG_MOD 523>;
1069                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1070                         resets = <&cpg 523>;
1071                         #pwm-cells = <2>;
1072                         status = "disabled";
1073                 };
1074
1075                 rcar_sound: sound@ec500000 {
1076                         /*
1077                          * #sound-dai-cells is required
1078                          *
1079                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1080                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1081                          */
1082                         /*
1083                          * #clock-cells is required for audio_clkout0/1/2/3
1084                          *
1085                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1086                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1087                          */
1088                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1089                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1090                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1091                                 <0 0xec540000 0 0x1000>, /* SSIU */
1092                                 <0 0xec541000 0 0x280>,  /* SSI */
1093                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1094                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1095
1096                         clocks = <&cpg CPG_MOD 1005>,
1097                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1098                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1099                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1100                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1101                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1102                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1103                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1104                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1105                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1106                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1107                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1108                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1109                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1110                                  <&audio_clk_a>, <&audio_clk_b>,
1111                                  <&audio_clk_c>,
1112                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1113                         clock-names = "ssi-all",
1114                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1115                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1116                                       "ssi.1", "ssi.0",
1117                                       "src.9", "src.8", "src.7", "src.6",
1118                                       "src.5", "src.4", "src.3", "src.2",
1119                                       "src.1", "src.0",
1120                                       "mix.1", "mix.0",
1121                                       "ctu.1", "ctu.0",
1122                                       "dvc.0", "dvc.1",
1123                                       "clk_a", "clk_b", "clk_c", "clk_i";
1124                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1125                         status = "disabled";
1126
1127                         rcar_sound,dvc {
1128                                 dvc0: dvc-0 {
1129                                         dmas = <&audma1 0xbc>;
1130                                         dma-names = "tx";
1131                                 };
1132                                 dvc1: dvc-1 {
1133                                         dmas = <&audma1 0xbe>;
1134                                         dma-names = "tx";
1135                                 };
1136                         };
1137
1138                         rcar_sound,mix {
1139                                 mix0: mix-0 { };
1140                                 mix1: mix-1 { };
1141                         };
1142
1143                         rcar_sound,ctu {
1144                                 ctu00: ctu-0 { };
1145                                 ctu01: ctu-1 { };
1146                                 ctu02: ctu-2 { };
1147                                 ctu03: ctu-3 { };
1148                                 ctu10: ctu-4 { };
1149                                 ctu11: ctu-5 { };
1150                                 ctu12: ctu-6 { };
1151                                 ctu13: ctu-7 { };
1152                         };
1153
1154                         rcar_sound,src {
1155                                 src0: src-0 {
1156                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1157                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1158                                         dma-names = "rx", "tx";
1159                                 };
1160                                 src1: src-1 {
1161                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1162                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1163                                         dma-names = "rx", "tx";
1164                                 };
1165                                 src2: src-2 {
1166                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1167                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1168                                         dma-names = "rx", "tx";
1169                                 };
1170                                 src3: src-3 {
1171                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1172                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1173                                         dma-names = "rx", "tx";
1174                                 };
1175                                 src4: src-4 {
1176                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1177                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1178                                         dma-names = "rx", "tx";
1179                                 };
1180                                 src5: src-5 {
1181                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1182                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1183                                         dma-names = "rx", "tx";
1184                                 };
1185                                 src6: src-6 {
1186                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1187                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1188                                         dma-names = "rx", "tx";
1189                                 };
1190                                 src7: src-7 {
1191                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1192                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1193                                         dma-names = "rx", "tx";
1194                                 };
1195                                 src8: src-8 {
1196                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1197                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1198                                         dma-names = "rx", "tx";
1199                                 };
1200                                 src9: src-9 {
1201                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1202                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1203                                         dma-names = "rx", "tx";
1204                                 };
1205                         };
1206
1207                         rcar_sound,ssi {
1208                                 ssi0: ssi-0 {
1209                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1210                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1211                                         dma-names = "rx", "tx", "rxu", "txu";
1212                                 };
1213                                 ssi1: ssi-1 {
1214                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1215                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1216                                         dma-names = "rx", "tx", "rxu", "txu";
1217                                 };
1218                                 ssi2: ssi-2 {
1219                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1220                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1221                                         dma-names = "rx", "tx", "rxu", "txu";
1222                                 };
1223                                 ssi3: ssi-3 {
1224                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1225                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1226                                         dma-names = "rx", "tx", "rxu", "txu";
1227                                 };
1228                                 ssi4: ssi-4 {
1229                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1230                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1231                                         dma-names = "rx", "tx", "rxu", "txu";
1232                                 };
1233                                 ssi5: ssi-5 {
1234                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1235                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1236                                         dma-names = "rx", "tx", "rxu", "txu";
1237                                 };
1238                                 ssi6: ssi-6 {
1239                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1240                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1241                                         dma-names = "rx", "tx", "rxu", "txu";
1242                                 };
1243                                 ssi7: ssi-7 {
1244                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1245                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1246                                         dma-names = "rx", "tx", "rxu", "txu";
1247                                 };
1248                                 ssi8: ssi-8 {
1249                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1250                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1251                                         dma-names = "rx", "tx", "rxu", "txu";
1252                                 };
1253                                 ssi9: ssi-9 {
1254                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1255                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1256                                         dma-names = "rx", "tx", "rxu", "txu";
1257                                 };
1258                         };
1259                 };
1260
1261                 sata: sata@ee300000 {
1262                         compatible = "renesas,sata-r8a7795";
1263                         reg = <0 0xee300000 0 0x200000>;
1264                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1265                         clocks = <&cpg CPG_MOD 815>;
1266                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1267                         resets = <&cpg 815>;
1268                         status = "disabled";
1269                 };
1270
1271                 xhci0: usb@ee000000 {
1272                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1273                         reg = <0 0xee000000 0 0xc00>;
1274                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1275                         clocks = <&cpg CPG_MOD 328>;
1276                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1277                         resets = <&cpg 328>;
1278                         status = "disabled";
1279                 };
1280
1281                 xhci1: usb@ee0400000 {
1282                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1283                         reg = <0 0xee040000 0 0xc00>;
1284                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1285                         clocks = <&cpg CPG_MOD 327>;
1286                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1287                         resets = <&cpg 327>;
1288                         status = "disabled";
1289                 };
1290
1291                 usb_dmac0: dma-controller@e65a0000 {
1292                         compatible = "renesas,r8a7795-usb-dmac",
1293                                      "renesas,usb-dmac";
1294                         reg = <0 0xe65a0000 0 0x100>;
1295                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1296                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1297                         interrupt-names = "ch0", "ch1";
1298                         clocks = <&cpg CPG_MOD 330>;
1299                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1300                         resets = <&cpg 330>;
1301                         #dma-cells = <1>;
1302                         dma-channels = <2>;
1303                 };
1304
1305                 usb_dmac1: dma-controller@e65b0000 {
1306                         compatible = "renesas,r8a7795-usb-dmac",
1307                                      "renesas,usb-dmac";
1308                         reg = <0 0xe65b0000 0 0x100>;
1309                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1310                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1311                         interrupt-names = "ch0", "ch1";
1312                         clocks = <&cpg CPG_MOD 331>;
1313                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1314                         resets = <&cpg 331>;
1315                         #dma-cells = <1>;
1316                         dma-channels = <2>;
1317                 };
1318
1319                 sdhi0: sd@ee100000 {
1320                         compatible = "renesas,sdhi-r8a7795";
1321                         reg = <0 0xee100000 0 0x2000>;
1322                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1323                         clocks = <&cpg CPG_MOD 314>;
1324                         max-frequency = <200000000>;
1325                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1326                         resets = <&cpg 314>;
1327                         status = "disabled";
1328                 };
1329
1330                 sdhi1: sd@ee120000 {
1331                         compatible = "renesas,sdhi-r8a7795";
1332                         reg = <0 0xee120000 0 0x2000>;
1333                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1334                         clocks = <&cpg CPG_MOD 313>;
1335                         max-frequency = <200000000>;
1336                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1337                         resets = <&cpg 313>;
1338                         status = "disabled";
1339                 };
1340
1341                 sdhi2: sd@ee140000 {
1342                         compatible = "renesas,sdhi-r8a7795";
1343                         reg = <0 0xee140000 0 0x2000>;
1344                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1345                         clocks = <&cpg CPG_MOD 312>;
1346                         max-frequency = <200000000>;
1347                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1348                         resets = <&cpg 312>;
1349                         status = "disabled";
1350                 };
1351
1352                 sdhi3: sd@ee160000 {
1353                         compatible = "renesas,sdhi-r8a7795";
1354                         reg = <0 0xee160000 0 0x2000>;
1355                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1356                         clocks = <&cpg CPG_MOD 311>;
1357                         max-frequency = <200000000>;
1358                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1359                         resets = <&cpg 311>;
1360                         status = "disabled";
1361                 };
1362
1363                 usb2_phy0: usb-phy@ee080200 {
1364                         compatible = "renesas,usb2-phy-r8a7795",
1365                                      "renesas,rcar-gen3-usb2-phy";
1366                         reg = <0 0xee080200 0 0x700>;
1367                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1368                         clocks = <&cpg CPG_MOD 703>;
1369                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1370                         resets = <&cpg 703>;
1371                         #phy-cells = <0>;
1372                         status = "disabled";
1373                 };
1374
1375                 usb2_phy1: usb-phy@ee0a0200 {
1376                         compatible = "renesas,usb2-phy-r8a7795",
1377                                      "renesas,rcar-gen3-usb2-phy";
1378                         reg = <0 0xee0a0200 0 0x700>;
1379                         clocks = <&cpg CPG_MOD 702>;
1380                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1381                         resets = <&cpg 702>;
1382                         #phy-cells = <0>;
1383                         status = "disabled";
1384                 };
1385
1386                 usb2_phy2: usb-phy@ee0c0200 {
1387                         compatible = "renesas,usb2-phy-r8a7795",
1388                                      "renesas,rcar-gen3-usb2-phy";
1389                         reg = <0 0xee0c0200 0 0x700>;
1390                         clocks = <&cpg CPG_MOD 701>;
1391                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1392                         resets = <&cpg 701>;
1393                         #phy-cells = <0>;
1394                         status = "disabled";
1395                 };
1396
1397                 ehci0: usb@ee080100 {
1398                         compatible = "generic-ehci";
1399                         reg = <0 0xee080100 0 0x100>;
1400                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1401                         clocks = <&cpg CPG_MOD 703>;
1402                         phys = <&usb2_phy0>;
1403                         phy-names = "usb";
1404                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1405                         resets = <&cpg 703>;
1406                         status = "disabled";
1407                 };
1408
1409                 ehci1: usb@ee0a0100 {
1410                         compatible = "generic-ehci";
1411                         reg = <0 0xee0a0100 0 0x100>;
1412                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1413                         clocks = <&cpg CPG_MOD 702>;
1414                         phys = <&usb2_phy1>;
1415                         phy-names = "usb";
1416                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1417                         resets = <&cpg 702>;
1418                         status = "disabled";
1419                 };
1420
1421                 ehci2: usb@ee0c0100 {
1422                         compatible = "generic-ehci";
1423                         reg = <0 0xee0c0100 0 0x100>;
1424                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1425                         clocks = <&cpg CPG_MOD 701>;
1426                         phys = <&usb2_phy2>;
1427                         phy-names = "usb";
1428                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1429                         resets = <&cpg 701>;
1430                         status = "disabled";
1431                 };
1432
1433                 ohci0: usb@ee080000 {
1434                         compatible = "generic-ohci";
1435                         reg = <0 0xee080000 0 0x100>;
1436                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1437                         clocks = <&cpg CPG_MOD 703>;
1438                         phys = <&usb2_phy0>;
1439                         phy-names = "usb";
1440                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1441                         resets = <&cpg 703>;
1442                         status = "disabled";
1443                 };
1444
1445                 ohci1: usb@ee0a0000 {
1446                         compatible = "generic-ohci";
1447                         reg = <0 0xee0a0000 0 0x100>;
1448                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1449                         clocks = <&cpg CPG_MOD 702>;
1450                         phys = <&usb2_phy1>;
1451                         phy-names = "usb";
1452                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1453                         resets = <&cpg 702>;
1454                         status = "disabled";
1455                 };
1456
1457                 ohci2: usb@ee0c0000 {
1458                         compatible = "generic-ohci";
1459                         reg = <0 0xee0c0000 0 0x100>;
1460                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1461                         clocks = <&cpg CPG_MOD 701>;
1462                         phys = <&usb2_phy2>;
1463                         phy-names = "usb";
1464                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1465                         resets = <&cpg 701>;
1466                         status = "disabled";
1467                 };
1468
1469                 hsusb: usb@e6590000 {
1470                         compatible = "renesas,usbhs-r8a7795",
1471                                      "renesas,rcar-gen3-usbhs";
1472                         reg = <0 0xe6590000 0 0x100>;
1473                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1474                         clocks = <&cpg CPG_MOD 704>;
1475                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1476                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1477                         dma-names = "ch0", "ch1", "ch2", "ch3";
1478                         renesas,buswait = <11>;
1479                         phys = <&usb2_phy0>;
1480                         phy-names = "usb";
1481                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1482                         resets = <&cpg 704>;
1483                         status = "disabled";
1484                 };
1485
1486                 pciec0: pcie@fe000000 {
1487                         compatible = "renesas,pcie-r8a7795",
1488                                      "renesas,pcie-rcar-gen3";
1489                         reg = <0 0xfe000000 0 0x80000>;
1490                         #address-cells = <3>;
1491                         #size-cells = <2>;
1492                         bus-range = <0x00 0xff>;
1493                         device_type = "pci";
1494                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1495                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1496                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1497                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1498                         /* Map all possible DDR as inbound ranges */
1499                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1500                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1501                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1502                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1503                         #interrupt-cells = <1>;
1504                         interrupt-map-mask = <0 0 0 0>;
1505                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1506                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1507                         clock-names = "pcie", "pcie_bus";
1508                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1509                         resets = <&cpg 319>;
1510                         status = "disabled";
1511                 };
1512
1513                 pciec1: pcie@ee800000 {
1514                         compatible = "renesas,pcie-r8a7795",
1515                                      "renesas,pcie-rcar-gen3";
1516                         reg = <0 0xee800000 0 0x80000>;
1517                         #address-cells = <3>;
1518                         #size-cells = <2>;
1519                         bus-range = <0x00 0xff>;
1520                         device_type = "pci";
1521                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1522                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1523                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1524                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1525                         /* Map all possible DDR as inbound ranges */
1526                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1527                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1528                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1529                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1530                         #interrupt-cells = <1>;
1531                         interrupt-map-mask = <0 0 0 0>;
1532                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1533                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1534                         clock-names = "pcie", "pcie_bus";
1535                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1536                         resets = <&cpg 318>;
1537                         status = "disabled";
1538                 };
1539
1540                 vspbc: vsp@fe920000 {
1541                         compatible = "renesas,vsp2";
1542                         reg = <0 0xfe920000 0 0x8000>;
1543                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1544                         clocks = <&cpg CPG_MOD 624>;
1545                         power-domains = <&sysc R8A7795_PD_A3VP>;
1546                         resets = <&cpg 624>;
1547
1548                         renesas,fcp = <&fcpvb1>;
1549                 };
1550
1551                 fcpvb1: fcp@fe92f000 {
1552                         compatible = "renesas,fcpv";
1553                         reg = <0 0xfe92f000 0 0x200>;
1554                         clocks = <&cpg CPG_MOD 606>;
1555                         power-domains = <&sysc R8A7795_PD_A3VP>;
1556                         resets = <&cpg 606>;
1557                 };
1558
1559                 fcpf0: fcp@fe950000 {
1560                         compatible = "renesas,fcpf";
1561                         reg = <0 0xfe950000 0 0x200>;
1562                         clocks = <&cpg CPG_MOD 615>;
1563                         power-domains = <&sysc R8A7795_PD_A3VP>;
1564                         resets = <&cpg 615>;
1565                 };
1566
1567                 fcpf1: fcp@fe951000 {
1568                         compatible = "renesas,fcpf";
1569                         reg = <0 0xfe951000 0 0x200>;
1570                         clocks = <&cpg CPG_MOD 614>;
1571                         power-domains = <&sysc R8A7795_PD_A3VP>;
1572                         resets = <&cpg 614>;
1573                 };
1574
1575                 fcpf2: fcp@fe952000 {
1576                         compatible = "renesas,fcpf";
1577                         reg = <0 0xfe952000 0 0x200>;
1578                         clocks = <&cpg CPG_MOD 613>;
1579                         power-domains = <&sysc R8A7795_PD_A3VP>;
1580                         resets = <&cpg 613>;
1581                 };
1582
1583                 vspbd: vsp@fe960000 {
1584                         compatible = "renesas,vsp2";
1585                         reg = <0 0xfe960000 0 0x8000>;
1586                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1587                         clocks = <&cpg CPG_MOD 626>;
1588                         power-domains = <&sysc R8A7795_PD_A3VP>;
1589                         resets = <&cpg 626>;
1590
1591                         renesas,fcp = <&fcpvb0>;
1592                 };
1593
1594                 fcpvb0: fcp@fe96f000 {
1595                         compatible = "renesas,fcpv";
1596                         reg = <0 0xfe96f000 0 0x200>;
1597                         clocks = <&cpg CPG_MOD 607>;
1598                         power-domains = <&sysc R8A7795_PD_A3VP>;
1599                         resets = <&cpg 607>;
1600                 };
1601
1602                 vspi0: vsp@fe9a0000 {
1603                         compatible = "renesas,vsp2";
1604                         reg = <0 0xfe9a0000 0 0x8000>;
1605                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1606                         clocks = <&cpg CPG_MOD 631>;
1607                         power-domains = <&sysc R8A7795_PD_A3VP>;
1608                         resets = <&cpg 631>;
1609
1610                         renesas,fcp = <&fcpvi0>;
1611                 };
1612
1613                 fcpvi0: fcp@fe9af000 {
1614                         compatible = "renesas,fcpv";
1615                         reg = <0 0xfe9af000 0 0x200>;
1616                         clocks = <&cpg CPG_MOD 611>;
1617                         power-domains = <&sysc R8A7795_PD_A3VP>;
1618                         resets = <&cpg 611>;
1619                 };
1620
1621                 vspi1: vsp@fe9b0000 {
1622                         compatible = "renesas,vsp2";
1623                         reg = <0 0xfe9b0000 0 0x8000>;
1624                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1625                         clocks = <&cpg CPG_MOD 630>;
1626                         power-domains = <&sysc R8A7795_PD_A3VP>;
1627                         resets = <&cpg 630>;
1628
1629                         renesas,fcp = <&fcpvi1>;
1630                 };
1631
1632                 fcpvi1: fcp@fe9bf000 {
1633                         compatible = "renesas,fcpv";
1634                         reg = <0 0xfe9bf000 0 0x200>;
1635                         clocks = <&cpg CPG_MOD 610>;
1636                         power-domains = <&sysc R8A7795_PD_A3VP>;
1637                         resets = <&cpg 610>;
1638                 };
1639
1640                 vspi2: vsp@fe9c0000 {
1641                         compatible = "renesas,vsp2";
1642                         reg = <0 0xfe9c0000 0 0x8000>;
1643                         interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1644                         clocks = <&cpg CPG_MOD 629>;
1645                         power-domains = <&sysc R8A7795_PD_A3VP>;
1646                         resets = <&cpg 629>;
1647
1648                         renesas,fcp = <&fcpvi2>;
1649                 };
1650
1651                 fcpvi2: fcp@fe9cf000 {
1652                         compatible = "renesas,fcpv";
1653                         reg = <0 0xfe9cf000 0 0x200>;
1654                         clocks = <&cpg CPG_MOD 609>;
1655                         power-domains = <&sysc R8A7795_PD_A3VP>;
1656                         resets = <&cpg 609>;
1657                 };
1658
1659                 vspd0: vsp@fea20000 {
1660                         compatible = "renesas,vsp2";
1661                         reg = <0 0xfea20000 0 0x4000>;
1662                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1663                         clocks = <&cpg CPG_MOD 623>;
1664                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1665                         resets = <&cpg 623>;
1666
1667                         renesas,fcp = <&fcpvd0>;
1668                 };
1669
1670                 fcpvd0: fcp@fea27000 {
1671                         compatible = "renesas,fcpv";
1672                         reg = <0 0xfea27000 0 0x200>;
1673                         clocks = <&cpg CPG_MOD 603>;
1674                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1675                         resets = <&cpg 603>;
1676                 };
1677
1678                 vspd1: vsp@fea28000 {
1679                         compatible = "renesas,vsp2";
1680                         reg = <0 0xfea28000 0 0x4000>;
1681                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1682                         clocks = <&cpg CPG_MOD 622>;
1683                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1684                         resets = <&cpg 622>;
1685
1686                         renesas,fcp = <&fcpvd1>;
1687                 };
1688
1689                 fcpvd1: fcp@fea2f000 {
1690                         compatible = "renesas,fcpv";
1691                         reg = <0 0xfea2f000 0 0x200>;
1692                         clocks = <&cpg CPG_MOD 602>;
1693                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1694                         resets = <&cpg 602>;
1695                 };
1696
1697                 vspd2: vsp@fea30000 {
1698                         compatible = "renesas,vsp2";
1699                         reg = <0 0xfea30000 0 0x4000>;
1700                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1701                         clocks = <&cpg CPG_MOD 621>;
1702                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1703                         resets = <&cpg 621>;
1704
1705                         renesas,fcp = <&fcpvd2>;
1706                 };
1707
1708                 fcpvd2: fcp@fea37000 {
1709                         compatible = "renesas,fcpv";
1710                         reg = <0 0xfea37000 0 0x200>;
1711                         clocks = <&cpg CPG_MOD 601>;
1712                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1713                         resets = <&cpg 601>;
1714                 };
1715
1716                 vspd3: vsp@fea38000 {
1717                         compatible = "renesas,vsp2";
1718                         reg = <0 0xfea38000 0 0x4000>;
1719                         interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1720                         clocks = <&cpg CPG_MOD 620>;
1721                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1722                         resets = <&cpg 620>;
1723
1724                         renesas,fcp = <&fcpvd3>;
1725                 };
1726
1727                 fcpvd3: fcp@fea3f000 {
1728                         compatible = "renesas,fcpv";
1729                         reg = <0 0xfea3f000 0 0x200>;
1730                         clocks = <&cpg CPG_MOD 600>;
1731                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1732                         resets = <&cpg 600>;
1733                 };
1734
1735                 fdp1@fe940000 {
1736                         compatible = "renesas,fdp1";
1737                         reg = <0 0xfe940000 0 0x2400>;
1738                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1739                         clocks = <&cpg CPG_MOD 119>;
1740                         power-domains = <&sysc R8A7795_PD_A3VP>;
1741                         resets = <&cpg 119>;
1742                         renesas,fcp = <&fcpf0>;
1743                 };
1744
1745                 fdp1@fe944000 {
1746                         compatible = "renesas,fdp1";
1747                         reg = <0 0xfe944000 0 0x2400>;
1748                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1749                         clocks = <&cpg CPG_MOD 118>;
1750                         power-domains = <&sysc R8A7795_PD_A3VP>;
1751                         resets = <&cpg 118>;
1752                         renesas,fcp = <&fcpf1>;
1753                 };
1754
1755                 fdp1@fe948000 {
1756                         compatible = "renesas,fdp1";
1757                         reg = <0 0xfe948000 0 0x2400>;
1758                         interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1759                         clocks = <&cpg CPG_MOD 117>;
1760                         power-domains = <&sysc R8A7795_PD_A3VP>;
1761                         resets = <&cpg 117>;
1762                         renesas,fcp = <&fcpf2>;
1763                 };
1764
1765                 du: display@feb00000 {
1766                         compatible = "renesas,du-r8a7795";
1767                         reg = <0 0xfeb00000 0 0x80000>,
1768                               <0 0xfeb90000 0 0x14>;
1769                         reg-names = "du", "lvds.0";
1770                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1771                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1772                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1773                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1774                         clocks = <&cpg CPG_MOD 724>,
1775                                  <&cpg CPG_MOD 723>,
1776                                  <&cpg CPG_MOD 722>,
1777                                  <&cpg CPG_MOD 721>,
1778                                  <&cpg CPG_MOD 727>;
1779                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1780                         status = "disabled";
1781
1782                         vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1783
1784                         ports {
1785                                 #address-cells = <1>;
1786                                 #size-cells = <0>;
1787
1788                                 port@0 {
1789                                         reg = <0>;
1790                                         du_out_rgb: endpoint {
1791                                         };
1792                                 };
1793                                 port@1 {
1794                                         reg = <1>;
1795                                         du_out_hdmi0: endpoint {
1796                                         };
1797                                 };
1798                                 port@2 {
1799                                         reg = <2>;
1800                                         du_out_hdmi1: endpoint {
1801                                         };
1802                                 };
1803                                 port@3 {
1804                                         reg = <3>;
1805                                         du_out_lvds0: endpoint {
1806                                         };
1807                                 };
1808                         };
1809                 };
1810
1811                 tsc: thermal@e6198000 {
1812                         compatible = "renesas,r8a7795-thermal";
1813                         reg = <0 0xe6198000 0 0x68>,
1814                               <0 0xe61a0000 0 0x5c>,
1815                               <0 0xe61a8000 0 0x5c>;
1816                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1817                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1818                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1819                         clocks = <&cpg CPG_MOD 522>;
1820                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1821                         resets = <&cpg 522>;
1822                         #thermal-sensor-cells = <1>;
1823                         status = "okay";
1824                 };
1825
1826                 thermal-zones {
1827                         sensor_thermal1: sensor-thermal1 {
1828                                 polling-delay-passive = <250>;
1829                                 polling-delay = <1000>;
1830                                 thermal-sensors = <&tsc 0>;
1831
1832                                 trips {
1833                                         sensor1_crit: sensor1-crit {
1834                                                 temperature = <120000>;
1835                                                 hysteresis = <2000>;
1836                                                 type = "critical";
1837                                         };
1838                                 };
1839                         };
1840
1841                         sensor_thermal2: sensor-thermal2 {
1842                                 polling-delay-passive = <250>;
1843                                 polling-delay = <1000>;
1844                                 thermal-sensors = <&tsc 1>;
1845
1846                                 trips {
1847                                         sensor2_crit: sensor2-crit {
1848                                                 temperature = <120000>;
1849                                                 hysteresis = <2000>;
1850                                                 type = "critical";
1851                                         };
1852                                 };
1853                         };
1854
1855                         sensor_thermal3: sensor-thermal3 {
1856                                 polling-delay-passive = <250>;
1857                                 polling-delay = <1000>;
1858                                 thermal-sensors = <&tsc 2>;
1859
1860                                 trips {
1861                                         sensor3_crit: sensor3-crit {
1862                                                 temperature = <120000>;
1863                                                 hysteresis = <2000>;
1864                                                 type = "critical";
1865                                         };
1866                                 };
1867                         };
1868                 };
1869         };
1870 };