2 * Device Tree Source for the r8a77970 SoC
4 * Copyright (C) 2016-2017 Renesas Electronics Corp.
5 * Copyright (C) 2017 Cogent Embedded, Inc.
7 * SPDX-License-Identifier: GPL-2.0
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/renesas-cpg-mssr.h>
15 compatible = "renesas,r8a77970";
20 compatible = "arm,psci-1.0", "arm,psci-0.2";
30 compatible = "arm,cortex-a53", "arm,armv8";
32 clocks = <&cpg CPG_CORE 0>;
33 power-domains = <&sysc 5>;
34 next-level-cache = <&L2_CA53>;
35 enable-method = "psci";
38 L2_CA53: cache-controller {
40 power-domains = <&sysc 21>;
47 compatible = "fixed-clock";
49 /* This value must be overridden by the board */
50 clock-frequency = <0>;
54 compatible = "fixed-clock";
56 /* This value must be overridden by the board */
57 clock-frequency = <0>;
60 /* External SCIF clock - to be overridden by boards that provide it */
62 compatible = "fixed-clock";
64 clock-frequency = <0>;
68 compatible = "simple-bus";
69 interrupt-parent = <&gic>;
75 gic: interrupt-controller@f1010000 {
76 compatible = "arm,gic-400";
77 #interrupt-cells = <3>;
80 reg = <0 0xf1010000 0 0x1000>,
81 <0 0xf1020000 0 0x20000>,
82 <0 0xf1040000 0 0x20000>,
83 <0 0xf1060000 0 0x20000>;
84 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
85 IRQ_TYPE_LEVEL_HIGH)>;
86 clocks = <&cpg CPG_MOD 408>;
88 power-domains = <&sysc 32>;
93 compatible = "arm,armv8-timer";
94 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
96 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
98 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |
100 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |
101 IRQ_TYPE_LEVEL_LOW)>;
104 cpg: clock-controller@e6150000 {
105 compatible = "renesas,r8a77970-cpg-mssr";
106 reg = <0 0xe6150000 0 0x1000>;
107 clocks = <&extal_clk>, <&extalr_clk>;
108 clock-names = "extal", "extalr";
110 #power-domain-cells = <0>;
114 rst: reset-controller@e6160000 {
115 compatible = "renesas,r8a77970-rst";
116 reg = <0 0xe6160000 0 0x200>;
119 sysc: system-controller@e6180000 {
120 compatible = "renesas,r8a77970-sysc";
121 reg = <0 0xe6180000 0 0x440>;
122 #power-domain-cells = <1>;
126 compatible = "renesas,pfc-r8a77970";
127 reg = <0 0xe6060000 0 0x50c>;
130 intc_ex: interrupt-controller@e61c0000 {
131 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
132 #interrupt-cells = <2>;
133 interrupt-controller;
134 reg = <0 0xe61c0000 0 0x200>;
135 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
136 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
137 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
138 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
139 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
140 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
141 clocks = <&cpg CPG_MOD 407>;
142 power-domains = <&sysc 32>;
146 prr: chipid@fff00044 {
147 compatible = "renesas,prr";
148 reg = <0 0xfff00044 0 4>;
151 dmac1: dma-controller@e7300000 {
152 compatible = "renesas,dmac-r8a77970",
154 reg = <0 0xe7300000 0 0x10000>;
155 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
156 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
157 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
158 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
159 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
160 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
161 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
162 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
163 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
164 interrupt-names = "error",
165 "ch0", "ch1", "ch2", "ch3",
166 "ch4", "ch5", "ch6", "ch7";
167 clocks = <&cpg CPG_MOD 218>;
169 power-domains = <&sysc 32>;
175 dmac2: dma-controller@e7310000 {
176 compatible = "renesas,dmac-r8a77970",
178 reg = <0 0xe7310000 0 0x10000>;
179 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
180 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
181 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
182 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
183 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
184 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
185 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
186 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
187 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
188 interrupt-names = "error",
189 "ch0", "ch1", "ch2", "ch3",
190 "ch4", "ch5", "ch6", "ch7";
191 clocks = <&cpg CPG_MOD 217>;
193 power-domains = <&sysc 32>;
199 hscif0: serial@e6540000 {
200 compatible = "renesas,hscif-r8a77970",
201 "renesas,rcar-gen3-hscif",
203 reg = <0 0xe6540000 0 96>;
204 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
205 clocks = <&cpg CPG_MOD 520>,
208 clock-names = "fck", "brg_int", "scif_clk";
209 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
210 <&dmac2 0x31>, <&dmac2 0x30>;
211 dma-names = "tx", "rx", "tx", "rx";
212 power-domains = <&sysc 32>;
217 hscif1: serial@e6550000 {
218 compatible = "renesas,hscif-r8a77970",
219 "renesas,rcar-gen3-hscif",
221 reg = <0 0xe6550000 0 96>;
222 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
223 clocks = <&cpg CPG_MOD 519>,
226 clock-names = "fck", "brg_int", "scif_clk";
227 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
228 <&dmac2 0x33>, <&dmac2 0x32>;
229 dma-names = "tx", "rx", "tx", "rx";
230 power-domains = <&sysc 32>;
235 hscif2: serial@e6560000 {
236 compatible = "renesas,hscif-r8a77970",
237 "renesas,rcar-gen3-hscif",
239 reg = <0 0xe6560000 0 96>;
240 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
241 clocks = <&cpg CPG_MOD 518>,
244 clock-names = "fck", "brg_int", "scif_clk";
245 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
246 <&dmac2 0x35>, <&dmac2 0x34>;
247 dma-names = "tx", "rx", "tx", "rx";
248 power-domains = <&sysc 32>;
253 hscif3: serial@e66a0000 {
254 compatible = "renesas,hscif-r8a77970",
255 "renesas,rcar-gen3-hscif", "renesas,hscif";
256 reg = <0 0xe66a0000 0 96>;
257 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
258 clocks = <&cpg CPG_MOD 517>,
261 clock-names = "fck", "brg_int", "scif_clk";
262 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
263 <&dmac2 0x37>, <&dmac2 0x36>;
264 dma-names = "tx", "rx", "tx", "rx";
265 power-domains = <&sysc 32>;
270 scif0: serial@e6e60000 {
271 compatible = "renesas,scif-r8a77970",
272 "renesas,rcar-gen3-scif",
274 reg = <0 0xe6e60000 0 64>;
275 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
276 clocks = <&cpg CPG_MOD 207>,
279 clock-names = "fck", "brg_int", "scif_clk";
280 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
281 <&dmac2 0x51>, <&dmac2 0x50>;
282 dma-names = "tx", "rx", "tx", "rx";
283 power-domains = <&sysc 32>;
288 scif1: serial@e6e68000 {
289 compatible = "renesas,scif-r8a77970",
290 "renesas,rcar-gen3-scif",
292 reg = <0 0xe6e68000 0 64>;
293 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
294 clocks = <&cpg CPG_MOD 206>,
297 clock-names = "fck", "brg_int", "scif_clk";
298 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
299 <&dmac2 0x53>, <&dmac2 0x52>;
300 dma-names = "tx", "rx", "tx", "rx";
301 power-domains = <&sysc 32>;
306 scif3: serial@e6c50000 {
307 compatible = "renesas,scif-r8a77970",
308 "renesas,rcar-gen3-scif",
310 reg = <0 0xe6c50000 0 64>;
311 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
312 clocks = <&cpg CPG_MOD 204>,
315 clock-names = "fck", "brg_int", "scif_clk";
316 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
317 <&dmac2 0x57>, <&dmac2 0x56>;
318 dma-names = "tx", "rx", "tx", "rx";
319 power-domains = <&sysc 32>;
324 scif4: serial@e6c40000 {
325 compatible = "renesas,scif-r8a77970",
326 "renesas,rcar-gen3-scif", "renesas,scif";
327 reg = <0 0xe6c40000 0 64>;
328 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
329 clocks = <&cpg CPG_MOD 203>,
332 clock-names = "fck", "brg_int", "scif_clk";
333 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
334 <&dmac2 0x59>, <&dmac2 0x58>;
335 dma-names = "tx", "rx", "tx", "rx";
336 power-domains = <&sysc 32>;
341 avb: ethernet@e6800000 {
342 compatible = "renesas,etheravb-r8a77970",
343 "renesas,etheravb-rcar-gen3";
344 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
345 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
350 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
351 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
357 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
358 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
359 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
369 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
370 interrupt-names = "ch0", "ch1", "ch2", "ch3",
371 "ch4", "ch5", "ch6", "ch7",
372 "ch8", "ch9", "ch10", "ch11",
373 "ch12", "ch13", "ch14", "ch15",
374 "ch16", "ch17", "ch18", "ch19",
375 "ch20", "ch21", "ch22", "ch23",
377 clocks = <&cpg CPG_MOD 812>;
378 power-domains = <&sysc 32>;
380 phy-mode = "rgmii-id";
381 #address-cells = <1>;
385 rpc: rpc@0xee200000 {
386 compatible = "renesas,rpc-r8a77970", "renesas,rpc";
387 reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
388 clocks = <&cpg CPG_MOD 917>;