2 * Google Veyron (and derivatives) board device tree source
4 * Copyright 2014 Google, Inc
6 * SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
18 gpio_keys: gpio-keys {
19 pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
22 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
23 linux,code = <0>; /* SW_LID */
24 linux,input-type = <5>; /* EV_SW */
25 debounce-interval = <1>;
31 compatible = "gpio-charger";
32 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ac_present_ap>;
35 charger-type = "mains";
38 /* A non-regulated voltage from power supply or battery */
40 compatible = "regulator-fixed";
41 regulator-name = "vccsys";
46 vcc33_sys: vcc33-sys {
47 vin-supply = <&vccsys>;
51 vin-supply = <&vccsys>;
54 /* This turns on vbus for host1 (dwc2) */
55 vcc5_host1: vcc5-host1-regulator {
56 compatible = "regulator-fixed";
58 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&host1_pwr_en>;
61 regulator-name = "vcc5_host1";
66 /* This turns on vbus for otg for host mode (dwc2) */
67 vcc5v_otg: vcc5v-otg-regulator {
68 compatible = "regulator-fixed";
70 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&usbotg_pwren_h>;
73 regulator-name = "vcc5_host2";
84 regulator-min-microvolt = <3300000>;
85 regulator-max-microvolt = <3300000>;
86 regulator-name = "vcc33_ccd";
87 regulator-suspend-mem-disabled;
94 spi-activate-delay = <100>;
95 spi-max-frequency = <3000000>;
96 spi-deactivate-delay = <200>;
99 compatible = "google,cros-ec-spi";
100 spi-max-frequency = <3000000>;
101 interrupt-parent = <&gpio7>;
102 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
103 ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&ec_int>;
107 google,cros-ec-spi-pre-delay = <30>;
109 i2c_tunnel: i2c-tunnel {
110 compatible = "google,cros-ec-i2c-tunnel";
111 google,remote-bus = <0>;
112 #address-cells = <1>;
120 compatible = "elan,i2c_touchpad";
121 interrupt-parent = <&gpio7>;
122 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&trackpad_int>;
126 vcc-supply = <&vcc33_io>;
133 /* Common for sleep and wake, but no owners */
143 /* Common for sleep and wake, but no owners */
154 ap_lid_int_l: ap-lid-int-l {
155 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
160 ac_present_ap: ac-present-ap {
161 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
167 rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
172 sdmmc_wp_gpio: sdmmc-wp-gpio {
173 rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
178 suspend_l_wake: suspend-l-wake {
179 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
182 suspend_l_sleep: suspend-l-sleep {
183 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
188 trackpad_int: trackpad-int {
189 rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
194 host1_pwr_en: host1-pwr-en {
195 rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
198 usbotg_pwren_h: usbotg-pwren-h {
199 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
204 #include "cros-ec-keyboard.dtsi"