2 * Google Veyron (and derivatives) board device tree source
4 * Copyright 2014 Google, Inc
6 * SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
20 gpio_keys: gpio-keys {
21 pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
24 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
25 linux,code = <0>; /* SW_LID */
26 linux,input-type = <5>; /* EV_SW */
27 debounce-interval = <1>;
33 compatible = "gpio-charger";
34 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&ac_present_ap>;
37 charger-type = "mains";
40 /* A non-regulated voltage from power supply or battery */
42 compatible = "regulator-fixed";
43 regulator-name = "vccsys";
48 vcc33_sys: vcc33-sys {
49 vin-supply = <&vccsys>;
53 vin-supply = <&vccsys>;
56 /* This turns on vbus for host1 (dwc2) */
57 vcc5_host1: vcc5-host1-regulator {
58 compatible = "regulator-fixed";
60 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
61 pinctrl-names = "default";
62 pinctrl-0 = <&host1_pwr_en>;
63 regulator-name = "vcc5_host1";
68 /* This turns on vbus for otg for host mode (dwc2) */
69 vcc5v_otg: vcc5v-otg-regulator {
70 compatible = "regulator-fixed";
72 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&usbotg_pwren_h>;
75 regulator-name = "vcc5_host2";
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
88 regulator-name = "vcc33_ccd";
89 regulator-suspend-mem-disabled;
96 spi-activate-delay = <100>;
97 spi-max-frequency = <3000000>;
98 spi-deactivate-delay = <200>;
101 compatible = "google,cros-ec-spi";
102 spi-max-frequency = <3000000>;
103 interrupt-parent = <&gpio7>;
104 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
105 ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&ec_int>;
109 google,cros-ec-spi-pre-delay = <30>;
111 i2c_tunnel: i2c-tunnel {
112 compatible = "google,cros-ec-i2c-tunnel";
113 google,remote-bus = <0>;
114 #address-cells = <1>;
122 compatible = "elan,i2c_touchpad";
123 interrupt-parent = <&gpio7>;
124 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&trackpad_int>;
128 vcc-supply = <&vcc33_io>;
135 /* Common for sleep and wake, but no owners */
145 /* Common for sleep and wake, but no owners */
156 ap_lid_int_l: ap-lid-int-l {
157 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
162 ac_present_ap: ac-present-ap {
163 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
169 rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
174 sdmmc_wp_gpio: sdmmc-wp-gpio {
175 rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
180 suspend_l_wake: suspend-l-wake {
181 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
184 suspend_l_sleep: suspend-l-sleep {
185 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
190 trackpad_int: trackpad-int {
191 rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
196 host1_pwr_en: host1-pwr-en {
197 rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
200 usbotg_pwren_h: usbotg-pwren-h {
201 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
206 #include "cros-ec-keyboard.dtsi"