2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
14 model = "Rockchip RK3399 Evaluation Board";
15 compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
16 "google,rk3399evb-rev2";
20 u-boot,spl-boot-order = \
24 vdd_center: vdd-center {
25 compatible = "pwm-regulator";
26 pwms = <&pwm3 0 25000 1>;
27 regulator-name = "vdd_center";
28 regulator-min-microvolt = <800000>;
29 regulator-max-microvolt = <1400000>;
30 regulator-init-microvolt = <950000>;
37 compatible = "regulator-fixed";
38 regulator-name = "vccsys";
43 vcc3v3_sys: vcc3v3-sys {
44 compatible = "regulator-fixed";
45 regulator-name = "vcc3v3_sys";
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
52 vcc_phy: vcc-phy-regulator {
53 compatible = "regulator-fixed";
54 regulator-name = "vcc_phy";
59 vcc5v0_host: vcc5v0-host-en {
60 compatible = "regulator-fixed";
61 regulator-name = "vcc5v0_host";
62 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
65 vcc5v0_typec0: vcc5v0-typec0-en {
66 compatible = "regulator-fixed";
67 regulator-name = "vcc5v0_typec0";
68 gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
71 vcc5v0_typec1: vcc5v0-typec1-en {
72 compatible = "regulator-fixed";
73 regulator-name = "vcc5v0_typec1";
74 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
77 clkin_gmac: external-gmac-clock {
78 compatible = "fixed-clock";
79 clock-frequency = <125000000>;
80 clock-output-names = "clkin_gmac";
84 backlight: backlight {
85 compatible = "pwm-backlight";
86 power-supply = <&vccsys>;
87 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
91 16 17 18 19 20 21 22 23
92 24 25 26 27 28 29 30 31
93 32 33 34 35 36 37 38 39
94 40 41 42 43 44 45 46 47
95 48 49 50 51 52 53 54 55
96 56 57 58 59 60 61 62 63
97 64 65 66 67 68 69 70 71
98 72 73 74 75 76 77 78 79
99 80 81 82 83 84 85 86 87
100 88 89 90 91 92 93 94 95
101 96 97 98 99 100 101 102 103
102 104 105 106 107 108 109 110 111
103 112 113 114 115 116 117 118 119
104 120 121 122 123 124 125 126 127
105 128 129 130 131 132 133 134 135
106 136 137 138 139 140 141 142 143
107 144 145 146 147 148 149 150 151
108 152 153 154 155 156 157 158 159
109 160 161 162 163 164 165 166 167
110 168 169 170 171 172 173 174 175
111 176 177 178 179 180 181 182 183
112 184 185 186 187 188 189 190 191
113 192 193 194 195 196 197 198 199
114 200 201 202 203 204 205 206 207
115 208 209 210 211 212 213 214 215
116 216 217 218 219 220 221 222 223
117 224 225 226 227 228 229 230 231
118 232 233 234 235 236 237 238 239
119 240 241 242 243 244 245 246 247
120 248 249 250 251 252 253 254 255>;
121 default-brightness-level = <200>;
122 pwms = <&pwm0 0 25000 0>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pwm0_pin>;
125 pwm-delay-us = <10000>;
130 compatible = "simple-panel";
131 power-supply = <&vcc33_lcd>;
132 backlight = <&backlight>;
133 /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
167 mmc-hs400-enhanced-strobe;
185 vbus-supply = <&vcc5v0_typec0>;
198 vbus-supply = <&vcc5v0_typec1>;
204 clock-frequency = <400000>;
205 i2c-scl-falling-time-ns = <50>;
206 i2c-scl-rising-time-ns = <100>;
210 compatible = "rockchip,rk808";
211 clock-output-names = "xin32k", "wifibt_32kin";
212 interrupt-parent = <&gpio0>;
213 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pmic_int_l>;
217 rockchip,system-power-controller;
222 vcc12-supply = <&vcc3v3_sys>;
225 vcc33_lcd: SWITCH_REG2 {
228 regulator-name = "vcc33_lcd";
236 rockchip,panel = <&panel>;
239 bits-per-pixel = <24>;
240 clock-frequency = <160000000>;
241 hfront-porch = <120>;
252 pixelclk-active = <0>;
259 pmic_int_l: pmic-int-l {
261 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
264 pmic_dvs2: pmic-dvs2 {
266 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
272 phy-supply = <&vcc_phy>;
274 clock_in_out = "input";
275 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
276 snps,reset-active-low;
277 snps,reset-delays-us = <0 10000 50000>;
278 assigned-clocks = <&cru SCLK_RMII_SRC>;
279 assigned-clock-parents = <&clkin_gmac>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&rgmii_pins>;