git.sur5r.net Git - u-boot/blob - arch/arm/dts/rk3399-puma.dts

   1 /*
   2  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /dts-v1/;
   8 #include <dt-bindings/pwm/pwm.h>
   9 #include "rk3399.dtsi"
  10 #include "rk3399-sdram-ddr3-1333.dtsi"
  11
  12 / {
  13         model = "Theobroma Systems RK3399-Q7 SoM";
  14         compatible = "tsd,puma", "rockchip,rk3399";
  15
  16         chosen {
  17                 stdout-path = "serial0:115200n8";
  18                 u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc;
  19         };
  20
  21         aliases {
  22                 spi0 = &spi1;
  23                 spi1 = &spi5;
  24         };
  25
  26         vdd_center: vdd-center {
  27                 compatible = "pwm-regulator";
  28                 pwms = <&pwm3 0 25000 0>;
  29                 regulator-name = "vdd_center";
  30                 regulator-min-microvolt = <800000>;
  31                 regulator-max-microvolt = <1400000>;
  32                 regulator-init-microvolt = <950000>;
  33                 regulator-always-on;
  34                 regulator-boot-on;
  35                 status = "okay";
  36         };
  37
  38         vcc3v3_sys: vcc3v3-sys {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "vcc3v3_sys";
  41                 regulator-always-on;
  42                 regulator-boot-on;
  43                 regulator-min-microvolt = <3300000>;
  44                 regulator-max-microvolt = <3300000>;
  45         };
  46
  47         vcc_phy: vcc-phy-regulator {
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "vcc_phy";
  50                 regulator-always-on;
  51                 regulator-boot-on;
  52         };
  53
  54         vcc5v0_host: vcc5v0-host-en {
  55                 compatible = "regulator-fixed";
  56                 regulator-name = "vcc5v0_host";
  57                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  58         };
  59
  60         clkin_gmac: external-gmac-clock {
  61                 compatible = "fixed-clock";
  62                 clock-frequency = <125000000>;
  63                 clock-output-names = "clkin_gmac";
  64                 #clock-cells = <0>;
  65         };
  66
  67         vcc_phy: vcc-phy-regulator {
  68                 compatible = "regulator-fixed";
  69                 regulator-name = "vcc_phy";
  70                 regulator-always-on;
  71                 regulator-boot-on;
  72         };
  73 };
  74
  75 &emmc_phy {
  76         status = "okay";
  77 };
  78
  79 &pwm0 {
  80         status = "okay";
  81 };
  82
  83 &pwm2 {
  84         status = "okay";
  85 };
  86
  87 &pwm3 {
  88         status = "okay";
  89 };
  90
  91 &sdmmc {
  92         u-boot,dm-pre-reloc;
  93         bus-width = <4>;
  94         fifo-mode; /* until we fix DMA in SPL */
  95         status = "okay";
  96 };
  97
  98 &sdhci {
  99         bus-width = <8>;
 100         mmc-hs400-1_8v;
 101         mmc-hs400-enhanced-strobe;
 102         non-removable;
 103         status = "okay";
 104 };
 105
 106 &uart0 {
 107         status = "okay";
 108 };
 109
 110 &uart2 {
 111         status = "okay";
 112 };
 113
 114 &usb_host0_ehci {
 115         status = "okay";
 116 };
 117
 118 &usb_host0_ohci {
 119         status = "okay";
 120 };
 121
 122 &dwc3_typec0 {
 123         status = "okay";
 124 };
 125
 126 &usb_host1_ehci {
 127         status = "okay";
 128 };
 129
 130 &usb_host1_ohci {
 131         status = "okay";
 132 };
 133
 134 &dwc3_typec1 {
 135         status = "okay";
 136 };
 137
 138 &pinctrl {
 139         pmic {
 140                 pmic_int_l: pmic-int-l {
 141                         rockchip,pins =
 142                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 143                 };
 144
 145                 pmic_dvs2: pmic-dvs2 {
 146                         rockchip,pins =
 147                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 148                 };
 149         };
 150 };
 151
 152 &gmac {
 153         phy-supply = <&vcc_phy>;
 154         phy-mode = "rgmii";
 155         clock_in_out = "input";
 156         snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
 157         snps,reset-active-low;
 158         snps,reset-delays-us = <0 10000 50000>;
 159         assigned-clocks = <&cru SCLK_RMII_SRC>;
 160         assigned-clock-parents = <&clkin_gmac>;
 161         pinctrl-names = "default";
 162         pinctrl-0 = <&rgmii_pins>;
 163         tx_delay = <0x10>;
 164         rx_delay = <0x10>;
 165         status = "okay";
 166 };
 167
 168 &spi1 {
 169         u-boot,dm-pre-reloc;
 170
 171         status = "okay";
 172
 173         #address-cells = <1>;
 174         #size-cells = <0>;
 175
 176         spiflash: w25q32dw@0 {
 177                 u-boot,dm-pre-reloc;
 178
 179                 compatible = "spi-flash";
 180                 reg = <0>;
 181                 spi-max-frequency = <5000000>;
 182                 spi-cpol;
 183                 spi-cpha;
 184         };
 185 };
 186
 187 &spi5 {
 188         status = "okay";
 189 };