git.sur5r.net Git - u-boot/blob - arch/arm/dts/salvator-common.dtsi

   1 /*
   2  * Device Tree Source for common parts of Salvator-X board variants
   3  *
   4  * Copyright (C) 2015-2016 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /*
  12  * SSI-AK4613
  13  *
  14  * This command is required when Playback/Capture
  15  *
  16  *      amixer set "DVC Out" 100%
  17  *      amixer set "DVC In" 100%
  18  *
  19  * You can use Mute
  20  *
  21  *      amixer set "DVC Out Mute" on
  22  *      amixer set "DVC In Mute" on
  23  *
  24  * You can use Volume Ramp
  25  *
  26  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
  27  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  28  *      amixer set "DVC Out Ramp" on
  29  *      aplay xxx.wav &
  30  *      amixer set "DVC Out"  80%  // Volume Down
  31  *      amixer set "DVC Out" 100%  // Volume Up
  32  */
  33
  34 #include <dt-bindings/gpio/gpio.h>
  35
  36 / {
  37         aliases {
  38                 serial0 = &scif2;
  39                 serial1 = &scif1;
  40                 ethernet0 = &avb;
  41         };
  42
  43         chosen {
  44                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  45                 stdout-path = "serial0:115200n8";
  46         };
  47
  48         audio_clkout: audio-clkout {
  49                 /*
  50                  * This is same as <&rcar_sound 0>
  51                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  52                  */
  53                 compatible = "fixed-clock";
  54                 #clock-cells = <0>;
  55                 clock-frequency = <11289600>;
  56         };
  57
  58         backlight: backlight {
  59                 compatible = "pwm-backlight";
  60                 pwms = <&pwm1 0 50000>;
  61
  62                 brightness-levels = <256 128 64 16 8 4 0>;
  63                 default-brightness-level = <6>;
  64
  65                 enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  66         };
  67
  68         reg_1p8v: regulator0 {
  69                 compatible = "regulator-fixed";
  70                 regulator-name = "fixed-1.8V";
  71                 regulator-min-microvolt = <1800000>;
  72                 regulator-max-microvolt = <1800000>;
  73                 regulator-boot-on;
  74                 regulator-always-on;
  75         };
  76
  77         reg_3p3v: regulator1 {
  78                 compatible = "regulator-fixed";
  79                 regulator-name = "fixed-3.3V";
  80                 regulator-min-microvolt = <3300000>;
  81                 regulator-max-microvolt = <3300000>;
  82                 regulator-boot-on;
  83                 regulator-always-on;
  84         };
  85
  86         rsnd_ak4613: sound {
  87                 compatible = "simple-audio-card";
  88
  89                 simple-audio-card,format = "left_j";
  90                 simple-audio-card,bitclock-master = <&sndcpu>;
  91                 simple-audio-card,frame-master = <&sndcpu>;
  92
  93                 sndcpu: simple-audio-card,cpu {
  94                         sound-dai = <&rcar_sound>;
  95                 };
  96
  97                 sndcodec: simple-audio-card,codec {
  98                         sound-dai = <&ak4613>;
  99                 };
 100         };
 101
 102         vbus0_usb2: regulator-vbus0-usb2 {
 103                 compatible = "regulator-fixed";
 104
 105                 regulator-name = "USB20_VBUS0";
 106                 regulator-min-microvolt = <5000000>;
 107                 regulator-max-microvolt = <5000000>;
 108
 109                 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
 110                 enable-active-high;
 111         };
 112
 113         vcc_sdhi0: regulator-vcc-sdhi0 {
 114                 compatible = "regulator-fixed";
 115
 116                 regulator-name = "SDHI0 Vcc";
 117                 regulator-min-microvolt = <3300000>;
 118                 regulator-max-microvolt = <3300000>;
 119
 120                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 121                 enable-active-high;
 122         };
 123
 124         vccq_sdhi0: regulator-vccq-sdhi0 {
 125                 compatible = "regulator-gpio";
 126
 127                 regulator-name = "SDHI0 VccQ";
 128                 regulator-min-microvolt = <1800000>;
 129                 regulator-max-microvolt = <3300000>;
 130
 131                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 132                 gpios-states = <1>;
 133                 states = <3300000 1
 134                           1800000 0>;
 135         };
 136
 137         vcc_sdhi3: regulator-vcc-sdhi3 {
 138                 compatible = "regulator-fixed";
 139
 140                 regulator-name = "SDHI3 Vcc";
 141                 regulator-min-microvolt = <3300000>;
 142                 regulator-max-microvolt = <3300000>;
 143
 144                 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
 145                 enable-active-high;
 146         };
 147
 148         vccq_sdhi3: regulator-vccq-sdhi3 {
 149                 compatible = "regulator-gpio";
 150
 151                 regulator-name = "SDHI3 VccQ";
 152                 regulator-min-microvolt = <1800000>;
 153                 regulator-max-microvolt = <3300000>;
 154
 155                 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
 156                 gpios-states = <1>;
 157                 states = <3300000 1
 158                           1800000 0>;
 159         };
 160
 161         hdmi0-out {
 162                 compatible = "hdmi-connector";
 163                 label = "HDMI0 OUT";
 164                 type = "a";
 165
 166                 port {
 167                         hdmi0_con: endpoint {
 168                         };
 169                 };
 170         };
 171
 172         hdmi1-out {
 173                 compatible = "hdmi-connector";
 174                 label = "HDMI1 OUT";
 175                 type = "a";
 176
 177                 port {
 178                         hdmi1_con: endpoint {
 179                         };
 180                 };
 181         };
 182
 183         vga {
 184                 compatible = "vga-connector";
 185
 186                 port {
 187                         vga_in: endpoint {
 188                                 remote-endpoint = <&adv7123_out>;
 189                         };
 190                 };
 191         };
 192
 193         vga-encoder {
 194                 compatible = "adi,adv7123";
 195
 196                 ports {
 197                         #address-cells = <1>;
 198                         #size-cells = <0>;
 199
 200                         port@0 {
 201                                 reg = <0>;
 202                                 adv7123_in: endpoint {
 203                                         remote-endpoint = <&du_out_rgb>;
 204                                 };
 205                         };
 206                         port@1 {
 207                                 reg = <1>;
 208                                 adv7123_out: endpoint {
 209                                         remote-endpoint = <&vga_in>;
 210                                 };
 211                         };
 212                 };
 213         };
 214
 215         x12_clk: x12 {
 216                 compatible = "fixed-clock";
 217                 #clock-cells = <0>;
 218                 clock-frequency = <24576000>;
 219         };
 220
 221         /* External DU dot clocks */
 222         x21_clk: x21-clock {
 223                 compatible = "fixed-clock";
 224                 #clock-cells = <0>;
 225                 clock-frequency = <33000000>;
 226         };
 227
 228         x22_clk: x22-clock {
 229                 compatible = "fixed-clock";
 230                 #clock-cells = <0>;
 231                 clock-frequency = <33000000>;
 232         };
 233
 234         x23_clk: x23-clock {
 235                 compatible = "fixed-clock";
 236                 #clock-cells = <0>;
 237                 clock-frequency = <25000000>;
 238         };
 239 };
 240
 241 &audio_clk_a {
 242         clock-frequency = <22579200>;
 243 };
 244
 245 &avb {
 246         pinctrl-0 = <&avb_pins>;
 247         pinctrl-names = "default";
 248         renesas,no-ether-link;
 249         phy-handle = <&phy0>;
 250         reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 251         status = "okay";
 252
 253         phy0: ethernet-phy@0 {
 254                 rxc-skew-ps = <1500>;
 255                 reg = <0>;
 256                 interrupt-parent = <&gpio2>;
 257                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 258         };
 259 };
 260
 261 &du {
 262         pinctrl-0 = <&du_pins>;
 263         pinctrl-names = "default";
 264         status = "okay";
 265
 266         ports {
 267                 port@0 {
 268                         endpoint {
 269                                 remote-endpoint = <&adv7123_in>;
 270                         };
 271                 };
 272                 port@3 {
 273                         lvds_connector: endpoint {
 274                         };
 275                 };
 276         };
 277 };
 278
 279 &ehci0 {
 280         status = "okay";
 281 };
 282
 283 &ehci1 {
 284         status = "okay";
 285 };
 286
 287 &extalr_clk {
 288         clock-frequency = <32768>;
 289 };
 290
 291 &hsusb {
 292         status = "okay";
 293 };
 294
 295 &i2c2 {
 296         pinctrl-0 = <&i2c2_pins>;
 297         pinctrl-names = "default";
 298
 299         status = "okay";
 300
 301         clock-frequency = <100000>;
 302
 303         ak4613: codec@10 {
 304                 compatible = "asahi-kasei,ak4613";
 305                 #sound-dai-cells = <0>;
 306                 reg = <0x10>;
 307                 clocks = <&rcar_sound 3>;
 308
 309                 asahi-kasei,in1-single-end;
 310                 asahi-kasei,in2-single-end;
 311                 asahi-kasei,out1-single-end;
 312                 asahi-kasei,out2-single-end;
 313                 asahi-kasei,out3-single-end;
 314                 asahi-kasei,out4-single-end;
 315                 asahi-kasei,out5-single-end;
 316                 asahi-kasei,out6-single-end;
 317         };
 318
 319         cs2000: clk_multiplier@4f {
 320                 #clock-cells = <0>;
 321                 compatible = "cirrus,cs2000-cp";
 322                 reg = <0x4f>;
 323                 clocks = <&audio_clkout>, <&x12_clk>;
 324                 clock-names = "clk_in", "ref_clk";
 325
 326                 assigned-clocks = <&cs2000>;
 327                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 328         };
 329 };
 330
 331 &i2c4 {
 332         status = "okay";
 333
 334         csa_vdd: adc@7c {
 335                 compatible = "maxim,max9611";
 336                 reg = <0x7c>;
 337
 338                 shunt-resistor-micro-ohms = <5000>;
 339         };
 340
 341         csa_dvfs: adc@7f {
 342                 compatible = "maxim,max9611";
 343                 reg = <0x7f>;
 344
 345                 shunt-resistor-micro-ohms = <5000>;
 346         };
 347 };
 348
 349 &i2c_dvfs {
 350         status = "okay";
 351 };
 352
 353 &ohci0 {
 354         status = "okay";
 355 };
 356
 357 &ohci1 {
 358         status = "okay";
 359 };
 360
 361 &pcie_bus_clk {
 362         clock-frequency = <100000000>;
 363 };
 364
 365 &pciec0 {
 366         status = "okay";
 367 };
 368
 369 &pciec1 {
 370         status = "okay";
 371 };
 372
 373 &pfc {
 374         pinctrl-0 = <&scif_clk_pins>;
 375         pinctrl-names = "default";
 376
 377         avb_pins: avb {
 378                 mux {
 379                         groups = "avb_link", "avb_phy_int", "avb_mdc",
 380                                  "avb_mii";
 381                         function = "avb";
 382                 };
 383
 384                 pins_mdc {
 385                         groups = "avb_mdc";
 386                         drive-strength = <24>;
 387                 };
 388
 389                 pins_mii_tx {
 390                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 391                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 392                         drive-strength = <12>;
 393                 };
 394         };
 395
 396         du_pins: du {
 397                 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
 398                 function = "du";
 399         };
 400
 401         i2c2_pins: i2c2 {
 402                 groups = "i2c2_a";
 403                 function = "i2c2";
 404         };
 405
 406         pwm1_pins: pwm1 {
 407                 groups = "pwm1_a";
 408                 function = "pwm1";
 409         };
 410
 411         scif1_pins: scif1 {
 412                 groups = "scif1_data_a", "scif1_ctrl";
 413                 function = "scif1";
 414         };
 415
 416         scif2_pins: scif2 {
 417                 groups = "scif2_data_a";
 418                 function = "scif2";
 419         };
 420
 421         scif_clk_pins: scif_clk {
 422                 groups = "scif_clk_a";
 423                 function = "scif_clk";
 424         };
 425
 426         sdhi0_pins: sd0 {
 427                 groups = "sdhi0_data4", "sdhi0_ctrl";
 428                 function = "sdhi0";
 429                 power-source = <3300>;
 430         };
 431
 432         sdhi0_pins_uhs: sd0_uhs {
 433                 groups = "sdhi0_data4", "sdhi0_ctrl";
 434                 function = "sdhi0";
 435                 power-source = <1800>;
 436         };
 437
 438         sdhi2_pins: sd2 {
 439                 groups = "sdhi2_data8", "sdhi2_ctrl";
 440                 function = "sdhi2";
 441                 power-source = <3300>;
 442         };
 443
 444         sdhi2_pins_uhs: sd2_uhs {
 445                 groups = "sdhi2_data8", "sdhi2_ctrl";
 446                 function = "sdhi2";
 447                 power-source = <1800>;
 448         };
 449
 450         sdhi3_pins: sd3 {
 451                 groups = "sdhi3_data4", "sdhi3_ctrl";
 452                 function = "sdhi3";
 453                 power-source = <3300>;
 454         };
 455
 456         sdhi3_pins_uhs: sd3_uhs {
 457                 groups = "sdhi3_data4", "sdhi3_ctrl";
 458                 function = "sdhi3";
 459                 power-source = <1800>;
 460         };
 461
 462         sound_pins: sound {
 463                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 464                 function = "ssi";
 465         };
 466
 467         sound_clk_pins: sound_clk {
 468                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 469                          "audio_clkout_a", "audio_clkout3_a";
 470                 function = "audio_clk";
 471         };
 472
 473         usb0_pins: usb0 {
 474                 groups = "usb0";
 475                 function = "usb0";
 476         };
 477
 478         usb1_pins: usb1 {
 479                 mux {
 480                         groups = "usb1";
 481                         function = "usb1";
 482                 };
 483
 484                 ovc {
 485                         pins = "GP_6_27";
 486                         bias-pull-up;
 487                 };
 488
 489                 pwen {
 490                         pins = "GP_6_26";
 491                         bias-pull-down;
 492                 };
 493         };
 494 };
 495
 496 &pwm1 {
 497         pinctrl-0 = <&pwm1_pins>;
 498         pinctrl-names = "default";
 499
 500         status = "okay";
 501 };
 502
 503 &rcar_sound {
 504         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 505         pinctrl-names = "default";
 506
 507         /* Single DAI */
 508         #sound-dai-cells = <0>;
 509
 510         /* audio_clkout0/1/2/3 */
 511         #clock-cells = <1>;
 512         clock-frequency = <12288000 11289600>;
 513
 514         status = "okay";
 515
 516         /* update <audio_clk_b> to <cs2000> */
 517         clocks = <&cpg CPG_MOD 1005>,
 518                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 519                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 520                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 521                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 522                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 523                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 524                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 525                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 526                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 527                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 528                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 529                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 530                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 531                  <&audio_clk_a>, <&cs2000>,
 532                  <&audio_clk_c>,
 533                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 534
 535         rcar_sound,dai {
 536                 dai0 {
 537                         playback = <&ssi0 &src0 &dvc0>;
 538                         capture  = <&ssi1 &src1 &dvc1>;
 539                 };
 540         };
 541 };
 542
 543 &scif1 {
 544         pinctrl-0 = <&scif1_pins>;
 545         pinctrl-names = "default";
 546
 547         uart-has-rtscts;
 548         status = "okay";
 549 };
 550
 551 &scif2 {
 552         pinctrl-0 = <&scif2_pins>;
 553         pinctrl-names = "default";
 554
 555         status = "okay";
 556 };
 557
 558 &scif_clk {
 559         clock-frequency = <14745600>;
 560 };
 561
 562 &sdhi0 {
 563         pinctrl-0 = <&sdhi0_pins>;
 564         pinctrl-1 = <&sdhi0_pins_uhs>;
 565         pinctrl-names = "default", "state_uhs";
 566
 567         vmmc-supply = <&vcc_sdhi0>;
 568         vqmmc-supply = <&vccq_sdhi0>;
 569         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 570         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 571         bus-width = <4>;
 572         sd-uhs-sdr50;
 573         sd-uhs-sdr104;
 574         status = "okay";
 575
 576         max-frequency = <208000000>;
 577 };
 578
 579 &sdhi2 {
 580         /* used for on-board 8bit eMMC */
 581         pinctrl-0 = <&sdhi2_pins>;
 582         pinctrl-1 = <&sdhi2_pins_uhs>;
 583         pinctrl-names = "default", "state_uhs";
 584
 585         vmmc-supply = <&reg_3p3v>;
 586         vqmmc-supply = <&reg_1p8v>;
 587         bus-width = <8>;
 588         mmc-ddr-1_8v;
 589         mmc-hs200-1_8v;
 590         non-removable;
 591         status = "okay";
 592
 593         max-frequency = <200000000>;
 594 };
 595
 596 &sdhi3 {
 597         pinctrl-0 = <&sdhi3_pins>;
 598         pinctrl-1 = <&sdhi3_pins_uhs>;
 599         pinctrl-names = "default", "state_uhs";
 600
 601         vmmc-supply = <&vcc_sdhi3>;
 602         vqmmc-supply = <&vccq_sdhi3>;
 603         cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 604         wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
 605         bus-width = <4>;
 606         sd-uhs-sdr50;
 607         sd-uhs-sdr104;
 608         status = "okay";
 609
 610         max-frequency = <208000000>;
 611 };
 612
 613 &ssi1 {
 614         shared-pin;
 615 };
 616
 617 &usb2_phy0 {
 618         pinctrl-0 = <&usb0_pins>;
 619         pinctrl-names = "default";
 620
 621         vbus-supply = <&vbus0_usb2>;
 622         status = "okay";
 623 };
 624
 625 &usb2_phy1 {
 626         pinctrl-0 = <&usb1_pins>;
 627         pinctrl-names = "default";
 628
 629         status = "okay";
 630 };
 631
 632 &wdt0 {
 633         timeout-sec = <60>;
 634         status = "okay";
 635 };
 636
 637 &xhci0 {
 638         status = "okay";
 639 };