2 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
4 * Copyright (C) 2014 Atmel,
5 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
46 #include "skeleton.dtsi"
47 #include <dt-bindings/clock/at91.h>
48 #include <dt-bindings/dma/at91.h>
49 #include <dt-bindings/pinctrl/at91.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
51 #include <dt-bindings/gpio/gpio.h>
54 model = "Atmel SAMA5D4 family SoC";
55 compatible = "atmel,sama5d4";
56 interrupt-parent = <&aic>;
86 compatible = "arm,cortex-a5";
88 next-level-cache = <&L2>;
93 reg = <0x20000000 0x20000000>;
97 slow_xtal: slow_xtal {
98 compatible = "fixed-clock";
100 clock-frequency = <0>;
103 main_xtal: main_xtal {
104 compatible = "fixed-clock";
106 clock-frequency = <0>;
109 adc_op_clk: adc_op_clk{
110 compatible = "fixed-clock";
112 clock-frequency = <1000000>;
116 ns_sram: sram@00210000 {
117 compatible = "mmio-sram";
118 reg = <0x00210000 0x10000>;
122 compatible = "simple-bus";
123 #address-cells = <1>;
128 usb0: gadget@00400000 {
129 #address-cells = <1>;
131 compatible = "atmel,sama5d3-udc";
132 reg = <0x00400000 0x100000
134 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
135 clocks = <&udphs_clk>, <&utmi>;
136 clock-names = "pclk", "hclk";
141 atmel,fifo-size = <64>;
142 atmel,nb-banks = <1>;
147 atmel,fifo-size = <1024>;
148 atmel,nb-banks = <3>;
155 atmel,fifo-size = <1024>;
156 atmel,nb-banks = <3>;
163 atmel,fifo-size = <1024>;
164 atmel,nb-banks = <2>;
171 atmel,fifo-size = <1024>;
172 atmel,nb-banks = <2>;
179 atmel,fifo-size = <1024>;
180 atmel,nb-banks = <2>;
187 atmel,fifo-size = <1024>;
188 atmel,nb-banks = <2>;
195 atmel,fifo-size = <1024>;
196 atmel,nb-banks = <2>;
203 atmel,fifo-size = <1024>;
204 atmel,nb-banks = <2>;
210 atmel,fifo-size = <1024>;
211 atmel,nb-banks = <2>;
217 atmel,fifo-size = <1024>;
218 atmel,nb-banks = <2>;
224 atmel,fifo-size = <1024>;
225 atmel,nb-banks = <2>;
231 atmel,fifo-size = <1024>;
232 atmel,nb-banks = <2>;
238 atmel,fifo-size = <1024>;
239 atmel,nb-banks = <2>;
245 atmel,fifo-size = <1024>;
246 atmel,nb-banks = <2>;
252 atmel,fifo-size = <1024>;
253 atmel,nb-banks = <2>;
258 usb1: ohci@00500000 {
259 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
260 reg = <0x00500000 0x100000>;
261 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
262 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
263 clock-names = "ohci_clk", "hclk", "uhpck";
267 usb2: ehci@00600000 {
268 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
269 reg = <0x00600000 0x100000>;
270 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
271 clocks = <&utmi>, <&uhphs_clk>;
272 clock-names = "usb_clk", "ehci_clk";
276 L2: cache-controller@00a00000 {
277 compatible = "arm,pl310-cache";
278 reg = <0x00a00000 0x1000>;
279 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
284 nand0: nand@80000000 {
285 compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand";
286 #address-cells = <1>;
289 reg = < 0x80000000 0x08000000 /* EBI CS3 */
290 0xfc05c070 0x00000490 /* SMC PMECC regs */
291 0xfc05c500 0x00000100 /* SMC PMECC Error Location regs */
293 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
294 atmel,nand-addr-offset = <21>;
295 atmel,nand-cmd-offset = <22>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_nand>;
302 compatible = "atmel,sama5d3-nfc";
303 #address-cells = <1>;
306 0x90000000 0x08000000 /* NFC Command Registers */
307 0xfc05c000 0x00000070 /* NFC HSMC regs */
308 0x00100000 0x00100000 /* NFC SRAM banks */
310 clocks = <&hsmc_clk>;
316 compatible = "simple-bus";
317 #address-cells = <1>;
322 hlcdc: hlcdc@f0000000 {
323 compatible = "atmel,sama5d4-hlcdc";
324 reg = <0xf0000000 0x4000>;
325 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
326 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
327 clock-names = "periph_clk","sys_clk", "slow_clk";
330 hlcdc-display-controller {
331 compatible = "atmel,hlcdc-display-controller";
332 #address-cells = <1>;
336 #address-cells = <1>;
342 hlcdc_pwm: hlcdc-pwm {
343 compatible = "atmel,hlcdc-pwm";
344 pinctrl-names = "default";
345 pinctrl-0 = <&pinctrl_lcd_pwm>;
350 dma1: dma-controller@f0004000 {
351 compatible = "atmel,sama5d4-dma";
352 reg = <0xf0004000 0x200>;
353 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
355 clocks = <&dma1_clk>;
356 clock-names = "dma_clk";
360 compatible = "atmel,at91sam9g45-isi";
361 reg = <0xf0008000 0x4000>;
362 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_isi_data_0_7>;
366 clock-names = "isi_clk";
369 #address-cells = <1>;
374 ramc0: ramc@f0010000 {
375 compatible = "atmel,sama5d3-ddramc";
376 reg = <0xf0010000 0x200>;
377 clocks = <&ddrck>, <&mpddr_clk>;
378 clock-names = "ddrck", "mpddr";
381 dma0: dma-controller@f0014000 {
382 compatible = "atmel,sama5d4-dma";
383 reg = <0xf0014000 0x200>;
384 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
386 clocks = <&dma0_clk>;
387 clock-names = "dma_clk";
391 compatible = "atmel,sama5d3-pmc", "syscon";
392 reg = <0xf0018000 0x120>;
393 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
394 interrupt-controller;
395 #address-cells = <1>;
397 #interrupt-cells = <1>;
400 main_rc_osc: main_rc_osc {
401 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
403 interrupt-parent = <&pmc>;
404 interrupts = <AT91_PMC_MOSCRCS>;
405 clock-frequency = <12000000>;
406 clock-accuracy = <100000000>;
410 compatible = "atmel,at91rm9200-clk-main-osc";
412 interrupt-parent = <&pmc>;
413 interrupts = <AT91_PMC_MOSCS>;
414 clocks = <&main_xtal>;
418 compatible = "atmel,at91sam9x5-clk-main";
420 interrupt-parent = <&pmc>;
421 interrupts = <AT91_PMC_MOSCSELS>;
422 clocks = <&main_rc_osc &main_osc>;
427 compatible = "atmel,sama5d3-clk-pll";
429 interrupt-parent = <&pmc>;
430 interrupts = <AT91_PMC_LOCKA>;
433 atmel,clk-input-range = <12000000 12000000>;
434 #atmel,pll-clk-output-range-cells = <4>;
435 atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
439 compatible = "atmel,at91sam9x5-clk-plldiv";
445 compatible = "atmel,at91sam9x5-clk-utmi";
447 interrupt-parent = <&pmc>;
448 interrupts = <AT91_PMC_LOCKU>;
454 compatible = "atmel,at91sam9x5-clk-master";
456 interrupt-parent = <&pmc>;
457 interrupts = <AT91_PMC_MCKRDY>;
458 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
459 atmel,clk-output-range = <125000000 200000000>;
460 atmel,clk-divisors = <1 2 4 3>;
465 compatible = "atmel,sama5d4-clk-h32mx";
471 compatible = "atmel,at91sam9x5-clk-usb";
473 clocks = <&plladiv>, <&utmi>;
477 compatible = "atmel,at91sam9x5-clk-programmable";
478 #address-cells = <1>;
480 interrupt-parent = <&pmc>;
481 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
486 interrupts = <AT91_PMC_PCKRDY(0)>;
492 interrupts = <AT91_PMC_PCKRDY(1)>;
498 interrupts = <AT91_PMC_PCKRDY(2)>;
503 compatible = "atmel,at91sam9x5-clk-smd";
505 clocks = <&plladiv>, <&utmi>;
509 compatible = "atmel,at91rm9200-clk-system";
510 #address-cells = <1>;
564 compatible = "atmel,at91sam9x5-clk-peripheral";
565 #address-cells = <1>;
570 pioD_clk: pioD_clk@5 {
576 usart0_clk: usart0_clk@6 {
581 usart1_clk: usart1_clk@7 {
591 aes_clk: aes_clk@12 {
596 tdes_clk: tdes_clk@14 {
601 sha_clk: sha_clk@15 {
606 matrix1_clk: matrix1_clk@17 {
611 hsmc_clk: hsmc_clk@22 {
616 pioA_clk: pioA_clk@23 {
622 pioB_clk: pioB_clk@24 {
628 pioC_clk: pioC_clk@25 {
634 pioE_clk: pioE_clk@26 {
640 uart0_clk: uart0_clk@27 {
645 uart1_clk: uart1_clk@28 {
650 usart2_clk: usart2_clk@29 {
655 usart3_clk: usart3_clk@30 {
661 usart4_clk: usart4_clk@31 {
666 twi0_clk: twi0_clk@32 {
671 twi1_clk: twi1_clk@33 {
676 twi2_clk: twi2_clk@34 {
681 mci0_clk: mci0_clk@35 {
686 mci1_clk: mci1_clk@36 {
692 spi0_clk: spi0_clk@37 {
698 spi1_clk: spi1_clk@38 {
703 spi2_clk: spi2_clk@39 {
708 tcb0_clk: tcb0_clk@40 {
713 tcb1_clk: tcb1_clk@41 {
718 tcb2_clk: tcb2_clk@42 {
723 pwm_clk: pwm_clk@43 {
728 adc_clk: adc_clk@44 {
733 dbgu_clk: dbgu_clk@45 {
738 uhphs_clk: uhphs_clk@46 {
743 udphs_clk: udphs_clk@47 {
748 ssc0_clk: ssc0_clki@48 {
753 ssc1_clk: ssc1_clk@49 {
758 trng_clk: trng_clk@53 {
763 macb0_clk: macb0_clk@54 {
768 macb1_clk: macb1_clk@55 {
773 fuse_clk: fuse_clk@57 {
778 securam_clk: securam_clk@59 {
783 smd_clk: smd_clk@61 {
788 twi3_clk: twi3_clk@62 {
793 catb_clk: catb_clk@63 {
800 compatible = "atmel,at91sam9x5-clk-peripheral";
801 #address-cells = <1>;
805 dma0_clk: dma0_clk@8 {
810 cpkcc_clk: cpkcc_clk@10 {
815 aesb_clk: aesb_clk@13 {
820 mpddr_clk: mpddr_clk@16 {
825 matrix0_clk: matrix0_clk@18 {
830 vdec_clk: vdec_clk@19 {
835 dma1_clk: dma1_clk@50 {
840 lcdc_clk: lcdc_clk@51 {
845 isi_clk: isi_clk@52 {
853 compatible = "atmel,hsmci";
854 reg = <0xf8000000 0x600>;
855 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
857 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
858 | AT91_XDMAC_DT_PERID(0))>;
860 pinctrl-names = "default";
861 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
863 #address-cells = <1>;
865 clocks = <&mci0_clk>;
866 clock-names = "mci_clk";
869 uart0: serial@f8004000 {
870 compatible = "atmel,at91sam9260-usart";
871 reg = <0xf8004000 0x100>;
872 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
874 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
875 | AT91_XDMAC_DT_PERID(22))>,
877 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
878 | AT91_XDMAC_DT_PERID(23))>;
879 dma-names = "tx", "rx";
880 pinctrl-names = "default";
881 pinctrl-0 = <&pinctrl_uart0>;
882 clocks = <&uart0_clk>;
883 clock-names = "usart";
888 compatible = "atmel,at91sam9g45-ssc";
889 reg = <0xf8008000 0x4000>;
890 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
891 pinctrl-names = "default";
892 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
894 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
895 | AT91_XDMAC_DT_PERID(26))>,
897 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
898 | AT91_XDMAC_DT_PERID(27))>;
899 dma-names = "tx", "rx";
900 clocks = <&ssc0_clk>;
901 clock-names = "pclk";
906 compatible = "atmel,sama5d3-pwm";
907 reg = <0xf800c000 0x300>;
908 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
915 #address-cells = <1>;
917 compatible = "atmel,at91rm9200-spi";
918 reg = <0xf8010000 0x100>;
919 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
921 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
922 | AT91_XDMAC_DT_PERID(10))>,
924 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
925 | AT91_XDMAC_DT_PERID(11))>;
926 dma-names = "tx", "rx";
927 pinctrl-names = "default";
928 pinctrl-0 = <&pinctrl_spi0>;
929 clocks = <&spi0_clk>;
930 clock-names = "spi_clk";
935 compatible = "atmel,sama5d4-i2c";
936 reg = <0xf8014000 0x4000>;
937 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
939 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
940 | AT91_XDMAC_DT_PERID(2))>,
942 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
943 | AT91_XDMAC_DT_PERID(3))>;
944 dma-names = "tx", "rx";
945 pinctrl-names = "default";
946 pinctrl-0 = <&pinctrl_i2c0>;
947 #address-cells = <1>;
949 clocks = <&twi0_clk>;
954 compatible = "atmel,sama5d4-i2c";
955 reg = <0xf8018000 0x4000>;
956 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
958 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
959 | AT91_XDMAC_DT_PERID(4))>,
961 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
962 | AT91_XDMAC_DT_PERID(5))>;
963 dma-names = "tx", "rx";
964 pinctrl-names = "default";
965 pinctrl-0 = <&pinctrl_i2c1>;
966 #address-cells = <1>;
968 clocks = <&twi1_clk>;
972 tcb0: timer@f801c000 {
973 compatible = "atmel,at91sam9x5-tcb";
974 reg = <0xf801c000 0x100>;
975 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
976 clocks = <&tcb0_clk>, <&clk32k>;
977 clock-names = "t0_clk", "slow_clk";
980 macb0: ethernet@f8020000 {
981 compatible = "atmel,sama5d4-gem";
982 reg = <0xf8020000 0x100>;
983 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
984 pinctrl-names = "default";
985 pinctrl-0 = <&pinctrl_macb0_rmii>;
986 #address-cells = <1>;
988 clocks = <&macb0_clk>, <&macb0_clk>;
989 clock-names = "hclk", "pclk";
994 compatible = "atmel,sama5d4-i2c";
995 reg = <0xf8024000 0x4000>;
996 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
998 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
999 | AT91_XDMAC_DT_PERID(6))>,
1001 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1002 | AT91_XDMAC_DT_PERID(7))>;
1003 dma-names = "tx", "rx";
1004 pinctrl-names = "default";
1005 pinctrl-0 = <&pinctrl_i2c2>;
1006 #address-cells = <1>;
1008 clocks = <&twi2_clk>;
1009 status = "disabled";
1013 compatible = "atmel,sama5d4-sfr", "syscon";
1014 reg = <0xf8028000 0x60>;
1017 usart0: serial@f802c000 {
1018 compatible = "atmel,at91sam9260-usart";
1019 reg = <0xf802c000 0x100>;
1020 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
1022 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1023 | AT91_XDMAC_DT_PERID(36))>,
1025 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1026 | AT91_XDMAC_DT_PERID(37))>;
1027 dma-names = "tx", "rx";
1028 pinctrl-names = "default";
1029 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
1030 clocks = <&usart0_clk>;
1031 clock-names = "usart";
1032 status = "disabled";
1035 usart1: serial@f8030000 {
1036 compatible = "atmel,at91sam9260-usart";
1037 reg = <0xf8030000 0x100>;
1038 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
1040 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1041 | AT91_XDMAC_DT_PERID(38))>,
1043 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1044 | AT91_XDMAC_DT_PERID(39))>;
1045 dma-names = "tx", "rx";
1046 pinctrl-names = "default";
1047 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
1048 clocks = <&usart1_clk>;
1049 clock-names = "usart";
1050 status = "disabled";
1053 mmc1: mmc@fc000000 {
1054 compatible = "atmel,hsmci";
1055 reg = <0xfc000000 0x600>;
1056 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
1058 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1059 | AT91_XDMAC_DT_PERID(1))>;
1061 pinctrl-names = "default";
1062 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
1063 status = "disabled";
1064 #address-cells = <1>;
1066 clocks = <&mci1_clk>;
1067 clock-names = "mci_clk";
1070 uart1: serial@fc004000 {
1071 compatible = "atmel,at91sam9260-usart";
1072 reg = <0xfc004000 0x100>;
1073 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
1075 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1076 | AT91_XDMAC_DT_PERID(24))>,
1078 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1079 | AT91_XDMAC_DT_PERID(25))>;
1080 dma-names = "tx", "rx";
1081 pinctrl-names = "default";
1082 pinctrl-0 = <&pinctrl_uart1>;
1083 clocks = <&uart1_clk>;
1084 clock-names = "usart";
1085 status = "disabled";
1088 usart2: serial@fc008000 {
1089 compatible = "atmel,at91sam9260-usart";
1090 reg = <0xfc008000 0x100>;
1091 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
1093 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1094 | AT91_XDMAC_DT_PERID(16))>,
1096 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1097 | AT91_XDMAC_DT_PERID(17))>;
1098 dma-names = "tx", "rx";
1099 pinctrl-names = "default";
1100 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
1101 clocks = <&usart2_clk>;
1102 clock-names = "usart";
1103 status = "disabled";
1106 usart3: serial@fc00c000 {
1107 compatible = "atmel,at91sam9260-usart";
1108 reg = <0xfc00c000 0x100>;
1109 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
1111 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1112 | AT91_XDMAC_DT_PERID(18))>,
1114 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1115 | AT91_XDMAC_DT_PERID(19))>;
1116 dma-names = "tx", "rx";
1117 pinctrl-names = "default";
1118 pinctrl-0 = <&pinctrl_usart3>;
1119 clocks = <&usart3_clk>;
1120 clock-names = "usart";
1121 status = "disabled";
1124 usart4: serial@fc010000 {
1125 compatible = "atmel,at91sam9260-usart";
1126 reg = <0xfc010000 0x100>;
1127 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
1129 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1130 | AT91_XDMAC_DT_PERID(20))>,
1132 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1133 | AT91_XDMAC_DT_PERID(21))>;
1134 dma-names = "tx", "rx";
1135 pinctrl-names = "default";
1136 pinctrl-0 = <&pinctrl_usart4>;
1137 clocks = <&usart4_clk>;
1138 clock-names = "usart";
1139 status = "disabled";
1142 ssc1: ssc@fc014000 {
1143 compatible = "atmel,at91sam9g45-ssc";
1144 reg = <0xfc014000 0x4000>;
1145 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
1146 pinctrl-names = "default";
1147 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
1149 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1150 | AT91_XDMAC_DT_PERID(28))>,
1152 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1153 | AT91_XDMAC_DT_PERID(29))>;
1154 dma-names = "tx", "rx";
1155 clocks = <&ssc1_clk>;
1156 clock-names = "pclk";
1157 status = "disabled";
1160 spi1: spi@fc018000 {
1161 #address-cells = <1>;
1163 compatible = "atmel,at91rm9200-spi";
1164 reg = <0xfc018000 0x100>;
1165 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
1167 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1168 | AT91_XDMAC_DT_PERID(12))>,
1170 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1171 | AT91_XDMAC_DT_PERID(13))>;
1172 dma-names = "tx", "rx";
1173 pinctrl-names = "default";
1174 pinctrl-0 = <&pinctrl_spi1>;
1175 clocks = <&spi1_clk>;
1176 clock-names = "spi_clk";
1177 status = "disabled";
1180 spi2: spi@fc01c000 {
1181 #address-cells = <1>;
1183 compatible = "atmel,at91rm9200-spi";
1184 reg = <0xfc01c000 0x100>;
1185 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
1187 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1188 | AT91_XDMAC_DT_PERID(14))>,
1190 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1191 | AT91_XDMAC_DT_PERID(15))>;
1192 dma-names = "tx", "rx";
1193 pinctrl-names = "default";
1194 pinctrl-0 = <&pinctrl_spi2>;
1195 clocks = <&spi2_clk>;
1196 clock-names = "spi_clk";
1197 status = "disabled";
1200 tcb1: timer@fc020000 {
1201 compatible = "atmel,at91sam9x5-tcb";
1202 reg = <0xfc020000 0x100>;
1203 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
1204 clocks = <&tcb1_clk>, <&clk32k>;
1205 clock-names = "t0_clk", "slow_clk";
1208 macb1: ethernet@fc028000 {
1209 compatible = "atmel,sama5d4-gem";
1210 reg = <0xfc028000 0x100>;
1211 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
1212 pinctrl-names = "default";
1213 pinctrl-0 = <&pinctrl_macb1_rmii>;
1214 #address-cells = <1>;
1216 clocks = <&macb1_clk>, <&macb1_clk>;
1217 clock-names = "hclk", "pclk";
1218 status = "disabled";
1222 compatible = "atmel,at91sam9g45-trng";
1223 reg = <0xfc030000 0x100>;
1224 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
1225 clocks = <&trng_clk>;
1228 adc0: adc@fc034000 {
1229 compatible = "atmel,at91sam9x5-adc";
1230 reg = <0xfc034000 0x100>;
1231 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
1232 clocks = <&adc_clk>,
1234 clock-names = "adc_clk", "adc_op_clk";
1235 atmel,adc-channels-used = <0x01f>;
1236 atmel,adc-startup-time = <40>;
1237 atmel,adc-use-external-triggers;
1238 atmel,adc-vref = <3000>;
1239 atmel,adc-res = <8 10>;
1240 atmel,adc-sample-hold-time = <11>;
1241 atmel,adc-res-names = "lowres", "highres";
1242 atmel,adc-ts-pressure-threshold = <10000>;
1243 #address-cells = <1>;
1245 status = "disabled";
1248 trigger-name = "external-rising";
1249 trigger-value = <0x1>;
1254 trigger-name = "external-falling";
1255 trigger-value = <0x2>;
1260 trigger-name = "external-any";
1261 trigger-value = <0x3>;
1266 trigger-name = "continuous";
1267 trigger-value = <0x6>;
1273 compatible = "atmel,at91sam9g46-aes";
1274 reg = <0xfc044000 0x100>;
1275 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
1276 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1277 | AT91_XDMAC_DT_PERID(41))>,
1278 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1279 | AT91_XDMAC_DT_PERID(40))>;
1280 dma-names = "tx", "rx";
1281 clocks = <&aes_clk>;
1282 clock-names = "aes_clk";
1287 compatible = "atmel,at91sam9g46-tdes";
1288 reg = <0xfc04c000 0x100>;
1289 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
1290 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1291 | AT91_XDMAC_DT_PERID(42))>,
1292 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1293 | AT91_XDMAC_DT_PERID(43))>;
1294 dma-names = "tx", "rx";
1295 clocks = <&tdes_clk>;
1296 clock-names = "tdes_clk";
1301 compatible = "atmel,at91sam9g46-sha";
1302 reg = <0xfc050000 0x100>;
1303 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
1304 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1305 | AT91_XDMAC_DT_PERID(44))>;
1307 clocks = <&sha_clk>;
1308 clock-names = "sha_clk";
1313 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1314 reg = <0xfc068600 0x10>;
1319 compatible = "atmel,at91sam9x5-shdwc";
1320 reg = <0xfc068610 0x10>;
1324 pit: timer@fc068630 {
1325 compatible = "atmel,at91sam9260-pit";
1326 reg = <0xfc068630 0x10>;
1327 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1332 compatible = "atmel,sama5d4-wdt";
1333 reg = <0xfc068640 0x10>;
1334 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1336 status = "disabled";
1340 compatible = "atmel,at91sam9x5-sckc";
1341 reg = <0xfc068650 0x4>;
1343 slow_rc_osc: slow_rc_osc {
1344 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1346 clock-frequency = <32768>;
1347 clock-accuracy = <250000000>;
1348 atmel,startup-time-usec = <75>;
1351 slow_osc: slow_osc {
1352 compatible = "atmel,at91sam9x5-clk-slow-osc";
1354 clocks = <&slow_xtal>;
1355 atmel,startup-time-usec = <1200000>;
1359 compatible = "atmel,at91sam9x5-clk-slow";
1361 clocks = <&slow_rc_osc &slow_osc>;
1366 compatible = "atmel,at91rm9200-rtc";
1367 reg = <0xfc0686b0 0x30>;
1368 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1372 dbgu: serial@fc069000 {
1373 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
1374 reg = <0xfc069000 0x200>;
1375 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
1376 pinctrl-names = "default";
1377 pinctrl-0 = <&pinctrl_dbgu>;
1378 clocks = <&dbgu_clk>;
1379 clock-names = "usart";
1380 status = "disabled";
1383 pioA: gpio@fc06a000 {
1384 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1385 reg = <0xfc06a000 0x100>;
1386 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
1389 interrupt-controller;
1390 #interrupt-cells = <2>;
1391 clocks = <&pioA_clk>;
1394 pioB: gpio@fc06b000 {
1395 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1396 reg = <0xfc06b000 0x100>;
1397 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
1400 interrupt-controller;
1401 #interrupt-cells = <2>;
1402 clocks = <&pioB_clk>;
1405 pioC: gpio@fc06c000 {
1406 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1407 reg = <0xfc06c000 0x100>;
1408 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
1411 interrupt-controller;
1412 #interrupt-cells = <2>;
1413 clocks = <&pioC_clk>;
1414 u-boot,dm-pre-reloc;
1417 pioD: gpio@fc068000 {
1418 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1419 reg = <0xfc068000 0x100>;
1420 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
1423 interrupt-controller;
1424 #interrupt-cells = <2>;
1425 clocks = <&pioD_clk>;
1428 pioE: gpio@fc06d000 {
1429 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1430 reg = <0xfc06d000 0x100>;
1431 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
1434 interrupt-controller;
1435 #interrupt-cells = <2>;
1436 clocks = <&pioE_clk>;
1440 u-boot,dm-pre-reloc;
1441 #address-cells = <1>;
1443 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
1444 ranges = <0xfc068000 0xfc068000 0x100
1445 0xfc06a000 0xfc06a000 0x4000>;
1446 /* WARNING: revisit as pin spec has changed */
1449 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
1450 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
1451 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
1452 0x0003ff00 0x8002a800 0x00000000 /* pioD */
1453 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
1455 reg = < 0xfc06a000 0x100
1462 /* pinctrl pin settings */
1464 pinctrl_adc0_adtrg: adc0_adtrg {
1466 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
1468 pinctrl_adc0_ad0: adc0_ad0 {
1470 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1472 pinctrl_adc0_ad1: adc0_ad1 {
1474 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1476 pinctrl_adc0_ad2: adc0_ad2 {
1478 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1480 pinctrl_adc0_ad3: adc0_ad3 {
1482 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1484 pinctrl_adc0_ad4: adc0_ad4 {
1486 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1491 pinctrl_dbgu: dbgu-0 {
1493 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, /* conflicts with D14 and TDI */
1494 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with D15 and TDO */
1499 pinctrl_i2c0: i2c0-0 {
1501 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1502 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1507 pinctrl_i2c1: i2c1-0 {
1509 <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* TWD1, conflicts with UART0 RX and DIBP */
1510 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1515 pinctrl_i2c2: i2c2-0 {
1517 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */
1518 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1523 pinctrl_isi_data_0_7: isi-0-data-0-7 {
1525 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D0 */
1526 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D1 */
1527 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D2 */
1528 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D3 */
1529 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D4 */
1530 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D5 */
1531 AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D6 */
1532 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D7 */
1533 AT91_PIOB 1 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_PCK, conflict with G0_RXCK */
1534 AT91_PIOB 3 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_VSYNC */
1535 AT91_PIOB 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1537 pinctrl_isi_data_8_9: isi-0-data-8-9 {
1539 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1540 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1542 pinctrl_isi_data_10_11: isi-0-data-10-11 {
1544 <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1545 AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1550 pinctrl_lcd_base: lcd-base-0 {
1552 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
1553 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
1554 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
1555 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1557 pinctrl_lcd_pwm: lcd-pwm-0 {
1558 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
1560 pinctrl_lcd_rgb444: lcd-rgb-0 {
1562 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1563 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1564 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1565 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1566 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1567 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1568 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1569 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1570 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1571 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1572 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1573 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1575 pinctrl_lcd_rgb565: lcd-rgb-1 {
1577 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1578 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1579 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1580 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1581 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1582 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1583 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1584 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1585 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1586 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1587 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1588 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1589 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1590 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1591 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1592 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1594 pinctrl_lcd_rgb666: lcd-rgb-2 {
1596 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1597 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1598 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1599 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1600 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1601 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1602 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1603 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1604 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1605 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1606 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1607 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1608 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1609 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1610 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1611 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1612 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1613 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1615 pinctrl_lcd_rgb777: lcd-rgb-3 {
1617 /* LCDDAT0 conflicts with TMS */
1618 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1619 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1620 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1621 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1622 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1623 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1624 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1625 /* LCDDAT8 conflicts with TCK */
1626 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1627 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1628 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1629 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1630 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1631 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1632 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1633 /* LCDDAT16 conflicts with NTRST */
1634 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1635 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1636 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1637 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1638 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1639 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1640 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1642 pinctrl_lcd_rgb888: lcd-rgb-4 {
1644 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1645 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1646 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1647 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1648 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1649 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1650 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1651 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1652 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1653 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1654 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1655 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1656 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1657 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1658 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1659 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1660 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
1661 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1662 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1663 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1664 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1665 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1666 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1667 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1672 pinctrl_macb0_rmii: macb0_rmii-0 {
1674 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */
1675 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */
1676 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */
1677 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */
1678 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */
1679 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */
1680 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */
1681 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */
1682 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */
1683 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */
1689 pinctrl_macb1_rmii: macb1_rmii-0 {
1691 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */
1692 AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */
1693 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */
1694 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */
1695 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */
1696 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */
1697 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */
1698 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */
1699 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */
1700 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */
1706 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1708 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1709 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1710 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1713 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1715 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1716 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1717 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1720 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1722 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4, conflict with NAND_D5 */
1723 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */
1724 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict with NAND_D7 */
1725 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_OE */
1731 u-boot,dm-pre-reloc;
1732 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1733 u-boot,dm-pre-reloc;
1735 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */
1736 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */
1737 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */
1740 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1741 u-boot,dm-pre-reloc;
1743 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */
1744 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */
1745 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */
1751 pinctrl_nand: nand-0 {
1753 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */
1754 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */
1756 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */
1757 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */
1759 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */
1760 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */
1761 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */
1762 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */
1763 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */
1764 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */
1765 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */
1766 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */
1767 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */
1768 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1773 u-boot,dm-pre-reloc;
1774 pinctrl_spi0: spi0-0 {
1775 u-boot,dm-pre-reloc;
1777 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */
1778 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */
1779 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */
1785 pinctrl_ssc0_tx: ssc0_tx {
1787 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK0 */
1788 AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF0 */
1789 AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1792 pinctrl_ssc0_rx: ssc0_rx {
1794 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK0 */
1795 AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */
1796 AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1801 pinctrl_ssc1_tx: ssc1_tx {
1803 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK1 */
1804 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF1 */
1805 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1808 pinctrl_ssc1_rx: ssc1_rx {
1810 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK1 */
1811 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */
1812 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1817 pinctrl_spi1: spi1-0 {
1819 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MISO */
1820 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MOSI */
1821 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_SPCK */
1827 pinctrl_spi2: spi2-0 {
1829 <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MISO conflicts with RTS0 */
1830 AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MOSI conflicts with TXD0 */
1831 AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_SPCK conflicts with RTS1 */
1837 pinctrl_uart0: uart0-0 {
1839 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1840 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
1846 pinctrl_uart1: uart1-0 {
1848 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_NONE /* RXD */
1849 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* TXD */
1855 pinctrl_usart0: usart0-0 {
1857 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
1858 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
1861 pinctrl_usart0_rts: usart0_rts-0 {
1862 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1864 pinctrl_usart0_cts: usart0_cts-0 {
1865 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1870 pinctrl_usart1: usart1-0 {
1872 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
1873 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
1876 pinctrl_usart1_rts: usart1_rts-0 {
1877 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1879 pinctrl_usart1_cts: usart1_cts-0 {
1880 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1885 pinctrl_usart2: usart2-0 {
1887 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1888 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD - conflicts with G0_COL, PCK2 */
1891 pinctrl_usart2_rts: usart2_rts-0 {
1892 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */
1894 pinctrl_usart2_cts: usart2_cts-0 {
1895 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */
1900 u-boot,dm-pre-reloc;
1901 pinctrl_usart3: usart3-0 {
1902 u-boot,dm-pre-reloc;
1904 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1905 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
1911 pinctrl_usart4: usart4-0 {
1913 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1914 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
1917 pinctrl_usart4_rts: usart4_rts-0 {
1918 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */
1920 pinctrl_usart4_cts: usart4_cts-0 {
1921 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */
1926 aic: interrupt-controller@fc06e000 {
1927 #interrupt-cells = <3>;
1928 compatible = "atmel,sama5d4-aic";
1929 interrupt-controller;
1930 reg = <0xfc06e000 0x200>;
1931 atmel,external-irqs = <56>;