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ARM64: zynqmp: Add backward compatible string for uart
[u-boot] / arch / arm / dts / socfpga_arria5_socdk.dts
1 /*
2  *  Copyright (C) 2013 Altera Corporation <www.altera.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include "socfpga_arria5.dtsi"
8
9 / {
10         model = "Altera SOCFPGA Arria V SoC Development Kit";
11         compatible = "altr,socfpga-arria5", "altr,socfpga";
12
13         chosen {
14                 bootargs = "console=ttyS0,115200";
15         };
16
17         memory {
18                 name = "memory";
19                 device_type = "memory";
20                 reg = <0x0 0x40000000>; /* 1GB */
21         };
22
23         aliases {
24                 /* this allow the ethaddr uboot environmnet variable contents
25                  * to be added to the gmac1 device tree blob.
26                  */
27                 ethernet0 = &gmac1;
28                 udc0 = &usb1;
29         };
30
31         regulator_3_3v: 3-3-v-regulator {
32                 compatible = "regulator-fixed";
33                 regulator-name = "3.3V";
34                 regulator-min-microvolt = <3300000>;
35                 regulator-max-microvolt = <3300000>;
36         };
37
38         soc {
39                 u-boot,dm-pre-reloc;
40         };
41 };
42
43 &gmac1 {
44         status = "okay";
45         phy-mode = "rgmii";
46
47         rxd0-skew-ps = <0>;
48         rxd1-skew-ps = <0>;
49         rxd2-skew-ps = <0>;
50         rxd3-skew-ps = <0>;
51         txen-skew-ps = <0>;
52         txc-skew-ps = <2600>;
53         rxdv-skew-ps = <0>;
54         rxc-skew-ps = <2000>;
55 };
56
57 &i2c0 {
58         status = "okay";
59
60         eeprom@51 {
61                 compatible = "atmel,24c32";
62                 reg = <0x51>;
63                 pagesize = <32>;
64         };
65
66         rtc@68 {
67                 compatible = "dallas,ds1339";
68                 reg = <0x68>;
69         };
70 };
71
72 &mmc0 {
73         vmmc-supply = <&regulator_3_3v>;
74         vqmmc-supply = <&regulator_3_3v>;
75         bus-width = <4>;
76         u-boot,dm-pre-reloc;
77 };
78
79 &usb1 {
80         status = "okay";
81 };
82
83 &qspi {
84         status = "okay";
85         u-boot,dm-pre-reloc;
86
87         flash0: n25q00@0 {
88                 u-boot,dm-pre-reloc;
89                 #address-cells = <1>;
90                 #size-cells = <1>;
91                 compatible = "n25q00";
92                 reg = <0>;      /* chip select */
93                 spi-max-frequency = <50000000>;
94                 m25p,fast-read;
95                 page-size = <256>;
96                 block-size = <16>; /* 2^16, 64KB */
97                 read-delay = <4>;  /* delay value in read data capture register */
98                 tshsl-ns = <50>;
99                 tsd2d-ns = <50>;
100                 tchsh-ns = <4>;
101                 tslch-ns = <4>;
102         };
103 };