2 * Copyright (C) 2012 Altera Corporation <www.altera.com>
4 * SPDX-License-Identifier: GPL-2.0+
7 #include "socfpga_cyclone5.dtsi"
10 model = "Altera SOCFPGA Cyclone V SoC Development Kit";
11 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
14 bootargs = "console=ttyS0,115200";
19 device_type = "memory";
20 reg = <0x0 0x40000000>; /* 1GB */
24 /* this allow the ethaddr uboot environmnet variable contents
25 * to be added to the gmac1 device tree blob.
29 spi0 = "/spi@ff705000"; /* QSPI */
30 spi1 = "/spi@fff00000";
31 spi2 = "/spi@fff01000";
34 regulator_3_3v: 3-3-v-regulator {
35 compatible = "regulator-fixed";
36 regulator-name = "3.3V";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
64 compatible = "atmel,24c32";
70 compatible = "dallas,ds1339";
76 cd-gpios = <&portb 18 0>;
77 vmmc-supply = <®ulator_3_3v>;
78 vqmmc-supply = <®ulator_3_3v>;
91 compatible = "n25q00";
92 reg = <0>; /* chip select */
93 spi-max-frequency = <50000000>;
96 block-size = <16>; /* 2^16, 64KB */
97 read-delay = <4>; /* delay value in read data capture register */