2 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
7 #include "socfpga_cyclone5.dtsi"
10 model = "samtec VIN|ING FPGA";
11 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
14 bootargs = "console=ttyS0,115200";
24 device_type = "memory";
25 reg = <0x0 0x40000000>; /* 1GB */
63 compatible = "stm,m41t82";
76 compatible = "n25q128", "spi-flash";
77 reg = <0>; /* chip select */
78 spi-max-frequency = <50000000>;
81 block-size = <16>; /* 2^16, 64KB */
82 read-delay = <4>; /* delay value in read data capture register */
93 compatible = "n25q00", "spi-flash";
94 reg = <1>; /* chip select */
95 spi-max-frequency = <50000000>;
98 block-size = <16>; /* 2^16, 64KB */
99 read-delay = <4>; /* delay value in read data capture register */