git.sur5r.net Git - u-boot/blob - arch/arm/dts/stm32mp157.dtsi

   1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
   2 /*
   3  * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
   4  */
   5
   6 #include <dt-bindings/interrupt-controller/arm-gic.h>
   7 #include <dt-bindings/clock/stm32mp1-clks.h>
   8 #include <dt-bindings/reset-controller/stm32mp1-resets.h>
   9
  10 / {
  11         #address-cells = <1>;
  12         #size-cells = <1>;
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu0: cpu@0 {
  19                         compatible = "arm,cortex-a7";
  20                         device_type = "cpu";
  21                         reg = <0>;
  22                 };
  23
  24                 cpu1: cpu@1 {
  25                         compatible = "arm,cortex-a7";
  26                         device_type = "cpu";
  27                         reg = <1>;
  28                 };
  29         };
  30
  31         aliases {
  32                 serial3 = &uart4;
  33         };
  34
  35         intc: interrupt-controller@a0021000 {
  36                 compatible = "arm,cortex-a7-gic";
  37                 #interrupt-cells = <3>;
  38                 interrupt-controller;
  39                 reg = <0xa0021000 0x1000>,
  40                       <0xa0022000 0x2000>;
  41         };
  42
  43         clocks {
  44                 clk_hse: clk-hse {
  45                         #clock-cells = <0>;
  46                         compatible = "fixed-clock";
  47                         clock-frequency = <24000000>;
  48                 };
  49
  50                 clk_hsi: clk-hsi {
  51                         #clock-cells = <0>;
  52                         compatible = "fixed-clock";
  53                         clock-frequency = <64000000>;
  54                 };
  55
  56                 clk_lse: clk-lse {
  57                         #clock-cells = <0>;
  58                         compatible = "fixed-clock";
  59                         clock-frequency = <32768>;
  60                 };
  61
  62                 clk_lsi: clk-lsi {
  63                         #clock-cells = <0>;
  64                         compatible = "fixed-clock";
  65                         clock-frequency = <32000>;
  66                 };
  67
  68                 clk_csi: clk-csi {
  69                         #clock-cells = <0>;
  70                         compatible = "fixed-clock";
  71                         clock-frequency = <4000000>;
  72                 };
  73         };
  74
  75         soc {
  76                 compatible = "simple-bus";
  77                 #address-cells = <1>;
  78                 #size-cells = <1>;
  79                 interrupt-parent = <&intc>;
  80                 ranges;
  81
  82                 uart4: serial@40010000 {
  83                         compatible = "st,stm32h7-uart";
  84                         reg = <0x40010000 0x400>;
  85                         clocks = <&rcc_clk UART4_K>;
  86                         status = "disabled";
  87                 };
  88
  89                 sdmmc3: sdmmc@48004000 {
  90                         compatible = "st,stm32-sdmmc2";
  91                         reg = <0x48004000 0x400>, <0x48005000 0x400>;
  92                         reg-names = "sdmmc", "delay";
  93                         interrupts = <GIC_SPI 137 IRQ_TYPE_NONE>;
  94                         clocks = <&rcc_clk SDMMC3_K>;
  95                         resets = <&rcc_rst SDMMC3_R>;
  96                         st,idma = <1>;
  97                         cap-sd-highspeed;
  98                         cap-mmc-highspeed;
  99                         max-frequency = <120000000>;
 100                         status = "disabled";
 101                 };
 102
 103                 rcc: rcc@50000000 {
 104                         compatible = "syscon", "simple-mfd";
 105
 106                         reg = <0x50000000 0x1000>;
 107
 108                         rcc_clk: rcc-clk@50000000 {
 109                                 #clock-cells = <1>;
 110                                 compatible = "st,stm32mp1-rcc-clk";
 111                         };
 112
 113                         rcc_rst: rcc-reset@50000000 {
 114                                 #reset-cells = <1>;
 115                                 compatible = "st,stm32mp1-rcc-rst";
 116                         };
 117
 118                         rcc_reboot: rcc-reboot@50000000 {
 119                                 compatible = "syscon-reboot";
 120                                 regmap = <&rcc>;
 121                                 offset = <0x404>;
 122                                 mask = <0x1>;
 123                         };
 124                 };
 125
 126                 pwr: pwr@50001000 {
 127                         compatible = "st,stm32mp1-pwr", "st,stm32-pwr", "syscon", "simple-mfd";
 128                         reg = <0x50001000 0x400>;
 129                         system-power-controller;
 130                         interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
 131                         st,sysrcc = <&rcc>;
 132                         clocks = <&rcc_clk PLL2_R>;
 133                         clock-names = "phyclk";
 134
 135                         pwr-regulators@c {
 136                                 compatible = "st,stm32mp1,pwr-reg";
 137                                 st,tzcr = <&rcc 0x0 0x1>;
 138
 139                                 reg11: reg11 {
 140                                         regulator-name = "reg11";
 141                                         regulator-min-microvolt = <1100000>;
 142                                         regulator-max-microvolt = <1100000>;
 143                                 };
 144
 145                                 reg18: reg18 {
 146                                         regulator-name = "reg18";
 147                                         regulator-min-microvolt = <1800000>;
 148                                         regulator-max-microvolt = <1800000>;
 149                                 };
 150
 151                                 usb33: usb33 {
 152                                         regulator-name = "usb33";
 153                                         regulator-min-microvolt = <3300000>;
 154                                         regulator-max-microvolt = <3300000>;
 155                                 };
 156                         };
 157                 };
 158
 159                 vrefbuf: vrefbuf@50025000 {
 160                         compatible = "st,stm32-vrefbuf";
 161                         reg = <0x50025000 0x8>;
 162                         regulator-min-microvolt = <1500000>;
 163                         regulator-max-microvolt = <2500000>;
 164                         clocks = <&rcc_clk VREF>;
 165                         status = "disabled";
 166                 };
 167
 168                 pinctrl: pin-controller {
 169                         compatible = "st,stm32mp157-pinctrl";
 170                         #address-cells = <1>;
 171                         #size-cells = <1>;
 172                         ranges = <0 0x50002000 0xa400>;
 173                         pins-are-numbered;
 174
 175                         gpioa: gpio@50002000 {
 176                                 gpio-controller;
 177                                 #gpio-cells = <2>;
 178                                 interrupt-controller;
 179                                 #interrupt-cells = <2>;
 180                                 reg = <0x0 0x400>;
 181                                 clocks = <&rcc_clk GPIOA>;
 182                                 st,bank-name = "GPIOA";
 183                                 ngpios = <16>;
 184                                 gpio-ranges = <&pinctrl 0 0 16>;
 185                                 status = "disabled";
 186                         };
 187
 188                         gpiob: gpio@50003000 {
 189                                 gpio-controller;
 190                                 #gpio-cells = <2>;
 191                                 interrupt-controller;
 192                                 #interrupt-cells = <2>;
 193                                 reg = <0x1000 0x400>;
 194                                 clocks = <&rcc_clk GPIOB>;
 195                                 st,bank-name = "GPIOB";
 196                                 ngpios = <16>;
 197                                 gpio-ranges = <&pinctrl 0 16 16>;
 198                                 status = "disabled";
 199                         };
 200
 201                         gpioc: gpio@50004000 {
 202                                 gpio-controller;
 203                                 #gpio-cells = <2>;
 204                                 interrupt-controller;
 205                                 #interrupt-cells = <2>;
 206                                 reg = <0x2000 0x400>;
 207                                 clocks = <&rcc_clk GPIOC>;
 208                                 st,bank-name = "GPIOC";
 209                                 ngpios = <16>;
 210                                 gpio-ranges = <&pinctrl 0 32 16>;
 211                                 status = "disabled";
 212                         };
 213
 214                         gpiod: gpio@50005000 {
 215                                 gpio-controller;
 216                                 #gpio-cells = <2>;
 217                                 interrupt-controller;
 218                                 #interrupt-cells = <2>;
 219                                 reg = <0x3000 0x400>;
 220                                 clocks = <&rcc_clk GPIOD>;
 221                                 st,bank-name = "GPIOD";
 222                                 ngpios = <16>;
 223                                 gpio-ranges = <&pinctrl 0 48 16>;
 224                                 status = "disabled";
 225                         };
 226
 227                         gpioe: gpio@50006000 {
 228                                 gpio-controller;
 229                                 #gpio-cells = <2>;
 230                                 interrupt-controller;
 231                                 #interrupt-cells = <2>;
 232                                 reg = <0x4000 0x400>;
 233                                 clocks = <&rcc_clk GPIOE>;
 234                                 st,bank-name = "GPIOE";
 235                                 ngpios = <16>;
 236                                 gpio-ranges = <&pinctrl 0 64 16>;
 237                                 status = "disabled";
 238                         };
 239
 240                         gpiof: gpio@50007000 {
 241                                 gpio-controller;
 242                                 #gpio-cells = <2>;
 243                                 interrupt-controller;
 244                                 #interrupt-cells = <2>;
 245                                 reg = <0x5000 0x400>;
 246                                 clocks = <&rcc_clk GPIOF>;
 247                                 st,bank-name = "GPIOF";
 248                                 ngpios = <16>;
 249                                 gpio-ranges = <&pinctrl 0 80 16>;
 250                                 status = "disabled";
 251                         };
 252
 253                         gpiog: gpio@50008000 {
 254                                 gpio-controller;
 255                                 #gpio-cells = <2>;
 256                                 interrupt-controller;
 257                                 #interrupt-cells = <2>;
 258                                 reg = <0x6000 0x400>;
 259                                 clocks = <&rcc_clk GPIOG>;
 260                                 st,bank-name = "GPIOG";
 261                                 ngpios = <16>;
 262                                 gpio-ranges = <&pinctrl 0 96 16>;
 263                                 status = "disabled";
 264                         };
 265
 266                         gpioh: gpio@50009000 {
 267                                 gpio-controller;
 268                                 #gpio-cells = <2>;
 269                                 interrupt-controller;
 270                                 #interrupt-cells = <2>;
 271                                 reg = <0x7000 0x400>;
 272                                 clocks = <&rcc_clk GPIOH>;
 273                                 st,bank-name = "GPIOH";
 274                                 ngpios = <16>;
 275                                 gpio-ranges = <&pinctrl 0 112 16>;
 276                                 status = "disabled";
 277                         };
 278
 279                         gpioi: gpio@5000a000 {
 280                                 gpio-controller;
 281                                 #gpio-cells = <2>;
 282                                 interrupt-controller;
 283                                 #interrupt-cells = <2>;
 284                                 reg = <0x8000 0x400>;
 285                                 clocks = <&rcc_clk GPIOI>;
 286                                 st,bank-name = "GPIOI";
 287                                 ngpios = <16>;
 288                                 gpio-ranges = <&pinctrl 0 128 16>;
 289                                 status = "disabled";
 290                         };
 291
 292                         gpioj: gpio@5000b000 {
 293                                 gpio-controller;
 294                                 #gpio-cells = <2>;
 295                                 interrupt-controller;
 296                                 #interrupt-cells = <2>;
 297                                 reg = <0x9000 0x400>;
 298                                 clocks = <&rcc_clk GPIOJ>;
 299                                 st,bank-name = "GPIOJ";
 300                                 ngpios = <16>;
 301                                 gpio-ranges = <&pinctrl 0 144 16>;
 302                                 status = "disabled";
 303                         };
 304
 305                         gpiok: gpio@5000c000 {
 306                                 gpio-controller;
 307                                 #gpio-cells = <2>;
 308                                 interrupt-controller;
 309                                 #interrupt-cells = <2>;
 310                                 reg = <0xa000 0x400>;
 311                                 clocks = <&rcc_clk GPIOK>;
 312                                 st,bank-name = "GPIOK";
 313                                 ngpios = <8>;
 314                                 gpio-ranges = <&pinctrl 0 160 8>;
 315                                 status = "disabled";
 316                         };
 317                 };
 318
 319                 pinctrl_z: pin-controller-z {
 320                         compatible = "st,stm32mp157-z-pinctrl";
 321                         #address-cells = <1>;
 322                         #size-cells = <1>;
 323                         ranges = <0 0x54004000 0x400>;
 324                         pins-are-numbered;
 325
 326                         gpioz: gpio@54004000 {
 327                                 gpio-controller;
 328                                 #gpio-cells = <2>;
 329                                 interrupt-controller;
 330                                 #interrupt-cells = <2>;
 331                                 reg = <0 0x400>;
 332                                 clocks = <&rcc_clk GPIOZ>;
 333                                 st,bank-name = "GPIOZ";
 334                                 st,bank-ioport = <11>;
 335                                 ngpios = <8>;
 336                                 gpio-ranges = <&pinctrl_z 0 400 8>;
 337                                 status = "disabled";
 338                         };
 339                 };
 340
 341                 sdmmc1: sdmmc@58005000 {
 342                         compatible = "st,stm32-sdmmc2";
 343                         reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
 344                         reg-names = "sdmmc", "delay";
 345                         clocks = <&rcc_clk SDMMC1_K>;
 346                         resets = <&rcc_rst SDMMC1_R>;
 347                         st,idma = <1>;
 348                         cap-sd-highspeed;
 349                         cap-mmc-highspeed;
 350                         max-frequency = <120000000>;
 351                         status = "disabled";
 352                 };
 353
 354                 sdmmc2: sdmmc@58007000 {
 355                         compatible = "st,stm32-sdmmc2";
 356                         reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
 357                         reg-names = "sdmmc", "delay";
 358                         interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
 359                         clocks = <&rcc_clk SDMMC2_K>;
 360                         resets = <&rcc_rst SDMMC2_R>;
 361                         st,idma = <1>;
 362                         cap-sd-highspeed;
 363                         cap-mmc-highspeed;
 364                         max-frequency = <120000000>;
 365                         status = "disabled";
 366                 };
 367
 368                 i2c4: i2c@5c002000 {
 369                         compatible = "st,stm32f7-i2c";
 370                         reg = <0x5c002000 0x400>;
 371                         interrupt-names = "event", "error", "wakeup";
 372                         clocks = <&rcc_clk I2C4_K>;
 373                         resets = <&rcc_rst I2C4_R>;
 374                         #address-cells = <1>;
 375                         #size-cells = <0>;
 376                         wakeup-source;
 377                         status = "disabled";
 378                 };
 379         };
 380 };