1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset-controller/stm32mp1-resets.h>
19 compatible = "arm,cortex-a7";
25 compatible = "arm,cortex-a7";
35 intc: interrupt-controller@a0021000 {
36 compatible = "arm,cortex-a7-gic";
37 #interrupt-cells = <3>;
39 reg = <0xa0021000 0x1000>,
46 compatible = "fixed-clock";
47 clock-frequency = <24000000>;
52 compatible = "fixed-clock";
53 clock-frequency = <64000000>;
58 compatible = "fixed-clock";
59 clock-frequency = <32768>;
64 compatible = "fixed-clock";
65 clock-frequency = <32000>;
70 compatible = "fixed-clock";
71 clock-frequency = <4000000>;
76 compatible = "simple-bus";
79 interrupt-parent = <&intc>;
82 uart4: serial@40010000 {
83 compatible = "st,stm32h7-uart";
84 reg = <0x40010000 0x400>;
85 clocks = <&rcc_clk UART4_K>;
90 compatible = "syscon", "simple-mfd";
92 reg = <0x50000000 0x1000>;
94 rcc_clk: rcc-clk@50000000 {
96 compatible = "st,stm32mp1-rcc-clk";
99 rcc_rst: rcc-reset@50000000 {
101 compatible = "st,stm32mp1-rcc-rst";
105 pinctrl: pin-controller {
106 compatible = "st,stm32mp157-pinctrl";
107 #address-cells = <1>;
109 ranges = <0 0x50002000 0xa400>;
112 gpioa: gpio@50002000 {
115 interrupt-controller;
116 #interrupt-cells = <2>;
118 clocks = <&rcc_clk GPIOA>;
119 st,bank-name = "GPIOA";
121 gpio-ranges = <&pinctrl 0 0 16>;
125 gpiob: gpio@50003000 {
128 interrupt-controller;
129 #interrupt-cells = <2>;
130 reg = <0x1000 0x400>;
131 clocks = <&rcc_clk GPIOB>;
132 st,bank-name = "GPIOB";
134 gpio-ranges = <&pinctrl 0 16 16>;
138 gpioc: gpio@50004000 {
141 interrupt-controller;
142 #interrupt-cells = <2>;
143 reg = <0x2000 0x400>;
144 clocks = <&rcc_clk GPIOC>;
145 st,bank-name = "GPIOC";
147 gpio-ranges = <&pinctrl 0 32 16>;
151 gpiod: gpio@50005000 {
154 interrupt-controller;
155 #interrupt-cells = <2>;
156 reg = <0x3000 0x400>;
157 clocks = <&rcc_clk GPIOD>;
158 st,bank-name = "GPIOD";
160 gpio-ranges = <&pinctrl 0 48 16>;
164 gpioe: gpio@50006000 {
167 interrupt-controller;
168 #interrupt-cells = <2>;
169 reg = <0x4000 0x400>;
170 clocks = <&rcc_clk GPIOE>;
171 st,bank-name = "GPIOE";
173 gpio-ranges = <&pinctrl 0 64 16>;
177 gpiof: gpio@50007000 {
180 interrupt-controller;
181 #interrupt-cells = <2>;
182 reg = <0x5000 0x400>;
183 clocks = <&rcc_clk GPIOF>;
184 st,bank-name = "GPIOF";
186 gpio-ranges = <&pinctrl 0 80 16>;
190 gpiog: gpio@50008000 {
193 interrupt-controller;
194 #interrupt-cells = <2>;
195 reg = <0x6000 0x400>;
196 clocks = <&rcc_clk GPIOG>;
197 st,bank-name = "GPIOG";
199 gpio-ranges = <&pinctrl 0 96 16>;
203 gpioh: gpio@50009000 {
206 interrupt-controller;
207 #interrupt-cells = <2>;
208 reg = <0x7000 0x400>;
209 clocks = <&rcc_clk GPIOH>;
210 st,bank-name = "GPIOH";
212 gpio-ranges = <&pinctrl 0 112 16>;
216 gpioi: gpio@5000a000 {
219 interrupt-controller;
220 #interrupt-cells = <2>;
221 reg = <0x8000 0x400>;
222 clocks = <&rcc_clk GPIOI>;
223 st,bank-name = "GPIOI";
225 gpio-ranges = <&pinctrl 0 128 16>;
229 gpioj: gpio@5000b000 {
232 interrupt-controller;
233 #interrupt-cells = <2>;
234 reg = <0x9000 0x400>;
235 clocks = <&rcc_clk GPIOJ>;
236 st,bank-name = "GPIOJ";
238 gpio-ranges = <&pinctrl 0 144 16>;
242 gpiok: gpio@5000c000 {
245 interrupt-controller;
246 #interrupt-cells = <2>;
247 reg = <0xa000 0x400>;
248 clocks = <&rcc_clk GPIOK>;
249 st,bank-name = "GPIOK";
251 gpio-ranges = <&pinctrl 0 160 8>;
256 pinctrl_z: pin-controller-z {
257 compatible = "st,stm32mp157-z-pinctrl";
258 #address-cells = <1>;
260 ranges = <0 0x54004000 0x400>;
263 gpioz: gpio@54004000 {
266 interrupt-controller;
267 #interrupt-cells = <2>;
269 clocks = <&rcc_clk GPIOZ>;
270 st,bank-name = "GPIOZ";
271 st,bank-ioport = <11>;
273 gpio-ranges = <&pinctrl_z 0 400 8>;
278 sdmmc1: sdmmc@58005000 {
279 compatible = "st,stm32-sdmmc2";
280 reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
281 reg-names = "sdmmc", "delay";
282 clocks = <&rcc_clk SDMMC1_K>;
283 resets = <&rcc_rst SDMMC1_R>;
287 max-frequency = <120000000>;
292 compatible = "st,stm32f7-i2c";
293 reg = <0x5c002000 0x400>;
294 interrupt-names = "event", "error", "wakeup";
295 clocks = <&rcc_clk I2C4_K>;
296 resets = <&rcc_rst I2C4_R>;
297 #address-cells = <1>;