1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset-controller/stm32mp1-resets.h>
19 compatible = "arm,cortex-a7";
25 compatible = "arm,cortex-a7";
35 intc: interrupt-controller@a0021000 {
36 compatible = "arm,cortex-a7-gic";
37 #interrupt-cells = <3>;
39 reg = <0xa0021000 0x1000>,
46 compatible = "fixed-clock";
47 clock-frequency = <24000000>;
52 compatible = "fixed-clock";
53 clock-frequency = <64000000>;
58 compatible = "fixed-clock";
59 clock-frequency = <32768>;
64 compatible = "fixed-clock";
65 clock-frequency = <32000>;
70 compatible = "fixed-clock";
71 clock-frequency = <4000000>;
76 compatible = "simple-bus";
79 interrupt-parent = <&intc>;
82 uart4: serial@40010000 {
83 compatible = "st,stm32h7-uart";
84 reg = <0x40010000 0x400>;
85 clocks = <&rcc_clk UART4_K>;
89 sdmmc3: sdmmc@48004000 {
90 compatible = "st,stm32-sdmmc2";
91 reg = <0x48004000 0x400>, <0x48005000 0x400>;
92 reg-names = "sdmmc", "delay";
93 interrupts = <GIC_SPI 137 IRQ_TYPE_NONE>;
94 clocks = <&rcc_clk SDMMC3_K>;
95 resets = <&rcc_rst SDMMC3_R>;
99 max-frequency = <120000000>;
104 compatible = "syscon", "simple-mfd";
106 reg = <0x50000000 0x1000>;
108 rcc_clk: rcc-clk@50000000 {
110 compatible = "st,stm32mp1-rcc-clk";
113 rcc_rst: rcc-reset@50000000 {
115 compatible = "st,stm32mp1-rcc-rst";
118 rcc_reboot: rcc-reboot@50000000 {
119 compatible = "syscon-reboot";
127 compatible = "st,stm32mp1-pwr", "st,stm32-pwr", "syscon", "simple-mfd";
128 reg = <0x50001000 0x400>;
129 system-power-controller;
130 interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
132 clocks = <&rcc_clk PLL2_R>;
133 clock-names = "phyclk";
136 compatible = "st,stm32mp1,pwr-reg";
137 st,tzcr = <&rcc 0x0 0x1>;
140 regulator-name = "reg11";
141 regulator-min-microvolt = <1100000>;
142 regulator-max-microvolt = <1100000>;
146 regulator-name = "reg18";
147 regulator-min-microvolt = <1800000>;
148 regulator-max-microvolt = <1800000>;
152 regulator-name = "usb33";
153 regulator-min-microvolt = <3300000>;
154 regulator-max-microvolt = <3300000>;
159 vrefbuf: vrefbuf@50025000 {
160 compatible = "st,stm32-vrefbuf";
161 reg = <0x50025000 0x8>;
162 regulator-min-microvolt = <1500000>;
163 regulator-max-microvolt = <2500000>;
164 clocks = <&rcc_clk VREF>;
168 pinctrl: pin-controller {
169 compatible = "st,stm32mp157-pinctrl";
170 #address-cells = <1>;
172 ranges = <0 0x50002000 0xa400>;
175 gpioa: gpio@50002000 {
178 interrupt-controller;
179 #interrupt-cells = <2>;
181 clocks = <&rcc_clk GPIOA>;
182 st,bank-name = "GPIOA";
184 gpio-ranges = <&pinctrl 0 0 16>;
188 gpiob: gpio@50003000 {
191 interrupt-controller;
192 #interrupt-cells = <2>;
193 reg = <0x1000 0x400>;
194 clocks = <&rcc_clk GPIOB>;
195 st,bank-name = "GPIOB";
197 gpio-ranges = <&pinctrl 0 16 16>;
201 gpioc: gpio@50004000 {
204 interrupt-controller;
205 #interrupt-cells = <2>;
206 reg = <0x2000 0x400>;
207 clocks = <&rcc_clk GPIOC>;
208 st,bank-name = "GPIOC";
210 gpio-ranges = <&pinctrl 0 32 16>;
214 gpiod: gpio@50005000 {
217 interrupt-controller;
218 #interrupt-cells = <2>;
219 reg = <0x3000 0x400>;
220 clocks = <&rcc_clk GPIOD>;
221 st,bank-name = "GPIOD";
223 gpio-ranges = <&pinctrl 0 48 16>;
227 gpioe: gpio@50006000 {
230 interrupt-controller;
231 #interrupt-cells = <2>;
232 reg = <0x4000 0x400>;
233 clocks = <&rcc_clk GPIOE>;
234 st,bank-name = "GPIOE";
236 gpio-ranges = <&pinctrl 0 64 16>;
240 gpiof: gpio@50007000 {
243 interrupt-controller;
244 #interrupt-cells = <2>;
245 reg = <0x5000 0x400>;
246 clocks = <&rcc_clk GPIOF>;
247 st,bank-name = "GPIOF";
249 gpio-ranges = <&pinctrl 0 80 16>;
253 gpiog: gpio@50008000 {
256 interrupt-controller;
257 #interrupt-cells = <2>;
258 reg = <0x6000 0x400>;
259 clocks = <&rcc_clk GPIOG>;
260 st,bank-name = "GPIOG";
262 gpio-ranges = <&pinctrl 0 96 16>;
266 gpioh: gpio@50009000 {
269 interrupt-controller;
270 #interrupt-cells = <2>;
271 reg = <0x7000 0x400>;
272 clocks = <&rcc_clk GPIOH>;
273 st,bank-name = "GPIOH";
275 gpio-ranges = <&pinctrl 0 112 16>;
279 gpioi: gpio@5000a000 {
282 interrupt-controller;
283 #interrupt-cells = <2>;
284 reg = <0x8000 0x400>;
285 clocks = <&rcc_clk GPIOI>;
286 st,bank-name = "GPIOI";
288 gpio-ranges = <&pinctrl 0 128 16>;
292 gpioj: gpio@5000b000 {
295 interrupt-controller;
296 #interrupt-cells = <2>;
297 reg = <0x9000 0x400>;
298 clocks = <&rcc_clk GPIOJ>;
299 st,bank-name = "GPIOJ";
301 gpio-ranges = <&pinctrl 0 144 16>;
305 gpiok: gpio@5000c000 {
308 interrupt-controller;
309 #interrupt-cells = <2>;
310 reg = <0xa000 0x400>;
311 clocks = <&rcc_clk GPIOK>;
312 st,bank-name = "GPIOK";
314 gpio-ranges = <&pinctrl 0 160 8>;
319 pinctrl_z: pin-controller-z {
320 compatible = "st,stm32mp157-z-pinctrl";
321 #address-cells = <1>;
323 ranges = <0 0x54004000 0x400>;
326 gpioz: gpio@54004000 {
329 interrupt-controller;
330 #interrupt-cells = <2>;
332 clocks = <&rcc_clk GPIOZ>;
333 st,bank-name = "GPIOZ";
334 st,bank-ioport = <11>;
336 gpio-ranges = <&pinctrl_z 0 400 8>;
341 sdmmc1: sdmmc@58005000 {
342 compatible = "st,stm32-sdmmc2";
343 reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
344 reg-names = "sdmmc", "delay";
345 clocks = <&rcc_clk SDMMC1_K>;
346 resets = <&rcc_rst SDMMC1_R>;
350 max-frequency = <120000000>;
354 sdmmc2: sdmmc@58007000 {
355 compatible = "st,stm32-sdmmc2";
356 reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
357 reg-names = "sdmmc", "delay";
358 interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
359 clocks = <&rcc_clk SDMMC2_K>;
360 resets = <&rcc_rst SDMMC2_R>;
364 max-frequency = <120000000>;
369 compatible = "st,stm32f7-i2c";
370 reg = <0x5c002000 0x400>;
371 interrupt-names = "event", "error", "wakeup";
372 clocks = <&rcc_clk I2C4_K>;
373 resets = <&rcc_rst I2C4_R>;
374 #address-cells = <1>;