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1 /*
2  * Copyright 2013 Maxime Ripard
3  *
4  * Maxime Ripard <maxime.ripard@free-electrons.com>
5  *
6  * This file is dual-licensed: you can use it either under the terms
7  * of the GPL or the X11 license, at your option. Note that this dual
8  * licensing only applies to this file, and not this project as a
9  * whole.
10  *
11  *  a) This library is free software; you can redistribute it and/or
12  *     modify it under the terms of the GNU General Public License as
13  *     published by the Free Software Foundation; either version 2 of the
14  *     License, or (at your option) any later version.
15  *
16  *     This library is distributed in the hope that it will be useful,
17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  *     GNU General Public License for more details.
20  *
21  * Or, alternatively,
22  *
23  *  b) Permission is hereby granted, free of charge, to any person
24  *     obtaining a copy of this software and associated documentation
25  *     files (the "Software"), to deal in the Software without
26  *     restriction, including without limitation the rights to use,
27  *     copy, modify, merge, publish, distribute, sublicense, and/or
28  *     sell copies of the Software, and to permit persons to whom the
29  *     Software is furnished to do so, subject to the following
30  *     conditions:
31  *
32  *     The above copyright notice and this permission notice shall be
33  *     included in all copies or substantial portions of the Software.
34  *
35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42  *     OTHER DEALINGS IN THE SOFTWARE.
43  */
44
45 #include "skeleton.dtsi"
46
47 #include "sun5i.dtsi"
48
49 #include <dt-bindings/dma/sun4i-a10.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
51
52 / {
53         interrupt-parent = <&intc>;
54
55         aliases {
56                 ethernet0 = &emac;
57         };
58
59         chosen {
60                 #address-cells = <1>;
61                 #size-cells = <1>;
62                 ranges;
63
64                 framebuffer@0 {
65                         compatible = "allwinner,simple-framebuffer",
66                                      "simple-framebuffer";
67                         allwinner,pipeline = "de_be0-lcd0-hdmi";
68                         clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
69                                  <&ahb_gates 43>, <&ahb_gates 44>;
70                         status = "disabled";
71                 };
72
73                 framebuffer@1 {
74                         compatible = "allwinner,simple-framebuffer",
75                                      "simple-framebuffer";
76                         allwinner,pipeline = "de_be0-lcd0";
77                         clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
78                                  <&ahb_gates 44>;
79                         status = "disabled";
80                 };
81
82                 framebuffer@2 {
83                         compatible = "allwinner,simple-framebuffer",
84                                      "simple-framebuffer";
85                         allwinner,pipeline = "de_be0-lcd0-tve0";
86                         clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
87                                  <&ahb_gates 36>, <&ahb_gates 44>;
88                         status = "disabled";
89                 };
90         };
91
92         clocks {
93                 ahb_gates: clk@01c20060 {
94                         #clock-cells = <1>;
95                         compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
96                         reg = <0x01c20060 0x8>;
97                         clocks = <&ahb>;
98                         clock-indices = <0>, <1>,
99                                         <2>, <5>, <6>,
100                                         <7>, <8>, <9>,
101                                         <10>, <13>,
102                                         <14>, <17>, <18>,
103                                         <20>, <21>, <22>,
104                                         <26>, <28>, <32>,
105                                         <34>, <36>, <40>,
106                                         <43>, <44>,
107                                         <46>, <51>,
108                                         <52>;
109                         clock-output-names = "ahb_usbotg", "ahb_ehci",
110                                              "ahb_ohci", "ahb_ss", "ahb_dma",
111                                              "ahb_bist", "ahb_mmc0", "ahb_mmc1",
112                                              "ahb_mmc2", "ahb_nand",
113                                              "ahb_sdram", "ahb_emac", "ahb_ts",
114                                              "ahb_spi0", "ahb_spi1", "ahb_spi2",
115                                              "ahb_gps", "ahb_stimer", "ahb_ve",
116                                              "ahb_tve", "ahb_lcd", "ahb_csi",
117                                              "ahb_hdmi", "ahb_de_be",
118                                              "ahb_de_fe", "ahb_iep",
119                                              "ahb_mali400";
120                 };
121
122                 apb0_gates: clk@01c20068 {
123                         #clock-cells = <1>;
124                         compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
125                         reg = <0x01c20068 0x4>;
126                         clocks = <&apb0>;
127                         clock-indices = <0>, <3>,
128                                         <5>, <6>,
129                                         <10>;
130                         clock-output-names = "apb0_codec", "apb0_iis",
131                                              "apb0_pio", "apb0_ir",
132                                              "apb0_keypad";
133                 };
134
135                 apb1_gates: clk@01c2006c {
136                         #clock-cells = <1>;
137                         compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
138                         reg = <0x01c2006c 0x4>;
139                         clocks = <&apb1>;
140                         clock-indices = <0>, <1>,
141                                         <2>, <16>,
142                                         <17>, <18>,
143                                         <19>;
144                         clock-output-names = "apb1_i2c0", "apb1_i2c1",
145                                              "apb1_i2c2", "apb1_uart0",
146                                              "apb1_uart1", "apb1_uart2",
147                                              "apb1_uart3";
148                 };
149         };
150
151         soc@01c00000 {
152                 emac: ethernet@01c0b000 {
153                         compatible = "allwinner,sun4i-a10-emac";
154                         reg = <0x01c0b000 0x1000>;
155                         interrupts = <55>;
156                         clocks = <&ahb_gates 17>;
157                         allwinner,sram = <&emac_sram 1>;
158                         status = "disabled";
159                 };
160
161                 mdio: mdio@01c0b080 {
162                         compatible = "allwinner,sun4i-a10-mdio";
163                         reg = <0x01c0b080 0x14>;
164                         status = "disabled";
165                         #address-cells = <1>;
166                         #size-cells = <0>;
167                 };
168
169                 pwm: pwm@01c20e00 {
170                         compatible = "allwinner,sun5i-a10s-pwm";
171                         reg = <0x01c20e00 0xc>;
172                         clocks = <&osc24M>;
173                         #pwm-cells = <3>;
174                         status = "disabled";
175                 };
176
177                 uart0: serial@01c28000 {
178                         compatible = "snps,dw-apb-uart";
179                         reg = <0x01c28000 0x400>;
180                         interrupts = <1>;
181                         reg-shift = <2>;
182                         reg-io-width = <4>;
183                         clocks = <&apb1_gates 16>;
184                         status = "disabled";
185                 };
186
187                 uart2: serial@01c28800 {
188                         compatible = "snps,dw-apb-uart";
189                         reg = <0x01c28800 0x400>;
190                         interrupts = <3>;
191                         reg-shift = <2>;
192                         reg-io-width = <4>;
193                         clocks = <&apb1_gates 18>;
194                         status = "disabled";
195                 };
196         };
197 };
198
199 &pio {
200         compatible = "allwinner,sun5i-a10s-pinctrl";
201
202         uart0_pins_a: uart0@0 {
203                 allwinner,pins = "PB19", "PB20";
204                 allwinner,function = "uart0";
205                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
206                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
207         };
208
209         uart2_pins_a: uart2@0 {
210                 allwinner,pins = "PC18", "PC19";
211                 allwinner,function = "uart2";
212                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
213                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
214         };
215
216         emac_pins_a: emac0@0 {
217                 allwinner,pins = "PA0", "PA1", "PA2",
218                                 "PA3", "PA4", "PA5", "PA6",
219                                 "PA7", "PA8", "PA9", "PA10",
220                                 "PA11", "PA12", "PA13", "PA14",
221                                 "PA15", "PA16";
222                 allwinner,function = "emac";
223                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
224                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
225         };
226
227         emac_pins_b: emac0@1 {
228                 allwinner,pins = "PD6", "PD7", "PD10",
229                                 "PD11", "PD12", "PD13", "PD14",
230                                 "PD15", "PD18", "PD19", "PD20",
231                                 "PD21", "PD22", "PD23", "PD24",
232                                 "PD25", "PD26", "PD27";
233                 allwinner,function = "emac";
234                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
235                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
236         };
237
238         mmc1_pins_a: mmc1@0 {
239                 allwinner,pins = "PG3", "PG4", "PG5",
240                                  "PG6", "PG7", "PG8";
241                 allwinner,function = "mmc1";
242                 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
243                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
244         };
245
246         spi2_pins_a: spi2@0 {
247                 allwinner,pins = "PB12", "PB13", "PB14";
248                 allwinner,function = "spi2";
249                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
250                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
251         };
252
253         spi2_cs0_pins_a: spi2_cs0@0 {
254                 allwinner,pins = "PB11";
255                 allwinner,function = "spi2";
256                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
257                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
258         };
259 };
260
261 &sram_a {
262         emac_sram: sram-section@8000 {
263                 compatible = "allwinner,sun4i-a10-sram-a3-a4";
264                 reg = <0x8000 0x4000>;
265                 status = "disabled";
266         };
267 };