git.sur5r.net Git - u-boot/blob - arch/arm/dts/tegra20-harmony.dts

   1 /dts-v1/;
   2
   3 #include "tegra20.dtsi"
   4
   5 / {
   6         model = "NVIDIA Tegra20 Harmony evaluation board";
   7         compatible = "nvidia,harmony", "nvidia,tegra20";
   8
   9         chosen {
  10                 stdout-path = &uartd;
  11         };
  12
  13         aliases {
  14                 usb0 = "/usb@c5008000";
  15                 usb1 = "/usb@c5004000";
  16                 sdhci0 = "/sdhci@c8000600";
  17                 sdhci1 = "/sdhci@c8000200";
  18         };
  19
  20         memory {
  21                 reg = <0x00000000 0x40000000>;
  22         };
  23
  24         host1x {
  25                 status = "okay";
  26                 dc@54200000 {
  27                         status = "okay";
  28                         rgb {
  29                                 status = "okay";
  30                                 nvidia,panel = <&lcd_panel>;
  31                         };
  32                 };
  33         };
  34
  35         serial@70006300 {
  36                 clock-frequency = < 216000000 >;
  37         };
  38
  39         nand-controller@70008000 {
  40                 nvidia,wp-gpios = <&gpio 23 0>;         /* PC7 */
  41                 nvidia,width = <8>;
  42                 nvidia,timing = <26 100 20 80 20 10 12 10 70>;
  43                 nand@0 {
  44                         reg = <0>;
  45                         compatible = "hynix,hy27uf4g2b", "nand-flash";
  46                 };
  47         };
  48
  49         i2c@7000c000 {
  50                 status = "disabled";
  51         };
  52
  53         i2c@7000c400 {
  54                 status = "disabled";
  55         };
  56
  57         i2c@7000c500 {
  58                 status = "disabled";
  59         };
  60
  61         i2c@7000d000 {
  62                 status = "disabled";
  63         };
  64
  65         usb@c5000000 {
  66                 status = "disabled";
  67         };
  68
  69         usb@c5004000 {
  70                 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
  71         };
  72
  73         sdhci@c8000200 {
  74                 status = "okay";
  75                 cd-gpios = <&gpio 69 1>; /* gpio PI5 */
  76                 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
  77                 power-gpios = <&gpio 155 0>; /* gpio PT3 */
  78                 bus-width = <4>;
  79         };
  80
  81         sdhci@c8000600 {
  82                 status = "okay";
  83                 cd-gpios = <&gpio 58 1>; /* gpio PH2 */
  84                 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
  85                 power-gpios = <&gpio 70 0>; /* gpio PI6 */
  86                 bus-width = <8>;
  87         };
  88
  89         lcd_panel: panel {
  90                 clock = <42430000>;
  91                 xres = <1024>;
  92                 yres = <600>;
  93                 left-margin = <138>;
  94                 right-margin = <34>;
  95                 hsync-len = <136>;
  96                 lower-margin = <4>;
  97                 upper-margin = <21>;
  98                 vsync-len = <4>;
  99                 hsync-active-high;
 100                 vsyncx-active-high;
 101                 nvidia,bits-per-pixel = <16>;
 102                 nvidia,pwm = <&pwm 0 0>;
 103                 nvidia,backlight-enable-gpios = <&gpio 13 0>;   /* PB5 */
 104                 nvidia,lvds-shutdown-gpios = <&gpio 10 0>;      /* PB2 */
 105                 nvidia,backlight-vdd-gpios = <&gpio 176 0>;     /* PW0 */
 106                 nvidia,panel-vdd-gpios = <&gpio 22 0>;          /* PC6 */
 107                 nvidia,panel-timings = <0 0 200 0 0>;
 108         };
 109 };