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tegra: dts: Sync tegra20 device tree files with Linux
[u-boot] / arch / arm / dts / tegra20-harmony.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
5
6 / {
7         model = "NVIDIA Tegra20 Harmony evaluation board";
8         compatible = "nvidia,harmony", "nvidia,tegra20";
9
10         chosen {
11                 stdout-path = &uartd;
12         };
13
14         aliases {
15                 rtc0 = "/i2c@7000d000/tps6586x@34";
16                 rtc1 = "/rtc@7000e000";
17                 serial0 = &uartd;
18                 usb0 = "/usb@c5008000";
19                 usb1 = "/usb@c5004000";
20                 sdhci0 = "/sdhci@c8000600";
21                 sdhci1 = "/sdhci@c8000200";
22         };
23
24         memory {
25                 reg = <0x00000000 0x40000000>;
26         };
27
28         host1x@50000000 {
29                 status = "okay";
30                 dc@54200000 {
31                         status = "okay";
32                         rgb {
33                                 status = "okay";
34                                 nvidia,panel = <&lcd_panel>;
35                         };
36                 };
37
38                 hdmi@54280000 {
39                         status = "okay";
40
41                         hdmi-supply = <&vdd_5v0_hdmi>;
42                         vdd-supply = <&hdmi_vdd_reg>;
43                         pll-supply = <&hdmi_pll_reg>;
44
45                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
46                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
47                                 GPIO_ACTIVE_HIGH>;
48                 };
49         };
50
51         pinmux@70000014 {
52                 pinctrl-names = "default";
53                 pinctrl-0 = <&state_default>;
54
55                 state_default: pinmux {
56                         ata {
57                                 nvidia,pins = "ata";
58                                 nvidia,function = "ide";
59                         };
60                         atb {
61                                 nvidia,pins = "atb", "gma", "gme";
62                                 nvidia,function = "sdio4";
63                         };
64                         atc {
65                                 nvidia,pins = "atc";
66                                 nvidia,function = "nand";
67                         };
68                         atd {
69                                 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
70                                         "spia", "spib", "spic";
71                                 nvidia,function = "gmi";
72                         };
73                         cdev1 {
74                                 nvidia,pins = "cdev1";
75                                 nvidia,function = "plla_out";
76                         };
77                         cdev2 {
78                                 nvidia,pins = "cdev2";
79                                 nvidia,function = "pllp_out4";
80                         };
81                         crtp {
82                                 nvidia,pins = "crtp";
83                                 nvidia,function = "crt";
84                         };
85                         csus {
86                                 nvidia,pins = "csus";
87                                 nvidia,function = "vi_sensor_clk";
88                         };
89                         dap1 {
90                                 nvidia,pins = "dap1";
91                                 nvidia,function = "dap1";
92                         };
93                         dap2 {
94                                 nvidia,pins = "dap2";
95                                 nvidia,function = "dap2";
96                         };
97                         dap3 {
98                                 nvidia,pins = "dap3";
99                                 nvidia,function = "dap3";
100                         };
101                         dap4 {
102                                 nvidia,pins = "dap4";
103                                 nvidia,function = "dap4";
104                         };
105                         ddc {
106                                 nvidia,pins = "ddc";
107                                 nvidia,function = "i2c2";
108                         };
109                         dta {
110                                 nvidia,pins = "dta", "dtd";
111                                 nvidia,function = "sdio2";
112                         };
113                         dtb {
114                                 nvidia,pins = "dtb", "dtc", "dte";
115                                 nvidia,function = "rsvd1";
116                         };
117                         dtf {
118                                 nvidia,pins = "dtf";
119                                 nvidia,function = "i2c3";
120                         };
121                         gmc {
122                                 nvidia,pins = "gmc";
123                                 nvidia,function = "uartd";
124                         };
125                         gpu7 {
126                                 nvidia,pins = "gpu7";
127                                 nvidia,function = "rtck";
128                         };
129                         gpv {
130                                 nvidia,pins = "gpv", "slxa", "slxk";
131                                 nvidia,function = "pcie";
132                         };
133                         hdint {
134                                 nvidia,pins = "hdint", "pta";
135                                 nvidia,function = "hdmi";
136                         };
137                         i2cp {
138                                 nvidia,pins = "i2cp";
139                                 nvidia,function = "i2cp";
140                         };
141                         irrx {
142                                 nvidia,pins = "irrx", "irtx";
143                                 nvidia,function = "uarta";
144                         };
145                         kbca {
146                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
147                                         "kbce", "kbcf";
148                                 nvidia,function = "kbc";
149                         };
150                         lcsn {
151                                 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
152                                         "ld3", "ld4", "ld5", "ld6", "ld7",
153                                         "ld8", "ld9", "ld10", "ld11", "ld12",
154                                         "ld13", "ld14", "ld15", "ld16", "ld17",
155                                         "ldc", "ldi", "lhp0", "lhp1", "lhp2",
156                                         "lhs", "lm0", "lm1", "lpp", "lpw0",
157                                         "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
158                                         "lsda", "lsdi", "lspi", "lvp0", "lvp1",
159                                         "lvs";
160                                 nvidia,function = "displaya";
161                         };
162                         owc {
163                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
164                                 nvidia,function = "rsvd2";
165                         };
166                         pmc {
167                                 nvidia,pins = "pmc";
168                                 nvidia,function = "pwr_on";
169                         };
170                         rm {
171                                 nvidia,pins = "rm";
172                                 nvidia,function = "i2c1";
173                         };
174                         sdb {
175                                 nvidia,pins = "sdb", "sdc", "sdd";
176                                 nvidia,function = "pwm";
177                         };
178                         sdio1 {
179                                 nvidia,pins = "sdio1";
180                                 nvidia,function = "sdio1";
181                         };
182                         slxc {
183                                 nvidia,pins = "slxc", "slxd";
184                                 nvidia,function = "spdif";
185                         };
186                         spid {
187                                 nvidia,pins = "spid", "spie", "spif";
188                                 nvidia,function = "spi1";
189                         };
190                         spig {
191                                 nvidia,pins = "spig", "spih";
192                                 nvidia,function = "spi2_alt";
193                         };
194                         uaa {
195                                 nvidia,pins = "uaa", "uab", "uda";
196                                 nvidia,function = "ulpi";
197                         };
198                         uad {
199                                 nvidia,pins = "uad";
200                                 nvidia,function = "irda";
201                         };
202                         uca {
203                                 nvidia,pins = "uca", "ucb";
204                                 nvidia,function = "uartc";
205                         };
206                         conf_ata {
207                                 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
208                                         "cdev1", "cdev2", "dap1", "dtb", "gma",
209                                         "gmb", "gmc", "gmd", "gme", "gpu7",
210                                         "gpv", "i2cp", "pta", "rm", "slxa",
211                                         "slxk", "spia", "spib", "uac";
212                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
214                         };
215                         conf_ck32 {
216                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
217                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
218                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
219                         };
220                         conf_csus {
221                                 nvidia,pins = "csus", "spid", "spif";
222                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
223                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
224                         };
225                         conf_crtp {
226                                 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
227                                         "dtc", "dte", "dtf", "gpu", "sdio1",
228                                         "slxc", "slxd", "spdi", "spdo", "spig",
229                                         "uda";
230                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
231                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
232                         };
233                         conf_ddc {
234                                 nvidia,pins = "ddc", "dta", "dtd", "kbca",
235                                         "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
236                                         "sdc";
237                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
238                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
239                         };
240                         conf_hdint {
241                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
242                                         "lpw1", "lsc1", "lsck", "lsda", "lsdi",
243                                         "lvp0", "owc", "sdb";
244                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
245                         };
246                         conf_irrx {
247                                 nvidia,pins = "irrx", "irtx", "sdd", "spic",
248                                         "spie", "spih", "uaa", "uab", "uad",
249                                         "uca", "ucb";
250                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
251                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
252                         };
253                         conf_lc {
254                                 nvidia,pins = "lc", "ls";
255                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
256                         };
257                         conf_ld0 {
258                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
259                                         "ld5", "ld6", "ld7", "ld8", "ld9",
260                                         "ld10", "ld11", "ld12", "ld13", "ld14",
261                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
262                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
263                                         "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
264                                         "lvs", "pmc";
265                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
266                         };
267                         conf_ld17_0 {
268                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
269                                         "ld23_22";
270                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
271                         };
272                 };
273         };
274
275         i2s@70002800 {
276                 status = "okay";
277         };
278
279         serial@70006300 {
280                 status = "okay";
281                 clock-frequency = < 216000000 >;
282         };
283
284         pwm: pwm@7000a000 {
285                 status = "okay";
286         };
287
288         i2c@7000c000 {
289                 status = "okay";
290                 clock-frequency = <400000>;
291
292                 wm8903: wm8903@1a {
293                         compatible = "wlf,wm8903";
294                         reg = <0x1a>;
295                         interrupt-parent = <&gpio>;
296                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
297
298                         gpio-controller;
299                         #gpio-cells = <2>;
300
301                         micdet-cfg = <0>;
302                         micdet-delay = <100>;
303                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
304                 };
305         };
306
307         nand-controller@70008000 {
308                 nvidia,wp-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
309                 nvidia,width = <8>;
310                 nvidia,timing = <26 100 20 80 20 10 12 10 70>;
311                 nand@0 {
312                         reg = <0>;
313                         compatible = "hynix,hy27uf4g2b", "nand-flash";
314                 };
315         };
316
317         hdmi_ddc: i2c@7000c400 {
318                 status = "okay";
319                 clock-frequency = <100000>;
320         };
321
322         i2c@7000c500 {
323                 status = "okay";
324                 clock-frequency = <400000>;
325         };
326
327         i2c@7000d000 {
328                 status = "okay";
329                 clock-frequency = <400000>;
330
331                 pmic: tps6586x@34 {
332                         compatible = "ti,tps6586x";
333                         reg = <0x34>;
334                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
335
336                         ti,system-power-controller;
337
338                         #gpio-cells = <2>;
339                         gpio-controller;
340
341                         sys-supply = <&vdd_5v0_reg>;
342                         vin-sm0-supply = <&sys_reg>;
343                         vin-sm1-supply = <&sys_reg>;
344                         vin-sm2-supply = <&sys_reg>;
345                         vinldo01-supply = <&sm2_reg>;
346                         vinldo23-supply = <&sm2_reg>;
347                         vinldo4-supply = <&sm2_reg>;
348                         vinldo678-supply = <&sm2_reg>;
349                         vinldo9-supply = <&sm2_reg>;
350
351                         regulators {
352                                 sys_reg: sys {
353                                         regulator-name = "vdd_sys";
354                                         regulator-always-on;
355                                 };
356
357                                 sm0 {
358                                         regulator-name = "vdd_sm0,vdd_core";
359                                         regulator-min-microvolt = <1200000>;
360                                         regulator-max-microvolt = <1200000>;
361                                         regulator-always-on;
362                                 };
363
364                                 sm1 {
365                                         regulator-name = "vdd_sm1,vdd_cpu";
366                                         regulator-min-microvolt = <1000000>;
367                                         regulator-max-microvolt = <1000000>;
368                                         regulator-always-on;
369                                 };
370
371                                 sm2_reg: sm2 {
372                                         regulator-name = "vdd_sm2,vin_ldo*";
373                                         regulator-min-microvolt = <3700000>;
374                                         regulator-max-microvolt = <3700000>;
375                                         regulator-always-on;
376                                 };
377
378                                 pci_clk_reg: ldo0 {
379                                         regulator-name = "vdd_ldo0,vddio_pex_clk";
380                                         regulator-min-microvolt = <3300000>;
381                                         regulator-max-microvolt = <3300000>;
382                                 };
383
384                                 ldo1 {
385                                         regulator-name = "vdd_ldo1,avdd_pll*";
386                                         regulator-min-microvolt = <1100000>;
387                                         regulator-max-microvolt = <1100000>;
388                                         regulator-always-on;
389                                 };
390
391                                 ldo2 {
392                                         regulator-name = "vdd_ldo2,vdd_rtc";
393                                         regulator-min-microvolt = <1200000>;
394                                         regulator-max-microvolt = <1200000>;
395                                 };
396
397                                 ldo3 {
398                                         regulator-name = "vdd_ldo3,avdd_usb*";
399                                         regulator-min-microvolt = <3300000>;
400                                         regulator-max-microvolt = <3300000>;
401                                         regulator-always-on;
402                                 };
403
404                                 ldo4 {
405                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
406                                         regulator-min-microvolt = <1800000>;
407                                         regulator-max-microvolt = <1800000>;
408                                         regulator-always-on;
409                                 };
410
411                                 ldo5 {
412                                         regulator-name = "vdd_ldo5,vcore_mmc";
413                                         regulator-min-microvolt = <2850000>;
414                                         regulator-max-microvolt = <2850000>;
415                                         regulator-always-on;
416                                 };
417
418                                 ldo6 {
419                                         regulator-name = "vdd_ldo6,avdd_vdac";
420                                         regulator-min-microvolt = <1800000>;
421                                         regulator-max-microvolt = <1800000>;
422                                 };
423
424                                 hdmi_vdd_reg: ldo7 {
425                                         regulator-name = "vdd_ldo7,avdd_hdmi";
426                                         regulator-min-microvolt = <3300000>;
427                                         regulator-max-microvolt = <3300000>;
428                                 };
429
430                                 hdmi_pll_reg: ldo8 {
431                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
432                                         regulator-min-microvolt = <1800000>;
433                                         regulator-max-microvolt = <1800000>;
434                                 };
435
436                                 ldo9 {
437                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
438                                         regulator-min-microvolt = <2850000>;
439                                         regulator-max-microvolt = <2850000>;
440                                         regulator-always-on;
441                                 };
442
443                                 ldo_rtc {
444                                         regulator-name = "vdd_rtc_out,vdd_cell";
445                                         regulator-min-microvolt = <3300000>;
446                                         regulator-max-microvolt = <3300000>;
447                                         regulator-always-on;
448                                 };
449                         };
450                 };
451
452                 temperature-sensor@4c {
453                         compatible = "adi,adt7461";
454                         reg = <0x4c>;
455                 };
456         };
457
458         kbc@7000e200 {
459                 status = "okay";
460                 nvidia,debounce-delay-ms = <2>;
461                 nvidia,repeat-delay-ms = <160>;
462                 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
463                 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
464                 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
465                                 MATRIX_KEY(0x00, 0x03, KEY_S)
466                                 MATRIX_KEY(0x00, 0x04, KEY_A)
467                                 MATRIX_KEY(0x00, 0x05, KEY_Z)
468                                 MATRIX_KEY(0x00, 0x07, KEY_FN)
469                                 MATRIX_KEY(0x01, 0x07, KEY_MENU)
470                                 MATRIX_KEY(0x02, 0x06, KEY_LEFTALT)
471                                 MATRIX_KEY(0x02, 0x07, KEY_RIGHTALT)
472                                 MATRIX_KEY(0x03, 0x00, KEY_5)
473                                 MATRIX_KEY(0x03, 0x01, KEY_4)
474                                 MATRIX_KEY(0x03, 0x02, KEY_R)
475                                 MATRIX_KEY(0x03, 0x03, KEY_E)
476                                 MATRIX_KEY(0x03, 0x04, KEY_F)
477                                 MATRIX_KEY(0x03, 0x05, KEY_D)
478                                 MATRIX_KEY(0x03, 0x06, KEY_X)
479                                 MATRIX_KEY(0x04, 0x00, KEY_7)
480                                 MATRIX_KEY(0x04, 0x01, KEY_6)
481                                 MATRIX_KEY(0x04, 0x02, KEY_T)
482                                 MATRIX_KEY(0x04, 0x03, KEY_H)
483                                 MATRIX_KEY(0x04, 0x04, KEY_G)
484                                 MATRIX_KEY(0x04, 0x05, KEY_V)
485                                 MATRIX_KEY(0x04, 0x06, KEY_C)
486                                 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
487                                 MATRIX_KEY(0x05, 0x00, KEY_9)
488                                 MATRIX_KEY(0x05, 0x01, KEY_8)
489                                 MATRIX_KEY(0x05, 0x02, KEY_U)
490                                 MATRIX_KEY(0x05, 0x03, KEY_Y)
491                                 MATRIX_KEY(0x05, 0x04, KEY_J)
492                                 MATRIX_KEY(0x05, 0x05, KEY_N)
493                                 MATRIX_KEY(0x05, 0x06, KEY_B)
494                                 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
495                                 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
496                                 MATRIX_KEY(0x06, 0x01, KEY_0)
497                                 MATRIX_KEY(0x06, 0x02, KEY_O)
498                                 MATRIX_KEY(0x06, 0x03, KEY_I)
499                                 MATRIX_KEY(0x06, 0x04, KEY_L)
500                                 MATRIX_KEY(0x06, 0x05, KEY_K)
501                                 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
502                                 MATRIX_KEY(0x06, 0x07, KEY_M)
503                                 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
504                                 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
505                                 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
506                                 MATRIX_KEY(0x07, 0x07, KEY_MENU)
507                                 MATRIX_KEY(0x08, 0x04, KEY_LEFTSHIFT)
508                                 MATRIX_KEY(0x08, 0x05, KEY_RIGHTSHIFT)
509                                 MATRIX_KEY(0x09, 0x05, KEY_LEFTCTRL)
510                                 MATRIX_KEY(0x09, 0x07, KEY_RIGHTCTRL)
511                                 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
512                                 MATRIX_KEY(0x0B, 0x01, KEY_P)
513                                 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
514                                 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
515                                 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
516                                 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
517                                 MATRIX_KEY(0x0C, 0x00, KEY_F10)
518                                 MATRIX_KEY(0x0C, 0x01, KEY_F9)
519                                 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
520                                 MATRIX_KEY(0x0C, 0x03, KEY_3)
521                                 MATRIX_KEY(0x0C, 0x04, KEY_2)
522                                 MATRIX_KEY(0x0C, 0x05, KEY_UP)
523                                 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
524                                 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
525                                 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
526                                 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
527                                 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
528                                 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
529                                 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
530                                 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
531                                 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
532                                 MATRIX_KEY(0x0E, 0x00, KEY_F11)
533                                 MATRIX_KEY(0x0E, 0x01, KEY_F12)
534                                 MATRIX_KEY(0x0E, 0x02, KEY_F8)
535                                 MATRIX_KEY(0x0E, 0x03, KEY_Q)
536                                 MATRIX_KEY(0x0E, 0x04, KEY_F4)
537                                 MATRIX_KEY(0x0E, 0x05, KEY_F3)
538                                 MATRIX_KEY(0x0E, 0x06, KEY_1)
539                                 MATRIX_KEY(0x0E, 0x07, KEY_F7)
540                                 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
541                                 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
542                                 MATRIX_KEY(0x0F, 0x02, KEY_F5)
543                                 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
544                                 MATRIX_KEY(0x0F, 0x04, KEY_F1)
545                                 MATRIX_KEY(0x0F, 0x05, KEY_F2)
546                                 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
547                                 MATRIX_KEY(0x0F, 0x07, KEY_F6)
548                                 MATRIX_KEY(0x14, 0x00, KEY_KP7)
549                                 MATRIX_KEY(0x15, 0x00, KEY_KP9)
550                                 MATRIX_KEY(0x15, 0x01, KEY_KP8)
551                                 MATRIX_KEY(0x15, 0x02, KEY_KP4)
552                                 MATRIX_KEY(0x15, 0x04, KEY_KP1)
553                                 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
554                                 MATRIX_KEY(0x16, 0x02, KEY_KP6)
555                                 MATRIX_KEY(0x16, 0x03, KEY_KP5)
556                                 MATRIX_KEY(0x16, 0x04, KEY_KP3)
557                                 MATRIX_KEY(0x16, 0x05, KEY_KP2)
558                                 MATRIX_KEY(0x16, 0x07, KEY_KP0)
559                                 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
560                                 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
561                                 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
562                                 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
563                                 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
564                                 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
565                                 MATRIX_KEY(0x1D, 0x04, KEY_END)
566                                 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSUP)
567                                 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
568                                 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSDOWN)
569                                 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
570                                 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
571                                 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
572                                 MATRIX_KEY(0x1F, 0x04, KEY_QUESTION)>;
573         };
574
575         pmc@7000e400 {
576                 nvidia,invert-interrupt;
577                 nvidia,suspend-mode = <1>;
578                 nvidia,cpu-pwr-good-time = <5000>;
579                 nvidia,cpu-pwr-off-time = <5000>;
580                 nvidia,core-pwr-good-time = <3845 3845>;
581                 nvidia,core-pwr-off-time = <3875>;
582                 nvidia,sys-clock-req-active-high;
583         };
584
585         pcie-controller@80003000 {
586                 status = "okay";
587
588                 avdd-pex-supply = <&pci_vdd_reg>;
589                 vdd-pex-supply = <&pci_vdd_reg>;
590                 avdd-pex-pll-supply = <&pci_vdd_reg>;
591                 avdd-plle-supply = <&pci_vdd_reg>;
592                 vddio-pex-clk-supply = <&pci_clk_reg>;
593
594                 pci@1,0 {
595                         status = "okay";
596                 };
597
598                 pci@2,0 {
599                         status = "okay";
600                 };
601         };
602
603         usb@c5000000 {
604                 status = "okay";
605         };
606
607         usb-phy@c5000000 {
608                 status = "okay";
609         };
610
611         usb@c5004000 {
612                 status = "okay";
613                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) 0>;
614         };
615
616         usb-phy@c5004000 {
617                 status = "okay";
618                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
619                         GPIO_ACTIVE_LOW>;
620         };
621
622         usb@c5008000 {
623                 status = "okay";
624         };
625
626         usb-phy@c5008000 {
627                 status = "okay";
628         };
629
630         sdhci@c8000200 {
631                 status = "okay";
632                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
633                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
634                 power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
635                 bus-width = <4>;
636         };
637
638         sdhci@c8000600 {
639                 status = "okay";
640                 cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
641                 wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
642                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
643                 bus-width = <8>;
644         };
645
646         backlight: backlight {
647                 compatible = "pwm-backlight";
648
649                 enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
650                 power-supply = <&vdd_bl_reg>;
651                 pwms = <&pwm 0 5000000>;
652
653                 brightness-levels = <0 4 8 16 32 64 128 255>;
654                 default-brightness-level = <6>;
655         };
656
657         clocks {
658                 compatible = "simple-bus";
659                 #address-cells = <1>;
660                 #size-cells = <0>;
661
662                 clk32k_in: clock@0 {
663                         compatible = "fixed-clock";
664                         reg=<0>;
665                         #clock-cells = <0>;
666                         clock-frequency = <32768>;
667                 };
668         };
669
670         gpio-keys {
671                 compatible = "gpio-keys";
672
673                 power {
674                         label = "Power";
675                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
676                         linux,code = <KEY_POWER>;
677                         gpio-key,wakeup;
678                 };
679         };
680
681         lcd_panel: panel {
682                 clock = <42430000>;
683                 xres = <1024>;
684                 yres = <600>;
685                 left-margin = <138>;
686                 right-margin = <34>;
687                 hsync-len = <136>;
688                 lower-margin = <4>;
689                 upper-margin = <21>;
690                 vsync-len = <4>;
691                 hsync-active-high;
692                 vsyncx-active-high;
693                 nvidia,bits-per-pixel = <16>;
694                 nvidia,pwm = <&pwm 0 0>;
695                 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5)
696                                                         GPIO_ACTIVE_HIGH>;
697                 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
698                                                         GPIO_ACTIVE_HIGH>;
699                 nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0)
700                                                         GPIO_ACTIVE_HIGH>;
701                 nvidia,panel-vdd-gpios = <&gpio TEGRA_GPIO(C, 6)
702                                                         GPIO_ACTIVE_HIGH>;
703                 nvidia,panel-timings = <0 0 200 0 0>;
704         };
705
706         regulators {
707                 compatible = "simple-bus";
708                 #address-cells = <1>;
709                 #size-cells = <0>;
710
711                 vdd_5v0_reg: regulator@0 {
712                         compatible = "regulator-fixed";
713                         reg = <0>;
714                         regulator-name = "vdd_5v0";
715                         regulator-min-microvolt = <5000000>;
716                         regulator-max-microvolt = <5000000>;
717                         regulator-always-on;
718                 };
719
720                 regulator@1 {
721                         compatible = "regulator-fixed";
722                         reg = <1>;
723                         regulator-name = "vdd_1v5";
724                         regulator-min-microvolt = <1500000>;
725                         regulator-max-microvolt = <1500000>;
726                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
727                 };
728
729                 regulator@2 {
730                         compatible = "regulator-fixed";
731                         reg = <2>;
732                         regulator-name = "vdd_1v2";
733                         regulator-min-microvolt = <1200000>;
734                         regulator-max-microvolt = <1200000>;
735                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
736                         enable-active-high;
737                 };
738
739                 pci_vdd_reg: regulator@3 {
740                         compatible = "regulator-fixed";
741                         reg = <3>;
742                         regulator-name = "vdd_1v05";
743                         regulator-min-microvolt = <1050000>;
744                         regulator-max-microvolt = <1050000>;
745                         gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
746                         enable-active-high;
747                 };
748
749                 vdd_pnl_reg: regulator@4 {
750                         compatible = "regulator-fixed";
751                         reg = <4>;
752                         regulator-name = "vdd_pnl";
753                         regulator-min-microvolt = <2800000>;
754                         regulator-max-microvolt = <2800000>;
755                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
756                         enable-active-high;
757                 };
758
759                 vdd_bl_reg: regulator@5 {
760                         compatible = "regulator-fixed";
761                         reg = <5>;
762                         regulator-name = "vdd_bl";
763                         regulator-min-microvolt = <2800000>;
764                         regulator-max-microvolt = <2800000>;
765                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
766                         enable-active-high;
767                 };
768
769                 vdd_5v0_hdmi: regulator@6 {
770                         compatible = "regulator-fixed";
771                         reg = <6>;
772                         regulator-name = "VDDIO_HDMI";
773                         regulator-min-microvolt = <5000000>;
774                         regulator-max-microvolt = <5000000>;
775                         gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
776                         enable-active-high;
777                         vin-supply = <&vdd_5v0_reg>;
778                 };
779         };
780
781         sound {
782                 compatible = "nvidia,tegra-audio-wm8903-harmony",
783                              "nvidia,tegra-audio-wm8903";
784                 nvidia,model = "NVIDIA Tegra Harmony";
785
786                 nvidia,audio-routing =
787                         "Headphone Jack", "HPOUTR",
788                         "Headphone Jack", "HPOUTL",
789                         "Int Spk", "ROP",
790                         "Int Spk", "RON",
791                         "Int Spk", "LOP",
792                         "Int Spk", "LON",
793                         "Mic Jack", "MICBIAS",
794                         "IN1L", "Mic Jack";
795
796                 nvidia,i2s-controller = <&tegra_i2s1>;
797                 nvidia,audio-codec = <&wm8903>;
798
799                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
800                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
801                         GPIO_ACTIVE_HIGH>;
802                 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
803                         GPIO_ACTIVE_HIGH>;
804                 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
805                         GPIO_ACTIVE_HIGH>;
806
807                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
808                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
809                          <&tegra_car TEGRA20_CLK_CDEV1>;
810                 clock-names = "pll_a", "pll_a_out0", "mclk";
811         };
812 };