git.sur5r.net Git - u-boot/blob - arch/arm/dts/tegra20-ventana.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra20.dtsi"
   5
   6 / {
   7         model = "NVIDIA Tegra20 Ventana evaluation board";
   8         compatible = "nvidia,ventana", "nvidia,tegra20";
   9
  10         chosen {
  11                 stdout-path = &uartd;
  12         };
  13
  14         aliases {
  15                 rtc0 = "/i2c@7000d000/tps6586x@34";
  16                 rtc1 = "/rtc@7000e000";
  17                 serial0 = &uartd;
  18                 usb0 = "/usb@c5008000";
  19                 mmc0 = "/sdhci@c8000600";
  20                 mmc1 = "/sdhci@c8000400";
  21         };
  22
  23         memory {
  24                 reg = <0x00000000 0x40000000>;
  25         };
  26
  27         host1x@50000000 {
  28                 status = "okay";
  29                 dc@54200000 {
  30                         status = "okay";
  31                         rgb {
  32                                 status = "okay";
  33
  34                                 nvidia,panel = <&panel>;
  35
  36                                 display-timings {
  37                                         timing@0 {
  38                                                 /* Seaboard has 1366x768 */
  39                                                 clock-frequency = <70600000>;
  40                                                 hactive = <1366>;
  41                                                 vactive = <768>;
  42                                                 hback-porch = <58>;
  43                                                 hfront-porch = <58>;
  44                                                 hsync-len = <58>;
  45                                                 vback-porch = <4>;
  46                                                 vfront-porch = <4>;
  47                                                 vsync-len = <4>;
  48                                                 hsync-active = <1>;
  49                                         };
  50                                 };
  51                         };
  52                 };
  53
  54                 hdmi@54280000 {
  55                         status = "okay";
  56
  57                         vdd-supply = <&hdmi_vdd_reg>;
  58                         pll-supply = <&hdmi_pll_reg>;
  59
  60                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  61                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  62                                 GPIO_ACTIVE_HIGH>;
  63                 };
  64         };
  65
  66         pinmux@70000014 {
  67                 pinctrl-names = "default";
  68                 pinctrl-0 = <&state_default>;
  69
  70                 state_default: pinmux {
  71                         ata {
  72                                 nvidia,pins = "ata";
  73                                 nvidia,function = "ide";
  74                         };
  75                         atb {
  76                                 nvidia,pins = "atb", "gma", "gme";
  77                                 nvidia,function = "sdio4";
  78                         };
  79                         atc {
  80                                 nvidia,pins = "atc";
  81                                 nvidia,function = "nand";
  82                         };
  83                         atd {
  84                                 nvidia,pins = "atd", "ate", "gmb", "spia",
  85                                         "spib", "spic";
  86                                 nvidia,function = "gmi";
  87                         };
  88                         cdev1 {
  89                                 nvidia,pins = "cdev1";
  90                                 nvidia,function = "plla_out";
  91                         };
  92                         cdev2 {
  93                                 nvidia,pins = "cdev2";
  94                                 nvidia,function = "pllp_out4";
  95                         };
  96                         crtp {
  97                                 nvidia,pins = "crtp", "lm1";
  98                                 nvidia,function = "crt";
  99                         };
 100                         csus {
 101                                 nvidia,pins = "csus";
 102                                 nvidia,function = "vi_sensor_clk";
 103                         };
 104                         dap1 {
 105                                 nvidia,pins = "dap1";
 106                                 nvidia,function = "dap1";
 107                         };
 108                         dap2 {
 109                                 nvidia,pins = "dap2";
 110                                 nvidia,function = "dap2";
 111                         };
 112                         dap3 {
 113                                 nvidia,pins = "dap3";
 114                                 nvidia,function = "dap3";
 115                         };
 116                         dap4 {
 117                                 nvidia,pins = "dap4";
 118                                 nvidia,function = "dap4";
 119                         };
 120                         dta {
 121                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 122                                 nvidia,function = "vi";
 123                         };
 124                         dtf {
 125                                 nvidia,pins = "dtf";
 126                                 nvidia,function = "i2c3";
 127                         };
 128                         gmc {
 129                                 nvidia,pins = "gmc";
 130                                 nvidia,function = "uartd";
 131                         };
 132                         gmd {
 133                                 nvidia,pins = "gmd";
 134                                 nvidia,function = "sflash";
 135                         };
 136                         gpu {
 137                                 nvidia,pins = "gpu";
 138                                 nvidia,function = "pwm";
 139                         };
 140                         gpu7 {
 141                                 nvidia,pins = "gpu7";
 142                                 nvidia,function = "rtck";
 143                         };
 144                         gpv {
 145                                 nvidia,pins = "gpv", "slxa", "slxk";
 146                                 nvidia,function = "pcie";
 147                         };
 148                         hdint {
 149                                 nvidia,pins = "hdint";
 150                                 nvidia,function = "hdmi";
 151                         };
 152                         i2cp {
 153                                 nvidia,pins = "i2cp";
 154                                 nvidia,function = "i2cp";
 155                         };
 156                         irrx {
 157                                 nvidia,pins = "irrx", "irtx";
 158                                 nvidia,function = "uartb";
 159                         };
 160                         kbca {
 161                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 162                                         "kbce", "kbcf";
 163                                 nvidia,function = "kbc";
 164                         };
 165                         lcsn {
 166                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 167                                         "lsdi", "lvp0";
 168                                 nvidia,function = "rsvd4";
 169                         };
 170                         ld0 {
 171                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 172                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 173                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 174                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 175                                         "lhp1", "lhp2", "lhs", "lpp", "lpw0",
 176                                         "lpw2", "lsc0", "lsc1", "lsck", "lsda",
 177                                         "lspi", "lvp1", "lvs";
 178                                 nvidia,function = "displaya";
 179                         };
 180                         owc {
 181                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 182                                 nvidia,function = "rsvd2";
 183                         };
 184                         pmc {
 185                                 nvidia,pins = "pmc";
 186                                 nvidia,function = "pwr_on";
 187                         };
 188                         rm {
 189                                 nvidia,pins = "rm";
 190                                 nvidia,function = "i2c1";
 191                         };
 192                         sdb {
 193                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
 194                                 nvidia,function = "sdio3";
 195                         };
 196                         sdio1 {
 197                                 nvidia,pins = "sdio1";
 198                                 nvidia,function = "sdio1";
 199                         };
 200                         slxd {
 201                                 nvidia,pins = "slxd";
 202                                 nvidia,function = "spdif";
 203                         };
 204                         spid {
 205                                 nvidia,pins = "spid", "spie", "spif";
 206                                 nvidia,function = "spi1";
 207                         };
 208                         spig {
 209                                 nvidia,pins = "spig", "spih";
 210                                 nvidia,function = "spi2_alt";
 211                         };
 212                         uaa {
 213                                 nvidia,pins = "uaa", "uab", "uda";
 214                                 nvidia,function = "ulpi";
 215                         };
 216                         uad {
 217                                 nvidia,pins = "uad";
 218                                 nvidia,function = "irda";
 219                         };
 220                         uca {
 221                                 nvidia,pins = "uca", "ucb";
 222                                 nvidia,function = "uartc";
 223                         };
 224                         conf_ata {
 225                                 nvidia,pins = "ata", "atb", "atc", "atd",
 226                                         "cdev1", "cdev2", "dap1", "dap2",
 227                                         "dap4", "ddc", "dtf", "gma", "gmc",
 228                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
 229                                         "irtx", "pta", "rm", "sdc", "sdd",
 230                                         "slxc", "slxd", "slxk", "spdi", "spdo",
 231                                         "uac", "uad", "uca", "ucb", "uda";
 232                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 233                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 234                         };
 235                         conf_ate {
 236                                 nvidia,pins = "ate", "csus", "dap3", "gmd",
 237                                         "gpv", "owc", "spia", "spib", "spic",
 238                                         "spid", "spie", "spig";
 239                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 240                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 241                         };
 242                         conf_ck32 {
 243                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 244                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 245                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 246                         };
 247                         conf_crtp {
 248                                 nvidia,pins = "crtp", "gmb", "slxa", "spih";
 249                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 250                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 251                         };
 252                         conf_dta {
 253                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
 254                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 255                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 256                         };
 257                         conf_dte {
 258                                 nvidia,pins = "dte", "spif";
 259                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 260                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 261                         };
 262                         conf_hdint {
 263                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 264                                         "lpw1", "lsck", "lsda", "lsdi", "lvp0";
 265                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 266                         };
 267                         conf_kbca {
 268                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 269                                         "kbce", "kbcf", "sdio1", "uaa", "uab";
 270                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 271                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 272                         };
 273                         conf_lc {
 274                                 nvidia,pins = "lc", "ls";
 275                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 276                         };
 277                         conf_ld0 {
 278                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 279                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 280                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 281                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 282                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 283                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 284                                         "lvp1", "lvs", "pmc", "sdb";
 285                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 286                         };
 287                         conf_ld17_0 {
 288                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 289                                         "ld23_22";
 290                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 291                         };
 292                         drive_sdio1 {
 293                                 nvidia,pins = "drive_sdio1";
 294                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 295                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 296                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 297                                 nvidia,pull-down-strength = <31>;
 298                                 nvidia,pull-up-strength = <31>;
 299                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 300                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 301                         };
 302                 };
 303
 304                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 305                         ddc {
 306                                 nvidia,pins = "ddc";
 307                                 nvidia,function = "i2c2";
 308                         };
 309                         pta {
 310                                 nvidia,pins = "pta";
 311                                 nvidia,function = "rsvd4";
 312                         };
 313                 };
 314
 315                 state_i2cmux_pta: pinmux_i2cmux_pta {
 316                         ddc {
 317                                 nvidia,pins = "ddc";
 318                                 nvidia,function = "rsvd4";
 319                         };
 320                         pta {
 321                                 nvidia,pins = "pta";
 322                                 nvidia,function = "i2c2";
 323                         };
 324                 };
 325
 326                 state_i2cmux_idle: pinmux_i2cmux_idle {
 327                         ddc {
 328                                 nvidia,pins = "ddc";
 329                                 nvidia,function = "rsvd4";
 330                         };
 331                         pta {
 332                                 nvidia,pins = "pta";
 333                                 nvidia,function = "rsvd4";
 334                         };
 335                 };
 336         };
 337
 338         i2s@70002800 {
 339                 status = "okay";
 340         };
 341
 342         serial@70006300 {
 343                 status = "okay";
 344                 clock-frequency = < 216000000 >;        };
 345
 346         pwm: pwm@7000a000 {
 347                 status = "okay";
 348         };
 349
 350         i2c@7000c000 {
 351                 status = "okay";
 352                 clock-frequency = <400000>;
 353
 354                 wm8903: wm8903@1a {
 355                         compatible = "wlf,wm8903";
 356                         reg = <0x1a>;
 357                         interrupt-parent = <&gpio>;
 358                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
 359
 360                         gpio-controller;
 361                         #gpio-cells = <2>;
 362
 363                         micdet-cfg = <0>;
 364                         micdet-delay = <100>;
 365                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 366                 };
 367
 368                 /* ALS and proximity sensor */
 369                 isl29018@44 {
 370                         compatible = "isil,isl29018";
 371                         reg = <0x44>;
 372                         interrupt-parent = <&gpio>;
 373                         interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
 374                 };
 375         };
 376
 377         i2c@7000c400 {
 378                 status = "okay";
 379                 clock-frequency = <100000>;
 380         };
 381
 382         i2cmux {
 383                 compatible = "i2c-mux-pinctrl";
 384                 #address-cells = <1>;
 385                 #size-cells = <0>;
 386
 387                 i2c-parent = <&{/i2c@7000c400}>;
 388
 389                 pinctrl-names = "ddc", "pta", "idle";
 390                 pinctrl-0 = <&state_i2cmux_ddc>;
 391                 pinctrl-1 = <&state_i2cmux_pta>;
 392                 pinctrl-2 = <&state_i2cmux_idle>;
 393
 394                 hdmi_ddc: i2c@0 {
 395                         reg = <0>;
 396                         #address-cells = <1>;
 397                         #size-cells = <0>;
 398                 };
 399
 400                 lvds_ddc: i2c@1 {
 401                         reg = <1>;
 402                         #address-cells = <1>;
 403                         #size-cells = <0>;
 404                 };
 405         };
 406
 407         i2c@7000c500 {
 408                 status = "okay";
 409                 clock-frequency = <400000>;
 410         };
 411
 412         i2c@7000d000 {
 413                 status = "okay";
 414                 clock-frequency = <400000>;
 415
 416                 pmic: tps6586x@34 {
 417                         compatible = "ti,tps6586x";
 418                         reg = <0x34>;
 419                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 420
 421                         ti,system-power-controller;
 422
 423                         #gpio-cells = <2>;
 424                         gpio-controller;
 425
 426                         sys-supply = <&vdd_5v0_reg>;
 427                         vin-sm0-supply = <&sys_reg>;
 428                         vin-sm1-supply = <&sys_reg>;
 429                         vin-sm2-supply = <&sys_reg>;
 430                         vinldo01-supply = <&sm2_reg>;
 431                         vinldo23-supply = <&sm2_reg>;
 432                         vinldo4-supply = <&sm2_reg>;
 433                         vinldo678-supply = <&sm2_reg>;
 434                         vinldo9-supply = <&sm2_reg>;
 435
 436                         regulators {
 437                                 sys_reg: sys {
 438                                         regulator-name = "vdd_sys";
 439                                         regulator-always-on;
 440                                 };
 441
 442                                 sm0 {
 443                                         regulator-name = "vdd_sm0,vdd_core";
 444                                         regulator-min-microvolt = <1200000>;
 445                                         regulator-max-microvolt = <1200000>;
 446                                         regulator-always-on;
 447                                 };
 448
 449                                 sm1 {
 450                                         regulator-name = "vdd_sm1,vdd_cpu";
 451                                         regulator-min-microvolt = <1000000>;
 452                                         regulator-max-microvolt = <1000000>;
 453                                         regulator-always-on;
 454                                 };
 455
 456                                 sm2_reg: sm2 {
 457                                         regulator-name = "vdd_sm2,vin_ldo*";
 458                                         regulator-min-microvolt = <3700000>;
 459                                         regulator-max-microvolt = <3700000>;
 460                                         regulator-always-on;
 461                                 };
 462
 463                                 /* LDO0 is not connected to anything */
 464
 465                                 ldo1 {
 466                                         regulator-name = "vdd_ldo1,avdd_pll*";
 467                                         regulator-min-microvolt = <1100000>;
 468                                         regulator-max-microvolt = <1100000>;
 469                                         regulator-always-on;
 470                                 };
 471
 472                                 ldo2 {
 473                                         regulator-name = "vdd_ldo2,vdd_rtc";
 474                                         regulator-min-microvolt = <1200000>;
 475                                         regulator-max-microvolt = <1200000>;
 476                                 };
 477
 478                                 ldo3 {
 479                                         regulator-name = "vdd_ldo3,avdd_usb*";
 480                                         regulator-min-microvolt = <3300000>;
 481                                         regulator-max-microvolt = <3300000>;
 482                                         regulator-always-on;
 483                                 };
 484
 485                                 ldo4 {
 486                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 487                                         regulator-min-microvolt = <1800000>;
 488                                         regulator-max-microvolt = <1800000>;
 489                                         regulator-always-on;
 490                                 };
 491
 492                                 ldo5 {
 493                                         regulator-name = "vdd_ldo5,vcore_mmc";
 494                                         regulator-min-microvolt = <2850000>;
 495                                         regulator-max-microvolt = <2850000>;
 496                                         regulator-always-on;
 497                                 };
 498
 499                                 ldo6 {
 500                                         regulator-name = "vdd_ldo6,avdd_vdac";
 501                                         regulator-min-microvolt = <1800000>;
 502                                         regulator-max-microvolt = <1800000>;
 503                                 };
 504
 505                                 hdmi_vdd_reg: ldo7 {
 506                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
 507                                         regulator-min-microvolt = <3300000>;
 508                                         regulator-max-microvolt = <3300000>;
 509                                 };
 510
 511                                 hdmi_pll_reg: ldo8 {
 512                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 513                                         regulator-min-microvolt = <1800000>;
 514                                         regulator-max-microvolt = <1800000>;
 515                                 };
 516
 517                                 ldo9 {
 518                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 519                                         regulator-min-microvolt = <2850000>;
 520                                         regulator-max-microvolt = <2850000>;
 521                                         regulator-always-on;
 522                                 };
 523
 524                                 ldo_rtc {
 525                                         regulator-name = "vdd_rtc_out,vdd_cell";
 526                                         regulator-min-microvolt = <3300000>;
 527                                         regulator-max-microvolt = <3300000>;
 528                                         regulator-always-on;
 529                                 };
 530                         };
 531                 };
 532
 533                 temperature-sensor@4c {
 534                         compatible = "onnn,nct1008";
 535                         reg = <0x4c>;
 536                 };
 537         };
 538
 539         pmc@7000e400 {
 540                 nvidia,invert-interrupt;
 541                 nvidia,suspend-mode = <1>;
 542                 nvidia,cpu-pwr-good-time = <2000>;
 543                 nvidia,cpu-pwr-off-time = <100>;
 544                 nvidia,core-pwr-good-time = <3845 3845>;
 545                 nvidia,core-pwr-off-time = <458>;
 546                 nvidia,sys-clock-req-active-high;
 547         };
 548
 549         usb@c5000000 {
 550                 status = "okay";
 551         };
 552
 553         usb-phy@c5000000 {
 554                 status = "okay";
 555         };
 556
 557         usb@c5004000 {
 558                 status = "okay";
 559                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 560                         GPIO_ACTIVE_LOW>;
 561         };
 562
 563         usb-phy@c5004000 {
 564                 status = "okay";
 565                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 566                         GPIO_ACTIVE_LOW>;
 567         };
 568
 569         usb@c5008000 {
 570                 status = "okay";
 571         };
 572
 573         usb-phy@c5008000 {
 574                 status = "okay";
 575         };
 576
 577         sdhci@c8000000 {
 578                 status = "okay";
 579                 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
 580                 bus-width = <4>;
 581                 keep-power-in-suspend;
 582         };
 583
 584         sdhci@c8000400 {
 585                 status = "okay";
 586                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 587                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 588                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 589                 bus-width = <4>;
 590         };
 591
 592         sdhci@c8000600 {
 593                 status = "okay";
 594                 bus-width = <8>;
 595                 non-removable;
 596         };
 597
 598         backlight: backlight {
 599                 compatible = "pwm-backlight";
 600
 601                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 602                 power-supply = <&vdd_bl_reg>;
 603                 pwms = <&pwm 2 5000000>;
 604
 605                 brightness-levels = <0 4 8 16 32 64 128 255>;
 606                 default-brightness-level = <6>;
 607         };
 608
 609         clocks {
 610                 compatible = "simple-bus";
 611                 #address-cells = <1>;
 612                 #size-cells = <0>;
 613
 614                 clk32k_in: clock@0 {
 615                         compatible = "fixed-clock";
 616                         reg=<0>;
 617                         #clock-cells = <0>;
 618                         clock-frequency = <32768>;
 619                 };
 620         };
 621
 622         gpio-keys {
 623                 compatible = "gpio-keys";
 624
 625                 power {
 626                         label = "Power";
 627                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 628                         linux,code = <KEY_POWER>;
 629                         gpio-key,wakeup;
 630                 };
 631         };
 632
 633         panel: panel {
 634                 compatible = "chunghwa,claa101wa01a", "simple-panel";
 635
 636                 power-supply = <&vdd_pnl_reg>;
 637                 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
 638
 639                 backlight = <&backlight>;
 640                 ddc-i2c-bus = <&lvds_ddc>;
 641         };
 642
 643         regulators {
 644                 compatible = "simple-bus";
 645                 #address-cells = <1>;
 646                 #size-cells = <0>;
 647
 648                 vdd_5v0_reg: regulator@0 {
 649                         compatible = "regulator-fixed";
 650                         reg = <0>;
 651                         regulator-name = "vdd_5v0";
 652                         regulator-min-microvolt = <5000000>;
 653                         regulator-max-microvolt = <5000000>;
 654                         regulator-always-on;
 655                 };
 656
 657                 regulator@1 {
 658                         compatible = "regulator-fixed";
 659                         reg = <1>;
 660                         regulator-name = "vdd_1v5";
 661                         regulator-min-microvolt = <1500000>;
 662                         regulator-max-microvolt = <1500000>;
 663                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 664                 };
 665
 666                 regulator@2 {
 667                         compatible = "regulator-fixed";
 668                         reg = <2>;
 669                         regulator-name = "vdd_1v2";
 670                         regulator-min-microvolt = <1200000>;
 671                         regulator-max-microvolt = <1200000>;
 672                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
 673                         enable-active-high;
 674                 };
 675
 676                 vdd_pnl_reg: regulator@3 {
 677                         compatible = "regulator-fixed";
 678                         reg = <3>;
 679                         regulator-name = "vdd_pnl";
 680                         regulator-min-microvolt = <2800000>;
 681                         regulator-max-microvolt = <2800000>;
 682                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 683                         enable-active-high;
 684                 };
 685
 686                 vdd_bl_reg: regulator@4 {
 687                         compatible = "regulator-fixed";
 688                         reg = <4>;
 689                         regulator-name = "vdd_bl";
 690                         regulator-min-microvolt = <2800000>;
 691                         regulator-max-microvolt = <2800000>;
 692                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
 693                         enable-active-high;
 694                 };
 695         };
 696
 697         sound {
 698                 compatible = "nvidia,tegra-audio-wm8903-ventana",
 699                              "nvidia,tegra-audio-wm8903";
 700                 nvidia,model = "NVIDIA Tegra Ventana";
 701
 702                 nvidia,audio-routing =
 703                         "Headphone Jack", "HPOUTR",
 704                         "Headphone Jack", "HPOUTL",
 705                         "Int Spk", "ROP",
 706                         "Int Spk", "RON",
 707                         "Int Spk", "LOP",
 708                         "Int Spk", "LON",
 709                         "Mic Jack", "MICBIAS",
 710                         "IN1L", "Mic Jack";
 711
 712                 nvidia,i2s-controller = <&tegra_i2s1>;
 713                 nvidia,audio-codec = <&wm8903>;
 714
 715                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 716                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
 717                 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
 718                         GPIO_ACTIVE_HIGH>;
 719                 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
 720                         GPIO_ACTIVE_HIGH>;
 721
 722                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 723                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 724                          <&tegra_car TEGRA20_CLK_CDEV1>;
 725                 clock-names = "pll_a", "pll_a_out0", "mclk";
 726         };
 727 };