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tegra: dts: Sync tegra20 device tree files with Linux
[u-boot] / arch / arm / dts / tegra20-ventana.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
5
6 / {
7         model = "NVIDIA Tegra20 Ventana evaluation board";
8         compatible = "nvidia,ventana", "nvidia,tegra20";
9
10         chosen {
11                 stdout-path = &uartd;
12         };
13
14         aliases {
15                 rtc0 = "/i2c@7000d000/tps6586x@34";
16                 rtc1 = "/rtc@7000e000";
17                 serial0 = &uartd;
18                 usb0 = "/usb@c5008000";
19                 sdhci0 = "/sdhci@c8000600";
20                 sdhci1 = "/sdhci@c8000400";
21         };
22
23         memory {
24                 reg = <0x00000000 0x40000000>;
25         };
26
27         host1x@50000000 {
28                 status = "okay";
29                 dc@54200000 {
30                         status = "okay";
31                         rgb {
32                                 status = "okay";
33                                 nvidia,panel = <&lcd_panel>;
34                         };
35                 };
36
37                 hdmi@54280000 {
38                         status = "okay";
39
40                         vdd-supply = <&hdmi_vdd_reg>;
41                         pll-supply = <&hdmi_pll_reg>;
42
43                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
44                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
45                                 GPIO_ACTIVE_HIGH>;
46                 };
47         };
48
49         pinmux@70000014 {
50                 pinctrl-names = "default";
51                 pinctrl-0 = <&state_default>;
52
53                 state_default: pinmux {
54                         ata {
55                                 nvidia,pins = "ata";
56                                 nvidia,function = "ide";
57                         };
58                         atb {
59                                 nvidia,pins = "atb", "gma", "gme";
60                                 nvidia,function = "sdio4";
61                         };
62                         atc {
63                                 nvidia,pins = "atc";
64                                 nvidia,function = "nand";
65                         };
66                         atd {
67                                 nvidia,pins = "atd", "ate", "gmb", "spia",
68                                         "spib", "spic";
69                                 nvidia,function = "gmi";
70                         };
71                         cdev1 {
72                                 nvidia,pins = "cdev1";
73                                 nvidia,function = "plla_out";
74                         };
75                         cdev2 {
76                                 nvidia,pins = "cdev2";
77                                 nvidia,function = "pllp_out4";
78                         };
79                         crtp {
80                                 nvidia,pins = "crtp", "lm1";
81                                 nvidia,function = "crt";
82                         };
83                         csus {
84                                 nvidia,pins = "csus";
85                                 nvidia,function = "vi_sensor_clk";
86                         };
87                         dap1 {
88                                 nvidia,pins = "dap1";
89                                 nvidia,function = "dap1";
90                         };
91                         dap2 {
92                                 nvidia,pins = "dap2";
93                                 nvidia,function = "dap2";
94                         };
95                         dap3 {
96                                 nvidia,pins = "dap3";
97                                 nvidia,function = "dap3";
98                         };
99                         dap4 {
100                                 nvidia,pins = "dap4";
101                                 nvidia,function = "dap4";
102                         };
103                         dta {
104                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
105                                 nvidia,function = "vi";
106                         };
107                         dtf {
108                                 nvidia,pins = "dtf";
109                                 nvidia,function = "i2c3";
110                         };
111                         gmc {
112                                 nvidia,pins = "gmc";
113                                 nvidia,function = "uartd";
114                         };
115                         gmd {
116                                 nvidia,pins = "gmd";
117                                 nvidia,function = "sflash";
118                         };
119                         gpu {
120                                 nvidia,pins = "gpu";
121                                 nvidia,function = "pwm";
122                         };
123                         gpu7 {
124                                 nvidia,pins = "gpu7";
125                                 nvidia,function = "rtck";
126                         };
127                         gpv {
128                                 nvidia,pins = "gpv", "slxa", "slxk";
129                                 nvidia,function = "pcie";
130                         };
131                         hdint {
132                                 nvidia,pins = "hdint";
133                                 nvidia,function = "hdmi";
134                         };
135                         i2cp {
136                                 nvidia,pins = "i2cp";
137                                 nvidia,function = "i2cp";
138                         };
139                         irrx {
140                                 nvidia,pins = "irrx", "irtx";
141                                 nvidia,function = "uartb";
142                         };
143                         kbca {
144                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
145                                         "kbce", "kbcf";
146                                 nvidia,function = "kbc";
147                         };
148                         lcsn {
149                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
150                                         "lsdi", "lvp0";
151                                 nvidia,function = "rsvd4";
152                         };
153                         ld0 {
154                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
155                                         "ld5", "ld6", "ld7", "ld8", "ld9",
156                                         "ld10", "ld11", "ld12", "ld13", "ld14",
157                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
158                                         "lhp1", "lhp2", "lhs", "lpp", "lpw0",
159                                         "lpw2", "lsc0", "lsc1", "lsck", "lsda",
160                                         "lspi", "lvp1", "lvs";
161                                 nvidia,function = "displaya";
162                         };
163                         owc {
164                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
165                                 nvidia,function = "rsvd2";
166                         };
167                         pmc {
168                                 nvidia,pins = "pmc";
169                                 nvidia,function = "pwr_on";
170                         };
171                         rm {
172                                 nvidia,pins = "rm";
173                                 nvidia,function = "i2c1";
174                         };
175                         sdb {
176                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
177                                 nvidia,function = "sdio3";
178                         };
179                         sdio1 {
180                                 nvidia,pins = "sdio1";
181                                 nvidia,function = "sdio1";
182                         };
183                         slxd {
184                                 nvidia,pins = "slxd";
185                                 nvidia,function = "spdif";
186                         };
187                         spid {
188                                 nvidia,pins = "spid", "spie", "spif";
189                                 nvidia,function = "spi1";
190                         };
191                         spig {
192                                 nvidia,pins = "spig", "spih";
193                                 nvidia,function = "spi2_alt";
194                         };
195                         uaa {
196                                 nvidia,pins = "uaa", "uab", "uda";
197                                 nvidia,function = "ulpi";
198                         };
199                         uad {
200                                 nvidia,pins = "uad";
201                                 nvidia,function = "irda";
202                         };
203                         uca {
204                                 nvidia,pins = "uca", "ucb";
205                                 nvidia,function = "uartc";
206                         };
207                         conf_ata {
208                                 nvidia,pins = "ata", "atb", "atc", "atd",
209                                         "cdev1", "cdev2", "dap1", "dap2",
210                                         "dap4", "ddc", "dtf", "gma", "gmc",
211                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
212                                         "irtx", "pta", "rm", "sdc", "sdd",
213                                         "slxc", "slxd", "slxk", "spdi", "spdo",
214                                         "uac", "uad", "uca", "ucb", "uda";
215                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
217                         };
218                         conf_ate {
219                                 nvidia,pins = "ate", "csus", "dap3", "gmd",
220                                         "gpv", "owc", "spia", "spib", "spic",
221                                         "spid", "spie", "spig";
222                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
223                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
224                         };
225                         conf_ck32 {
226                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
227                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
228                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229                         };
230                         conf_crtp {
231                                 nvidia,pins = "crtp", "gmb", "slxa", "spih";
232                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
233                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
234                         };
235                         conf_dta {
236                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
237                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
238                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
239                         };
240                         conf_dte {
241                                 nvidia,pins = "dte", "spif";
242                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
243                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
244                         };
245                         conf_hdint {
246                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
247                                         "lpw1", "lsck", "lsda", "lsdi", "lvp0";
248                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
249                         };
250                         conf_kbca {
251                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
252                                         "kbce", "kbcf", "sdio1", "uaa", "uab";
253                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
254                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
255                         };
256                         conf_lc {
257                                 nvidia,pins = "lc", "ls";
258                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
259                         };
260                         conf_ld0 {
261                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
262                                         "ld5", "ld6", "ld7", "ld8", "ld9",
263                                         "ld10", "ld11", "ld12", "ld13", "ld14",
264                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
265                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
266                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
267                                         "lvp1", "lvs", "pmc", "sdb";
268                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
269                         };
270                         conf_ld17_0 {
271                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
272                                         "ld23_22";
273                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
274                         };
275                         drive_sdio1 {
276                                 nvidia,pins = "drive_sdio1";
277                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
278                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
279                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
280                                 nvidia,pull-down-strength = <31>;
281                                 nvidia,pull-up-strength = <31>;
282                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
283                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
284                         };
285                 };
286
287                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
288                         ddc {
289                                 nvidia,pins = "ddc";
290                                 nvidia,function = "i2c2";
291                         };
292                         pta {
293                                 nvidia,pins = "pta";
294                                 nvidia,function = "rsvd4";
295                         };
296                 };
297
298                 state_i2cmux_pta: pinmux_i2cmux_pta {
299                         ddc {
300                                 nvidia,pins = "ddc";
301                                 nvidia,function = "rsvd4";
302                         };
303                         pta {
304                                 nvidia,pins = "pta";
305                                 nvidia,function = "i2c2";
306                         };
307                 };
308
309                 state_i2cmux_idle: pinmux_i2cmux_idle {
310                         ddc {
311                                 nvidia,pins = "ddc";
312                                 nvidia,function = "rsvd4";
313                         };
314                         pta {
315                                 nvidia,pins = "pta";
316                                 nvidia,function = "rsvd4";
317                         };
318                 };
319         };
320
321         i2s@70002800 {
322                 status = "okay";
323         };
324
325         serial@70006300 {
326                 status = "okay";
327                 clock-frequency = < 216000000 >;        };
328
329         pwm: pwm@7000a000 {
330                 status = "okay";
331         };
332
333         i2c@7000c000 {
334                 status = "okay";
335                 clock-frequency = <400000>;
336
337                 wm8903: wm8903@1a {
338                         compatible = "wlf,wm8903";
339                         reg = <0x1a>;
340                         interrupt-parent = <&gpio>;
341                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
342
343                         gpio-controller;
344                         #gpio-cells = <2>;
345
346                         micdet-cfg = <0>;
347                         micdet-delay = <100>;
348                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
349                 };
350
351                 /* ALS and proximity sensor */
352                 isl29018@44 {
353                         compatible = "isil,isl29018";
354                         reg = <0x44>;
355                         interrupt-parent = <&gpio>;
356                         interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
357                 };
358         };
359
360         i2c@7000c400 {
361                 status = "okay";
362                 clock-frequency = <100000>;
363         };
364
365         i2cmux {
366                 compatible = "i2c-mux-pinctrl";
367                 #address-cells = <1>;
368                 #size-cells = <0>;
369
370                 i2c-parent = <&{/i2c@7000c400}>;
371
372                 pinctrl-names = "ddc", "pta", "idle";
373                 pinctrl-0 = <&state_i2cmux_ddc>;
374                 pinctrl-1 = <&state_i2cmux_pta>;
375                 pinctrl-2 = <&state_i2cmux_idle>;
376
377                 hdmi_ddc: i2c@0 {
378                         reg = <0>;
379                         #address-cells = <1>;
380                         #size-cells = <0>;
381                 };
382
383                 lvds_ddc: i2c@1 {
384                         reg = <1>;
385                         #address-cells = <1>;
386                         #size-cells = <0>;
387                 };
388         };
389
390         i2c@7000c500 {
391                 status = "okay";
392                 clock-frequency = <400000>;
393         };
394
395         i2c@7000d000 {
396                 status = "okay";
397                 clock-frequency = <400000>;
398
399                 pmic: tps6586x@34 {
400                         compatible = "ti,tps6586x";
401                         reg = <0x34>;
402                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
403
404                         ti,system-power-controller;
405
406                         #gpio-cells = <2>;
407                         gpio-controller;
408
409                         sys-supply = <&vdd_5v0_reg>;
410                         vin-sm0-supply = <&sys_reg>;
411                         vin-sm1-supply = <&sys_reg>;
412                         vin-sm2-supply = <&sys_reg>;
413                         vinldo01-supply = <&sm2_reg>;
414                         vinldo23-supply = <&sm2_reg>;
415                         vinldo4-supply = <&sm2_reg>;
416                         vinldo678-supply = <&sm2_reg>;
417                         vinldo9-supply = <&sm2_reg>;
418
419                         regulators {
420                                 sys_reg: sys {
421                                         regulator-name = "vdd_sys";
422                                         regulator-always-on;
423                                 };
424
425                                 sm0 {
426                                         regulator-name = "vdd_sm0,vdd_core";
427                                         regulator-min-microvolt = <1200000>;
428                                         regulator-max-microvolt = <1200000>;
429                                         regulator-always-on;
430                                 };
431
432                                 sm1 {
433                                         regulator-name = "vdd_sm1,vdd_cpu";
434                                         regulator-min-microvolt = <1000000>;
435                                         regulator-max-microvolt = <1000000>;
436                                         regulator-always-on;
437                                 };
438
439                                 sm2_reg: sm2 {
440                                         regulator-name = "vdd_sm2,vin_ldo*";
441                                         regulator-min-microvolt = <3700000>;
442                                         regulator-max-microvolt = <3700000>;
443                                         regulator-always-on;
444                                 };
445
446                                 /* LDO0 is not connected to anything */
447
448                                 ldo1 {
449                                         regulator-name = "vdd_ldo1,avdd_pll*";
450                                         regulator-min-microvolt = <1100000>;
451                                         regulator-max-microvolt = <1100000>;
452                                         regulator-always-on;
453                                 };
454
455                                 ldo2 {
456                                         regulator-name = "vdd_ldo2,vdd_rtc";
457                                         regulator-min-microvolt = <1200000>;
458                                         regulator-max-microvolt = <1200000>;
459                                 };
460
461                                 ldo3 {
462                                         regulator-name = "vdd_ldo3,avdd_usb*";
463                                         regulator-min-microvolt = <3300000>;
464                                         regulator-max-microvolt = <3300000>;
465                                         regulator-always-on;
466                                 };
467
468                                 ldo4 {
469                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
470                                         regulator-min-microvolt = <1800000>;
471                                         regulator-max-microvolt = <1800000>;
472                                         regulator-always-on;
473                                 };
474
475                                 ldo5 {
476                                         regulator-name = "vdd_ldo5,vcore_mmc";
477                                         regulator-min-microvolt = <2850000>;
478                                         regulator-max-microvolt = <2850000>;
479                                         regulator-always-on;
480                                 };
481
482                                 ldo6 {
483                                         regulator-name = "vdd_ldo6,avdd_vdac";
484                                         regulator-min-microvolt = <1800000>;
485                                         regulator-max-microvolt = <1800000>;
486                                 };
487
488                                 hdmi_vdd_reg: ldo7 {
489                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
490                                         regulator-min-microvolt = <3300000>;
491                                         regulator-max-microvolt = <3300000>;
492                                 };
493
494                                 hdmi_pll_reg: ldo8 {
495                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
496                                         regulator-min-microvolt = <1800000>;
497                                         regulator-max-microvolt = <1800000>;
498                                 };
499
500                                 ldo9 {
501                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
502                                         regulator-min-microvolt = <2850000>;
503                                         regulator-max-microvolt = <2850000>;
504                                         regulator-always-on;
505                                 };
506
507                                 ldo_rtc {
508                                         regulator-name = "vdd_rtc_out,vdd_cell";
509                                         regulator-min-microvolt = <3300000>;
510                                         regulator-max-microvolt = <3300000>;
511                                         regulator-always-on;
512                                 };
513                         };
514                 };
515
516                 temperature-sensor@4c {
517                         compatible = "onnn,nct1008";
518                         reg = <0x4c>;
519                 };
520         };
521
522         pmc@7000e400 {
523                 nvidia,invert-interrupt;
524                 nvidia,suspend-mode = <1>;
525                 nvidia,cpu-pwr-good-time = <2000>;
526                 nvidia,cpu-pwr-off-time = <100>;
527                 nvidia,core-pwr-good-time = <3845 3845>;
528                 nvidia,core-pwr-off-time = <458>;
529                 nvidia,sys-clock-req-active-high;
530         };
531
532         usb@c5000000 {
533                 status = "okay";
534         };
535
536         usb-phy@c5000000 {
537                 status = "okay";
538         };
539
540         usb@c5004000 {
541                 status = "okay";
542                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
543                         GPIO_ACTIVE_LOW>;
544         };
545
546         usb-phy@c5004000 {
547                 status = "okay";
548                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
549                         GPIO_ACTIVE_LOW>;
550         };
551
552         usb@c5008000 {
553                 status = "okay";
554         };
555
556         usb-phy@c5008000 {
557                 status = "okay";
558         };
559
560         sdhci@c8000000 {
561                 status = "okay";
562                 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
563                 bus-width = <4>;
564                 keep-power-in-suspend;
565         };
566
567         sdhci@c8000400 {
568                 status = "okay";
569                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
570                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
571                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
572                 bus-width = <4>;
573         };
574
575         sdhci@c8000600 {
576                 status = "okay";
577                 bus-width = <8>;
578                 non-removable;
579         };
580
581         backlight: backlight {
582                 compatible = "pwm-backlight";
583
584                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
585                 power-supply = <&vdd_bl_reg>;
586                 pwms = <&pwm 2 5000000>;
587
588                 brightness-levels = <0 4 8 16 32 64 128 255>;
589                 default-brightness-level = <6>;
590         };
591
592         clocks {
593                 compatible = "simple-bus";
594                 #address-cells = <1>;
595                 #size-cells = <0>;
596
597                 clk32k_in: clock@0 {
598                         compatible = "fixed-clock";
599                         reg=<0>;
600                         #clock-cells = <0>;
601                         clock-frequency = <32768>;
602                 };
603         };
604
605         gpio-keys {
606                 compatible = "gpio-keys";
607
608                 power {
609                         label = "Power";
610                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
611                         linux,code = <KEY_POWER>;
612                         gpio-key,wakeup;
613                 };
614         };
615
616         regulators {
617                 compatible = "simple-bus";
618                 #address-cells = <1>;
619                 #size-cells = <0>;
620
621                 vdd_5v0_reg: regulator@0 {
622                         compatible = "regulator-fixed";
623                         reg = <0>;
624                         regulator-name = "vdd_5v0";
625                         regulator-min-microvolt = <5000000>;
626                         regulator-max-microvolt = <5000000>;
627                         regulator-always-on;
628                 };
629
630                 regulator@1 {
631                         compatible = "regulator-fixed";
632                         reg = <1>;
633                         regulator-name = "vdd_1v5";
634                         regulator-min-microvolt = <1500000>;
635                         regulator-max-microvolt = <1500000>;
636                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
637                 };
638
639                 regulator@2 {
640                         compatible = "regulator-fixed";
641                         reg = <2>;
642                         regulator-name = "vdd_1v2";
643                         regulator-min-microvolt = <1200000>;
644                         regulator-max-microvolt = <1200000>;
645                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
646                         enable-active-high;
647                 };
648
649                 vdd_pnl_reg: regulator@3 {
650                         compatible = "regulator-fixed";
651                         reg = <3>;
652                         regulator-name = "vdd_pnl";
653                         regulator-min-microvolt = <2800000>;
654                         regulator-max-microvolt = <2800000>;
655                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
656                         enable-active-high;
657                 };
658
659                 vdd_bl_reg: regulator@4 {
660                         compatible = "regulator-fixed";
661                         reg = <4>;
662                         regulator-name = "vdd_bl";
663                         regulator-min-microvolt = <2800000>;
664                         regulator-max-microvolt = <2800000>;
665                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
666                         enable-active-high;
667                 };
668         };
669
670         lcd_panel: panel {
671                 clock = <72072000>;
672                 xres = <1366>;
673                 yres = <768>;
674                 left-margin = <58>;
675                 right-margin = <58>;
676                 hsync-len = <58>;
677                 lower-margin = <4>;
678                 upper-margin = <4>;
679                 vsync-len = <4>;
680                 hsync-active-high;
681                 vsync-active-high;
682                 nvidia,bits-per-pixel = <16>;
683                 nvidia,pwm = <&pwm 2 0>;
684                 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(D, 4)
685                                                         GPIO_ACTIVE_HIGH>;
686                 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
687                                                         GPIO_ACTIVE_HIGH>;
688                 nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0)
689                                                         GPIO_ACTIVE_HIGH>;
690                 nvidia,panel-vdd-gpios = <&gpio TEGRA_GPIO(C, 6)
691                                                         GPIO_ACTIVE_HIGH>;
692                 nvidia,panel-timings = <0 0 200 0 0>;
693         };
694
695         sound {
696                 compatible = "nvidia,tegra-audio-wm8903-ventana",
697                              "nvidia,tegra-audio-wm8903";
698                 nvidia,model = "NVIDIA Tegra Ventana";
699
700                 nvidia,audio-routing =
701                         "Headphone Jack", "HPOUTR",
702                         "Headphone Jack", "HPOUTL",
703                         "Int Spk", "ROP",
704                         "Int Spk", "RON",
705                         "Int Spk", "LOP",
706                         "Int Spk", "LON",
707                         "Mic Jack", "MICBIAS",
708                         "IN1L", "Mic Jack";
709
710                 nvidia,i2s-controller = <&tegra_i2s1>;
711                 nvidia,audio-codec = <&wm8903>;
712
713                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
714                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
715                 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
716                         GPIO_ACTIVE_HIGH>;
717                 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
718                         GPIO_ACTIVE_HIGH>;
719
720                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
721                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
722                          <&tegra_car TEGRA20_CLK_CDEV1>;
723                 clock-names = "pll_a", "pll_a_out0", "mclk";
724         };
725 };