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exynos: dts: Correct EC interrupt GPIO
[u-boot] / arch / arm / dts / tegra20-whistler.dts
1 /dts-v1/;
2
3 #include "tegra20.dtsi"
4
5 / {
6         model = "NVIDIA Tegra20 Whistler evaluation board";
7         compatible = "nvidia,whistler", "nvidia,tegra20";
8
9         aliases {
10                 i2c0 = "/i2c@7000d000";
11                 usb0 = "/usb@c5008000";
12                 sdhci0 = "/sdhci@c8000600";
13                 sdhci1 = "/sdhci@c8000400";
14         };
15
16         memory {
17                 device_type = "memory";
18                 reg = < 0x00000000 0x20000000 >;
19         };
20
21         serial@70006000 {
22                 clock-frequency = < 216000000 >;
23         };
24
25         i2c@7000c000 {
26                 status = "disabled";
27         };
28
29         i2c@7000c400 {
30                 status = "disabled";
31         };
32
33         i2c@7000c500 {
34                 status = "disabled";
35         };
36
37         i2c@7000d000 {
38                 clock-frequency = <100000>;
39
40                 pmic@3c {
41                         compatible = "maxim,max8907b";
42                         reg = <0x3c>;
43
44                         clk_32k: clock {
45                                 compatible = "fixed-clock";
46                                 /*
47                                  * leave out for now due to CPP:
48                                  * #clock-cells = <0>;
49                                  */
50                                 clock-frequency = <32768>;
51                         };
52                 };
53         };
54
55         usb@c5000000 {
56                 status = "disabled";
57         };
58
59         usb@c5004000 {
60                 status = "disabled";
61         };
62
63         sdhci@c8000400 {
64                 status = "okay";
65                 wp-gpios = <&gpio 173 0>; /* gpio PV5 */
66                 bus-width = <8>;
67         };
68
69         sdhci@c8000600 {
70                 status = "okay";
71                 bus-width = <8>;
72         };
73 };