]> git.sur5r.net Git - u-boot/blob - arch/arm/dts/tegra30.dtsi
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
[u-boot] / arch / arm / dts / tegra30.dtsi
1 #include <dt-bindings/clock/tegra30-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4
5 #include "skeleton.dtsi"
6
7 / {
8         compatible = "nvidia,tegra30";
9
10         tegra_car: clock {
11                 compatible = "nvidia,tegra30-car";
12                 reg = <0x60006000 0x1000>;
13                 #clock-cells = <1>;
14         };
15
16         apbdma: dma {
17                 compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
18                 reg = <0x6000a000 0x1400>;
19                 interrupts = <0 104 0x04
20                               0 105 0x04
21                               0 106 0x04
22                               0 107 0x04
23                               0 108 0x04
24                               0 109 0x04
25                               0 110 0x04
26                               0 111 0x04
27                               0 112 0x04
28                               0 113 0x04
29                               0 114 0x04
30                               0 115 0x04
31                               0 116 0x04
32                               0 117 0x04
33                               0 118 0x04
34                               0 119 0x04
35                               0 128 0x04
36                               0 129 0x04
37                               0 130 0x04
38                               0 131 0x04
39                               0 132 0x04
40                               0 133 0x04
41                               0 134 0x04
42                               0 135 0x04
43                               0 136 0x04
44                               0 137 0x04
45                               0 138 0x04
46                               0 139 0x04
47                               0 140 0x04
48                               0 141 0x04
49                               0 142 0x04
50                               0 143 0x04>;
51                 clocks = <&tegra_car 34>;
52         };
53
54         gpio: gpio@6000d000 {
55                 compatible = "nvidia,tegra30-gpio";
56                 reg = <0x6000d000 0x1000>;
57                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
58                              <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
59                              <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
60                              <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
61                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
62                              <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
63                              <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
64                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
65                 #gpio-cells = <2>;
66                 gpio-controller;
67                 #interrupt-cells = <2>;
68                 interrupt-controller;
69         };
70
71         i2c@7000c000 {
72                 compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
73                 reg = <0x7000c000 0x100>;
74                 interrupts = <0 38 0x04>;
75                 #address-cells = <1>;
76                 #size-cells = <0>;
77                 clocks = <&tegra_car 12>, <&tegra_car 182>;
78                 clock-names = "div-clk", "fast-clk";
79                 status = "disabled";
80         };
81
82         i2c@7000c400 {
83                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
84                 reg = <0x7000c400 0x100>;
85                 interrupts = <0 84 0x04>;
86                 #address-cells = <1>;
87                 #size-cells = <0>;
88                 clocks = <&tegra_car 54>, <&tegra_car 182>;
89                 clock-names = "div-clk", "fast-clk";
90                 status = "disabled";
91         };
92
93         i2c@7000c500 {
94                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
95                 reg = <0x7000c500 0x100>;
96                 interrupts = <0 92 0x04>;
97                 #address-cells = <1>;
98                 #size-cells = <0>;
99                 clocks = <&tegra_car 67>, <&tegra_car 182>;
100                 clock-names = "div-clk", "fast-clk";
101                 status = "disabled";
102         };
103
104         i2c@7000c700 {
105                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
106                 reg = <0x7000c700 0x100>;
107                 interrupts = <0 120 0x04>;
108                 #address-cells = <1>;
109                 #size-cells = <0>;
110                 clocks = <&tegra_car 103>, <&tegra_car 182>;
111                 clock-names = "div-clk", "fast-clk";
112                 status = "disabled";
113         };
114
115         i2c@7000d000 {
116                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
117                 reg = <0x7000d000 0x100>;
118                 interrupts = <0 53 0x04>;
119                 #address-cells = <1>;
120                 #size-cells = <0>;
121                 clocks = <&tegra_car 47>, <&tegra_car 182>;
122                 clock-names = "div-clk", "fast-clk";
123                 status = "disabled";
124         };
125
126         uarta: serial@70006000 {
127                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
128                 reg = <0x70006000 0x40>;
129                 reg-shift = <2>;
130                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
131                 clocks = <&tegra_car TEGRA30_CLK_UARTA>;
132                 resets = <&tegra_car 6>;
133                 reset-names = "serial";
134                 dmas = <&apbdma 8>, <&apbdma 8>;
135                 dma-names = "rx", "tx";
136                 status = "disabled";
137         };
138
139         uartb: serial@70006040 {
140                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
141                 reg = <0x70006040 0x40>;
142                 reg-shift = <2>;
143                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
144                 clocks = <&tegra_car TEGRA30_CLK_UARTB>;
145                 resets = <&tegra_car 7>;
146                 reset-names = "serial";
147                 dmas = <&apbdma 9>, <&apbdma 9>;
148                 dma-names = "rx", "tx";
149                 status = "disabled";
150         };
151
152         uartc: serial@70006200 {
153                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
154                 reg = <0x70006200 0x100>;
155                 reg-shift = <2>;
156                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
157                 clocks = <&tegra_car TEGRA30_CLK_UARTC>;
158                 resets = <&tegra_car 55>;
159                 reset-names = "serial";
160                 dmas = <&apbdma 10>, <&apbdma 10>;
161                 dma-names = "rx", "tx";
162                 status = "disabled";
163         };
164
165         uartd: serial@70006300 {
166                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
167                 reg = <0x70006300 0x100>;
168                 reg-shift = <2>;
169                 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
170                 clocks = <&tegra_car TEGRA30_CLK_UARTD>;
171                 resets = <&tegra_car 65>;
172                 reset-names = "serial";
173                 dmas = <&apbdma 19>, <&apbdma 19>;
174                 dma-names = "rx", "tx";
175                 status = "disabled";
176         };
177
178         uarte: serial@70006400 {
179                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
180                 reg = <0x70006400 0x100>;
181                 reg-shift = <2>;
182                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
183                 clocks = <&tegra_car TEGRA30_CLK_UARTE>;
184                 resets = <&tegra_car 66>;
185                 reset-names = "serial";
186                 dmas = <&apbdma 20>, <&apbdma 20>;
187                 dma-names = "rx", "tx";
188                 status = "disabled";
189         };
190
191         spi@7000d400 {
192                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
193                 reg = <0x7000d400 0x200>;
194                 interrupts = <0 59 0x04>;
195                 nvidia,dma-request-selector = <&apbdma 15>;
196                 #address-cells = <1>;
197                 #size-cells = <0>;
198                 clocks = <&tegra_car 41>;
199                 status = "disabled";
200         };
201
202         spi@7000d600 {
203                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
204                 reg = <0x7000d600 0x200>;
205                 interrupts = <0 82 0x04>;
206                 nvidia,dma-request-selector = <&apbdma 16>;
207                 #address-cells = <1>;
208                 #size-cells = <0>;
209                 clocks = <&tegra_car 44>;
210                 status = "disabled";
211         };
212
213         spi@7000d800 {
214                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
215                 reg = <0x7000d480 0x200>;
216                 interrupts = <0 83 0x04>;
217                 nvidia,dma-request-selector = <&apbdma 17>;
218                 #address-cells = <1>;
219                 #size-cells = <0>;
220                 clocks = <&tegra_car 46>;
221                 status = "disabled";
222         };
223
224         spi@7000da00 {
225                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
226                 reg = <0x7000da00 0x200>;
227                 interrupts = <0 93 0x04>;
228                 nvidia,dma-request-selector = <&apbdma 18>;
229                 #address-cells = <1>;
230                 #size-cells = <0>;
231                 clocks = <&tegra_car 68>;
232                 status = "disabled";
233         };
234
235         spi@7000dc00 {
236                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
237                 reg = <0x7000dc00 0x200>;
238                 interrupts = <0 94 0x04>;
239                 nvidia,dma-request-selector = <&apbdma 27>;
240                 #address-cells = <1>;
241                 #size-cells = <0>;
242                 clocks = <&tegra_car 104>;
243                 status = "disabled";
244         };
245
246         spi@7000de00 {
247                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
248                 reg = <0x7000de00 0x200>;
249                 interrupts = <0 79 0x04>;
250                 nvidia,dma-request-selector = <&apbdma 28>;
251                 #address-cells = <1>;
252                 #size-cells = <0>;
253                 clocks = <&tegra_car 105>;
254                 status = "disabled";
255         };
256
257         sdhci@78000000 {
258                 compatible = "nvidia,tegra30-sdhci";
259                 reg = <0x78000000 0x200>;
260                 interrupts = <0 14 0x04>;
261                 clocks = <&tegra_car 14>;
262                 status = "disabled";
263         };
264
265         sdhci@78000200 {
266                 compatible = "nvidia,tegra30-sdhci";
267                 reg = <0x78000200 0x200>;
268                 interrupts = <0 15 0x04>;
269                 clocks = <&tegra_car 9>;
270                 status = "disabled";
271         };
272
273         sdhci@78000400 {
274                 compatible = "nvidia,tegra30-sdhci";
275                 reg = <0x78000400 0x200>;
276                 interrupts = <0 19 0x04>;
277                 clocks = <&tegra_car 69>;
278                 status = "disabled";
279         };
280
281         sdhci@78000600 {
282                 compatible = "nvidia,tegra30-sdhci";
283                 reg = <0x78000600 0x200>;
284                 interrupts = <0 31 0x04>;
285                 clocks = <&tegra_car 15>;
286                 status = "disabled";
287         };
288
289         usb@7d000000 {
290                 compatible = "nvidia,tegra30-ehci";
291                 reg = <0x7d000000 0x4000>;
292                 interrupts = <52>;
293                 phy_type = "utmi";
294                 clocks = <&tegra_car 22>;       /* PERIPH_ID_USBD */
295                 status = "disabled";
296         };
297
298         usb@7d004000 {
299                 compatible = "nvidia,tegra30-ehci";
300                 reg = <0x7d004000 0x4000>;
301                 interrupts = <53>;
302                 phy_type = "hsic";
303                 clocks = <&tegra_car 58>;       /* PERIPH_ID_USB2 */
304                 status = "disabled";
305         };
306
307         usb@7d008000 {
308                 compatible = "nvidia,tegra30-ehci";
309                 reg = <0x7d008000 0x4000>;
310                 interrupts = <129>;
311                 phy_type = "utmi";
312                 clocks = <&tegra_car 59>;       /* PERIPH_ID_USB3 */
313                 status = "disabled";
314         };
315 };