git.sur5r.net Git - u-boot/blob - arch/arm/dts/ulcb.dtsi

   1 /*
   2  * Device Tree Source for the R-Car Gen3 ULCB board
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  * Copyright (C) 2016 Cogent Embedded, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14
  15 / {
  16         model = "Renesas R-Car Gen3 ULCB board";
  17
  18         aliases {
  19                 serial0 = &scif2;
  20                 ethernet0 = &avb;
  21         };
  22
  23         chosen {
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         audio_clkout: audio-clkout {
  28                 /*
  29                  * This is same as <&rcar_sound 0>
  30                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  31                  */
  32                 compatible = "fixed-clock";
  33                 #clock-cells = <0>;
  34                 clock-frequency = <11289600>;
  35         };
  36
  37         keyboard {
  38                 compatible = "gpio-keys";
  39
  40                 key-1 {
  41                         linux,code = <KEY_1>;
  42                         label = "SW3";
  43                         wakeup-source;
  44                         debounce-interval = <20>;
  45                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  46                 };
  47         };
  48
  49         leds {
  50                 compatible = "gpio-leds";
  51
  52                 led5 {
  53                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  54                 };
  55                 led6 {
  56                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  57                 };
  58         };
  59
  60         reg_1p8v: regulator0 {
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "fixed-1.8V";
  63                 regulator-min-microvolt = <1800000>;
  64                 regulator-max-microvolt = <1800000>;
  65                 regulator-boot-on;
  66                 regulator-always-on;
  67         };
  68
  69         reg_3p3v: regulator1 {
  70                 compatible = "regulator-fixed";
  71                 regulator-name = "fixed-3.3V";
  72                 regulator-min-microvolt = <3300000>;
  73                 regulator-max-microvolt = <3300000>;
  74                 regulator-boot-on;
  75                 regulator-always-on;
  76         };
  77
  78         rsnd_ak4613: sound {
  79                 compatible = "simple-audio-card";
  80
  81                 simple-audio-card,format = "left_j";
  82                 simple-audio-card,bitclock-master = <&sndcpu>;
  83                 simple-audio-card,frame-master = <&sndcpu>;
  84
  85                 sndcpu: simple-audio-card,cpu {
  86                         sound-dai = <&rcar_sound>;
  87                 };
  88
  89                 sndcodec: simple-audio-card,codec {
  90                         sound-dai = <&ak4613>;
  91                 };
  92         };
  93
  94         vcc_sdhi0: regulator-vcc-sdhi0 {
  95                 compatible = "regulator-fixed";
  96
  97                 regulator-name = "SDHI0 Vcc";
  98                 regulator-min-microvolt = <3300000>;
  99                 regulator-max-microvolt = <3300000>;
 100
 101                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 102                 enable-active-high;
 103         };
 104
 105         vccq_sdhi0: regulator-vccq-sdhi0 {
 106                 compatible = "regulator-gpio";
 107
 108                 regulator-name = "SDHI0 VccQ";
 109                 regulator-min-microvolt = <1800000>;
 110                 regulator-max-microvolt = <3300000>;
 111
 112                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 113                 gpios-states = <1>;
 114                 states = <3300000 1
 115                           1800000 0>;
 116         };
 117
 118         x12_clk: x12 {
 119                 compatible = "fixed-clock";
 120                 #clock-cells = <0>;
 121                 clock-frequency = <24576000>;
 122         };
 123 };
 124
 125 &audio_clk_a {
 126         clock-frequency = <22579200>;
 127 };
 128
 129 &avb {
 130         pinctrl-0 = <&avb_pins>;
 131         pinctrl-names = "default";
 132         renesas,no-ether-link;
 133         phy-handle = <&phy0>;
 134         reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 135         status = "okay";
 136
 137         phy0: ethernet-phy@0 {
 138                 rxc-skew-ps = <1500>;
 139                 reg = <0>;
 140                 interrupt-parent = <&gpio2>;
 141                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 142         };
 143 };
 144
 145 &ehci1 {
 146         status = "okay";
 147 };
 148
 149 &extal_clk {
 150         clock-frequency = <16666666>;
 151 };
 152
 153 &extalr_clk {
 154         clock-frequency = <32768>;
 155 };
 156
 157 &i2c2 {
 158         pinctrl-0 = <&i2c2_pins>;
 159         pinctrl-names = "default";
 160
 161         status = "okay";
 162
 163         clock-frequency = <100000>;
 164
 165         ak4613: codec@10 {
 166                 compatible = "asahi-kasei,ak4613";
 167                 #sound-dai-cells = <0>;
 168                 reg = <0x10>;
 169                 clocks = <&rcar_sound 3>;
 170
 171                 asahi-kasei,in1-single-end;
 172                 asahi-kasei,in2-single-end;
 173                 asahi-kasei,out1-single-end;
 174                 asahi-kasei,out2-single-end;
 175                 asahi-kasei,out3-single-end;
 176                 asahi-kasei,out4-single-end;
 177                 asahi-kasei,out5-single-end;
 178                 asahi-kasei,out6-single-end;
 179         };
 180
 181         cs2000: clk-multiplier@4f {
 182                 #clock-cells = <0>;
 183                 compatible = "cirrus,cs2000-cp";
 184                 reg = <0x4f>;
 185                 clocks = <&audio_clkout>, <&x12_clk>;
 186                 clock-names = "clk_in", "ref_clk";
 187
 188                 assigned-clocks = <&cs2000>;
 189                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 190         };
 191 };
 192
 193 &ohci1 {
 194         status = "okay";
 195 };
 196
 197 &pfc {
 198         pinctrl-0 = <&scif_clk_pins>;
 199         pinctrl-names = "default";
 200
 201         avb_pins: avb {
 202                 mux {
 203                         groups = "avb_link", "avb_phy_int", "avb_mdc",
 204                                  "avb_mii";
 205                         function = "avb";
 206                 };
 207
 208                 pins_mdc {
 209                         groups = "avb_mdc";
 210                         drive-strength = <24>;
 211                 };
 212
 213                 pins_mii_tx {
 214                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 215                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 216                         drive-strength = <12>;
 217                 };
 218         };
 219
 220         i2c2_pins: i2c2 {
 221                 groups = "i2c2_a";
 222                 function = "i2c2";
 223         };
 224
 225         scif2_pins: scif2 {
 226                 groups = "scif2_data_a";
 227                 function = "scif2";
 228         };
 229
 230         scif_clk_pins: scif_clk {
 231                 groups = "scif_clk_a";
 232                 function = "scif_clk";
 233         };
 234
 235         sdhi0_pins: sd0 {
 236                 groups = "sdhi0_data4", "sdhi0_ctrl";
 237                 function = "sdhi0";
 238                 power-source = <3300>;
 239         };
 240
 241         sdhi0_pins_uhs: sd0_uhs {
 242                 groups = "sdhi0_data4", "sdhi0_ctrl";
 243                 function = "sdhi0";
 244                 power-source = <1800>;
 245         };
 246
 247         sdhi2_pins: sd2 {
 248                 groups = "sdhi2_data8", "sdhi2_ctrl";
 249                 function = "sdhi2";
 250                 power-source = <3300>;
 251         };
 252
 253         sdhi2_pins_uhs: sd2_uhs {
 254                 groups = "sdhi2_data8", "sdhi2_ctrl";
 255                 function = "sdhi2";
 256                 power-source = <1800>;
 257         };
 258
 259         sound_pins: sound {
 260                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 261                 function = "ssi";
 262         };
 263
 264         sound_clk_pins: sound-clk {
 265                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 266                          "audio_clkout_a", "audio_clkout3_a";
 267                 function = "audio_clk";
 268         };
 269
 270         usb1_pins: usb1 {
 271                 groups = "usb1";
 272                 function = "usb1";
 273         };
 274 };
 275
 276 &rcar_sound {
 277         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 278         pinctrl-names = "default";
 279
 280         /* Single DAI */
 281         #sound-dai-cells = <0>;
 282
 283         /* audio_clkout0/1/2/3 */
 284         #clock-cells = <1>;
 285         clock-frequency = <12288000 11289600>;
 286
 287         status = "okay";
 288
 289         /* update <audio_clk_b> to <cs2000> */
 290         clocks = <&cpg CPG_MOD 1005>,
 291                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 292                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 293                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 294                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 295                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 296                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 297                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 298                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 299                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 300                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 301                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 302                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 303                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 304                  <&audio_clk_a>, <&cs2000>,
 305                  <&audio_clk_c>,
 306                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 307
 308         rcar_sound,dai {
 309                 dai0 {
 310                         playback = <&ssi0 &src0 &dvc0>;
 311                         capture  = <&ssi1 &src1 &dvc1>;
 312                 };
 313         };
 314 };
 315
 316 &scif2 {
 317         pinctrl-0 = <&scif2_pins>;
 318         pinctrl-names = "default";
 319
 320         status = "okay";
 321 };
 322
 323 &scif_clk {
 324         clock-frequency = <14745600>;
 325 };
 326
 327 &sdhi0 {
 328         pinctrl-0 = <&sdhi0_pins>;
 329         pinctrl-1 = <&sdhi0_pins_uhs>;
 330         pinctrl-names = "default", "state_uhs";
 331
 332         vmmc-supply = <&vcc_sdhi0>;
 333         vqmmc-supply = <&vccq_sdhi0>;
 334         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 335         bus-width = <4>;
 336         sd-uhs-sdr50;
 337         status = "okay";
 338 };
 339
 340 &sdhi2 {
 341         /* used for on-board 8bit eMMC */
 342         pinctrl-0 = <&sdhi2_pins>;
 343         pinctrl-1 = <&sdhi2_pins_uhs>;
 344         pinctrl-names = "default", "state_uhs";
 345
 346         vmmc-supply = <&reg_3p3v>;
 347         vqmmc-supply = <&reg_1p8v>;
 348         bus-width = <8>;
 349         mmc-hs200-1_8v;
 350         non-removable;
 351         status = "okay";
 352 };
 353
 354 &ssi1 {
 355         shared-pin;
 356 };
 357
 358 &usb2_phy1 {
 359         pinctrl-0 = <&usb1_pins>;
 360         pinctrl-names = "default";
 361
 362         status = "okay";
 363 };
 364
 365 &wdt0 {
 366         timeout-sec = <60>;
 367         status = "okay";
 368 };