2 * Device Tree Source for the R-Car Gen3 ULCB board
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
16 model = "Renesas R-Car Gen3 ULCB board";
24 stdout-path = "serial0:115200n8";
27 audio_clkout: audio-clkout {
29 * This is same as <&rcar_sound 0>
30 * but needed to avoid cs2000/rcar_sound probe dead-lock
32 compatible = "fixed-clock";
34 clock-frequency = <11289600>;
38 compatible = "gpio-keys";
44 debounce-interval = <20>;
45 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
50 compatible = "gpio-leds";
53 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
56 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
60 reg_1p8v: regulator0 {
61 compatible = "regulator-fixed";
62 regulator-name = "fixed-1.8V";
63 regulator-min-microvolt = <1800000>;
64 regulator-max-microvolt = <1800000>;
69 reg_3p3v: regulator1 {
70 compatible = "regulator-fixed";
71 regulator-name = "fixed-3.3V";
72 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <3300000>;
79 compatible = "simple-audio-card";
81 simple-audio-card,format = "left_j";
82 simple-audio-card,bitclock-master = <&sndcpu>;
83 simple-audio-card,frame-master = <&sndcpu>;
85 sndcpu: simple-audio-card,cpu {
86 sound-dai = <&rcar_sound>;
89 sndcodec: simple-audio-card,codec {
90 sound-dai = <&ak4613>;
94 vcc_sdhi0: regulator-vcc-sdhi0 {
95 compatible = "regulator-fixed";
97 regulator-name = "SDHI0 Vcc";
98 regulator-min-microvolt = <3300000>;
99 regulator-max-microvolt = <3300000>;
101 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
105 vccq_sdhi0: regulator-vccq-sdhi0 {
106 compatible = "regulator-gpio";
108 regulator-name = "SDHI0 VccQ";
109 regulator-min-microvolt = <1800000>;
110 regulator-max-microvolt = <3300000>;
112 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
119 compatible = "fixed-clock";
121 clock-frequency = <24576000>;
126 clock-frequency = <22579200>;
130 pinctrl-0 = <&avb_pins>;
131 pinctrl-names = "default";
132 renesas,no-ether-link;
133 phy-handle = <&phy0>;
134 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
137 phy0: ethernet-phy@0 {
138 rxc-skew-ps = <1500>;
140 interrupt-parent = <&gpio2>;
141 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
150 clock-frequency = <16666666>;
154 clock-frequency = <32768>;
158 pinctrl-0 = <&i2c2_pins>;
159 pinctrl-names = "default";
163 clock-frequency = <100000>;
166 compatible = "asahi-kasei,ak4613";
167 #sound-dai-cells = <0>;
169 clocks = <&rcar_sound 3>;
171 asahi-kasei,in1-single-end;
172 asahi-kasei,in2-single-end;
173 asahi-kasei,out1-single-end;
174 asahi-kasei,out2-single-end;
175 asahi-kasei,out3-single-end;
176 asahi-kasei,out4-single-end;
177 asahi-kasei,out5-single-end;
178 asahi-kasei,out6-single-end;
181 cs2000: clk-multiplier@4f {
183 compatible = "cirrus,cs2000-cp";
185 clocks = <&audio_clkout>, <&x12_clk>;
186 clock-names = "clk_in", "ref_clk";
188 assigned-clocks = <&cs2000>;
189 assigned-clock-rates = <24576000>; /* 1/1 divide */
202 pinctrl-0 = <&scif_clk_pins>;
203 pinctrl-names = "default";
207 groups = "avb_link", "avb_phy_int", "avb_mdc",
214 drive-strength = <24>;
218 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
219 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
220 drive-strength = <12>;
230 groups = "scif2_data_a";
234 scif_clk_pins: scif_clk {
235 groups = "scif_clk_a";
236 function = "scif_clk";
240 groups = "sdhi0_data4", "sdhi0_ctrl";
242 power-source = <3300>;
245 sdhi0_pins_uhs: sd0_uhs {
246 groups = "sdhi0_data4", "sdhi0_ctrl";
248 power-source = <1800>;
252 groups = "sdhi2_data8", "sdhi2_ctrl";
254 power-source = <1800>;
257 sdhi2_pins_uhs: sd2_uhs {
258 groups = "sdhi2_data8", "sdhi2_ctrl";
260 power-source = <1800>;
264 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
268 sound_clk_pins: sound-clk {
269 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
270 "audio_clkout_a", "audio_clkout3_a";
271 function = "audio_clk";
281 pinctrl-0 = <&sound_pins &sound_clk_pins>;
282 pinctrl-names = "default";
285 #sound-dai-cells = <0>;
287 /* audio_clkout0/1/2/3 */
289 clock-frequency = <12288000 11289600>;
293 /* update <audio_clk_b> to <cs2000> */
294 clocks = <&cpg CPG_MOD 1005>,
295 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
296 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
297 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
298 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
299 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
300 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
301 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
302 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
303 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
304 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
305 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
306 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
307 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
308 <&audio_clk_a>, <&cs2000>,
310 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
314 playback = <&ssi0 &src0 &dvc0>;
315 capture = <&ssi1 &src1 &dvc1>;
321 pinctrl-0 = <&scif2_pins>;
322 pinctrl-names = "default";
328 clock-frequency = <14745600>;
332 pinctrl-0 = <&sdhi0_pins>;
333 pinctrl-1 = <&sdhi0_pins_uhs>;
334 pinctrl-names = "default", "state_uhs";
336 vmmc-supply = <&vcc_sdhi0>;
337 vqmmc-supply = <&vccq_sdhi0>;
338 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
345 /* used for on-board 8bit eMMC */
346 pinctrl-0 = <&sdhi2_pins>;
347 pinctrl-1 = <&sdhi2_pins_uhs>;
348 pinctrl-names = "default", "state_uhs";
350 vmmc-supply = <®_3p3v>;
351 vqmmc-supply = <®_1p8v>;
363 pinctrl-0 = <&usb1_pins>;
364 pinctrl-names = "default";