2 * Device Tree Source commonly used by UniPhier ARM SoCs
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+ X11
9 /include/ "skeleton.dtsi"
15 compatible = "fixed-clock";
20 compatible = "simple-bus";
24 interrupt-parent = <&intc>;
27 serial0: serial@54006800 {
28 compatible = "socionext,uniphier-uart";
30 reg = <0x54006800 0x40>;
31 interrupts = <0 33 4>;
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_uart0>;
34 clocks = <&peri_clk 0>;
37 serial1: serial@54006900 {
38 compatible = "socionext,uniphier-uart";
40 reg = <0x54006900 0x40>;
41 interrupts = <0 35 4>;
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_uart1>;
44 clocks = <&peri_clk 1>;
47 serial2: serial@54006a00 {
48 compatible = "socionext,uniphier-uart";
50 reg = <0x54006a00 0x40>;
51 interrupts = <0 37 4>;
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_uart2>;
54 clocks = <&peri_clk 2>;
57 serial3: serial@54006b00 {
58 compatible = "socionext,uniphier-uart";
60 reg = <0x54006b00 0x40>;
61 interrupts = <0 177 4>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_uart3>;
64 clocks = <&peri_clk 3>;
67 system_bus: system-bus@58c00000 {
68 compatible = "socionext,uniphier-system-bus";
70 reg = <0x58c00000 0x400>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_system_bus>;
78 compatible = "socionext,uniphier-smpctrl";
79 reg = <0x59801000 0x400>;
83 compatible = "socionext,uniphier-mioctrl",
84 "simple-mfd", "syscon";
85 reg = <0x59810000 0x800>;
98 compatible = "socionext,uniphier-perictrl",
99 "simple-mfd", "syscon";
100 reg = <0x59820000 0x200>;
112 compatible = "arm,cortex-a9-global-timer";
113 reg = <0x60000200 0x20>;
114 interrupts = <1 11 0x104>;
115 clocks = <&arm_timer_clk>;
119 compatible = "arm,cortex-a9-twd-timer";
120 reg = <0x60000600 0x20>;
121 interrupts = <1 13 0x104>;
122 clocks = <&arm_timer_clk>;
125 intc: interrupt-controller@60001000 {
126 compatible = "arm,cortex-a9-gic";
127 reg = <0x60001000 0x1000>,
129 #interrupt-cells = <3>;
130 interrupt-controller;
134 compatible = "socionext,uniphier-soc-glue",
135 "simple-mfd", "syscon";
136 reg = <0x5f800000 0x2000>;
140 /* specify compatible in each SoC DTSI */
146 compatible = "socionext,uniphier-sysctrl",
147 "simple-mfd", "syscon";
148 reg = <0x61840000 0x4000>;
159 nand: nand@68000000 {
160 compatible = "denali,denali-nand-dt";
162 reg-names = "nand_data", "denali_reg";
163 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
164 interrupts = <0 65 4>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_nand>;
171 /include/ "uniphier-pinctrl.dtsi"