2 * Device Tree Source for UniPhier PH1-LD11 SoC
4 * Copyright (C) 2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
7 * SPDX-License-Identifier: GPL-2.0+ X11
10 /memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */
13 compatible = "socionext,ph1-ld11";
16 interrupt-parent = <&gic>;
35 compatible = "arm,cortex-a53", "arm,armv8";
37 enable-method = "spin-table";
38 cpu-release-addr = <0 0x80000000>;
43 compatible = "arm,cortex-a53", "arm,armv8";
45 enable-method = "spin-table";
46 cpu-release-addr = <0 0x80000000>;
52 compatible = "fixed-clock";
54 clock-frequency = <25000000>;
59 compatible = "fixed-clock";
60 clock-frequency = <50000000>;
65 compatible = "arm,armv8-timer";
66 interrupts = <1 13 4>,
73 compatible = "simple-bus";
76 ranges = <0 0 0 0xffffffff>;
79 serial0: serial@54006800 {
80 compatible = "socionext,uniphier-uart";
82 reg = <0x54006800 0x40>;
83 interrupts = <0 33 4>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_uart0>;
86 clocks = <&peri_clk 0>;
87 clock-frequency = <58820000>;
90 serial1: serial@54006900 {
91 compatible = "socionext,uniphier-uart";
93 reg = <0x54006900 0x40>;
94 interrupts = <0 35 4>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_uart1>;
97 clocks = <&peri_clk 1>;
98 clock-frequency = <58820000>;
101 serial2: serial@54006a00 {
102 compatible = "socionext,uniphier-uart";
104 reg = <0x54006a00 0x40>;
105 interrupts = <0 37 4>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&pinctrl_uart2>;
108 clocks = <&peri_clk 2>;
109 clock-frequency = <58820000>;
112 serial3: serial@54006b00 {
113 compatible = "socionext,uniphier-uart";
115 reg = <0x54006b00 0x40>;
116 interrupts = <0 177 4>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_uart3>;
119 clocks = <&peri_clk 3>;
120 clock-frequency = <58820000>;
124 compatible = "socionext,uniphier-fi2c";
126 reg = <0x58780000 0x80>;
127 #address-cells = <1>;
129 interrupts = <0 41 4>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_i2c0>;
133 clock-frequency = <100000>;
137 compatible = "socionext,uniphier-fi2c";
139 reg = <0x58781000 0x80>;
140 #address-cells = <1>;
142 interrupts = <0 42 4>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_i2c1>;
146 clock-frequency = <100000>;
150 compatible = "socionext,uniphier-fi2c";
151 reg = <0x58782000 0x80>;
152 #address-cells = <1>;
154 interrupts = <0 43 4>;
156 clock-frequency = <400000>;
160 compatible = "socionext,uniphier-fi2c";
162 reg = <0x58783000 0x80>;
163 #address-cells = <1>;
165 interrupts = <0 44 4>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_i2c3>;
169 clock-frequency = <100000>;
173 compatible = "socionext,uniphier-fi2c";
175 reg = <0x58784000 0x80>;
176 #address-cells = <1>;
178 interrupts = <0 45 4>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_i2c4>;
182 clock-frequency = <100000>;
186 compatible = "socionext,uniphier-fi2c";
187 reg = <0x58785000 0x80>;
188 #address-cells = <1>;
190 interrupts = <0 25 4>;
192 clock-frequency = <400000>;
195 system_bus: system-bus@58c00000 {
196 compatible = "socionext,uniphier-system-bus";
198 reg = <0x58c00000 0x400>;
199 #address-cells = <2>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_system_bus>;
206 compatible = "socionext,uniphier-smpctrl";
207 reg = <0x59801000 0x400>;
211 compatible = "socionext,uniphier-perictrl",
212 "simple-mfd", "syscon";
213 reg = <0x59820000 0x200>;
216 compatible = "socionext,uniphier-ld11-peri-clock";
221 compatible = "socionext,uniphier-ld11-peri-reset";
227 compatible = "socionext,uniphier-ehci", "generic-ehci";
229 reg = <0x5a800100 0x100>;
230 interrupts = <0 243 4>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_usb0>;
233 clocks = <&mio_clk 3>, <&mio_clk 6>;
237 compatible = "socionext,uniphier-ehci", "generic-ehci";
239 reg = <0x5a810100 0x100>;
240 interrupts = <0 244 4>;
241 pinctrl-names = "default";
242 pinctrl-0 = <&pinctrl_usb1>;
243 clocks = <&mio_clk 4>, <&mio_clk 6>;
247 compatible = "socionext,uniphier-ehci", "generic-ehci";
249 reg = <0x5a820100 0x100>;
250 interrupts = <0 245 4>;
251 pinctrl-names = "default";
252 pinctrl-0 = <&pinctrl_usb2>;
253 clocks = <&mio_clk 5>, <&mio_clk 6>;
257 compatible = "socionext,uniphier-mioctrl",
258 "simple-mfd", "syscon";
259 reg = <0x5b3e0000 0x800>;
262 compatible = "socionext,uniphier-ld11-mio-clock";
267 compatible = "socionext,uniphier-ld11-mio-reset";
269 resets = <&sys_rst 7>;
274 compatible = "socionext,uniphier-soc-glue",
275 "simple-mfd", "syscon";
276 reg = <0x5f800000 0x2000>;
280 compatible = "socionext,uniphier-ld11-pinctrl";
286 compatible = "simple-mfd", "syscon";
287 reg = <0x5fc20000 0x200>;
290 gic: interrupt-controller@5fe00000 {
291 compatible = "arm,gic-v3";
292 reg = <0x5fe00000 0x10000>, /* GICD */
293 <0x5fe40000 0x80000>; /* GICR */
294 interrupt-controller;
295 #interrupt-cells = <3>;
296 interrupts = <1 9 4>;
300 compatible = "socionext,uniphier-ld11-sysctrl",
301 "simple-mfd", "syscon";
302 reg = <0x61840000 0x4000>;
305 compatible = "socionext,uniphier-ld11-clock";
310 compatible = "socionext,uniphier-ld11-reset";
317 /include/ "uniphier-pinctrl.dtsi"