2 * Device Tree Source for UniPhier PH1-Pro4 SoC
4 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+ X11
9 /include/ "skeleton.dtsi"
12 compatible = "socionext,ph1-pro4";
17 enable-method = "socionext,uniphier-smp";
21 compatible = "arm,cortex-a9";
27 compatible = "arm,cortex-a9";
33 arm_timer_clk: arm_timer_clk {
35 compatible = "fixed-clock";
36 clock-frequency = <50000000>;
41 compatible = "fixed-clock";
42 clock-frequency = <73728000>;
47 compatible = "fixed-clock";
48 clock-frequency = <50000000>;
53 compatible = "simple-bus";
57 interrupt-parent = <&intc>;
60 compatible = "simple-bus";
65 serial0: serial@54006800 {
66 compatible = "socionext,uniphier-uart";
68 reg = <0x54006800 0x40>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_uart0>;
71 interrupts = <0 33 4>;
73 clock-frequency = <73728000>;
76 serial1: serial@54006900 {
77 compatible = "socionext,uniphier-uart";
79 reg = <0x54006900 0x40>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_uart1>;
82 interrupts = <0 35 4>;
84 clock-frequency = <73728000>;
87 serial2: serial@54006a00 {
88 compatible = "socionext,uniphier-uart";
90 reg = <0x54006a00 0x40>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_uart2>;
93 interrupts = <0 37 4>;
95 clock-frequency = <73728000>;
98 serial3: serial@54006b00 {
99 compatible = "socionext,uniphier-uart";
101 reg = <0x54006b00 0x40>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_uart3>;
104 interrupts = <0 29 4>;
105 clocks = <&uart_clk>;
106 clock-frequency = <73728000>;
110 compatible = "socionext,uniphier-fi2c";
112 reg = <0x58780000 0x80>;
113 #address-cells = <1>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_i2c0>;
117 interrupts = <0 41 4>;
119 clock-frequency = <100000>;
123 compatible = "socionext,uniphier-fi2c";
125 reg = <0x58781000 0x80>;
126 #address-cells = <1>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_i2c1>;
130 interrupts = <0 42 4>;
132 clock-frequency = <100000>;
136 compatible = "socionext,uniphier-fi2c";
138 reg = <0x58782000 0x80>;
139 #address-cells = <1>;
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_i2c2>;
143 interrupts = <0 43 4>;
145 clock-frequency = <100000>;
149 compatible = "socionext,uniphier-fi2c";
151 reg = <0x58783000 0x80>;
152 #address-cells = <1>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_i2c3>;
156 interrupts = <0 44 4>;
158 clock-frequency = <100000>;
161 /* i2c4 does not exist */
163 /* chip-internal connection for DMD */
165 compatible = "socionext,uniphier-fi2c";
166 reg = <0x58785000 0x80>;
167 #address-cells = <1>;
169 interrupts = <0 25 4>;
171 clock-frequency = <400000>;
174 /* chip-internal connection for HDMI */
176 compatible = "socionext,uniphier-fi2c";
177 reg = <0x58786000 0x80>;
178 #address-cells = <1>;
180 interrupts = <0 26 4>;
182 clock-frequency = <400000>;
185 system-bus-controller-misc@59800000 {
186 compatible = "socionext,uniphier-system-bus-controller-misc",
188 reg = <0x59800000 0x2000>;
192 compatible = "socionext,uniphier-ehci", "generic-ehci";
194 reg = <0x5a800100 0x100>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_usb2>;
197 interrupts = <0 80 4>;
201 compatible = "socionext,uniphier-ehci", "generic-ehci";
203 reg = <0x5a810100 0x100>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_usb3>;
206 interrupts = <0 81 4>;
210 compatible = "socionext,uniphier-xhci", "generic-xhci";
212 reg = <0x65a00000 0x100>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_usb0>;
215 interrupts = <0 134 4>;
219 compatible = "socionext,uniphier-xhci", "generic-xhci";
221 reg = <0x65c00000 0x100>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_usb1>;
224 interrupts = <0 135 4>;
227 pinctrl: pinctrl@5f801000 {
228 compatible = "socionext,ph1-pro4-pinctrl",
230 reg = <0x5f801000 0xe00>;
234 compatible = "arm,cortex-a9-global-timer";
235 reg = <0x60000200 0x20>;
236 interrupts = <1 11 0x304>;
237 clocks = <&arm_timer_clk>;
241 compatible = "arm,cortex-a9-twd-timer";
242 reg = <0x60000600 0x20>;
243 interrupts = <1 13 0x304>;
244 clocks = <&arm_timer_clk>;
247 intc: interrupt-controller@60001000 {
248 compatible = "arm,cortex-a9-gic";
249 #interrupt-cells = <3>;
250 interrupt-controller;
251 reg = <0x60001000 0x1000>,
255 nand: nand@68000000 {
256 compatible = "denali,denali-nand-dt";
257 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
258 reg-names = "nand_data", "denali_reg";
263 /include/ "uniphier-pinctrl.dtsi"