2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+ or X11
6 /include/ "skeleton.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
31 compatible = "simple-bus";
34 aips0: aips-bus@40000000 {
35 compatible = "fsl,aips-bus", "simple-bus";
40 uart0: serial@40027000 {
41 compatible = "fsl,vf610-lpuart";
42 reg = <0x40027000 0x1000>;
46 uart1: serial@40028000 {
47 compatible = "fsl,vf610-lpuart";
48 reg = <0x40028000 0x1000>;
52 uart2: serial@40029000 {
53 compatible = "fsl,vf610-lpuart";
54 reg = <0x40029000 0x1000>;
58 uart3: serial@4002a000 {
59 compatible = "fsl,vf610-lpuart";
60 reg = <0x4002a000 0x1000>;
64 dspi0: dspi0@4002c000 {
67 compatible = "fsl,vf610-dspi";
68 reg = <0x4002c000 0x1000>;
73 dspi1: dspi1@4002d000 {
76 compatible = "fsl,vf610-dspi";
77 reg = <0x4002d000 0x1000>;
82 qspi0: quadspi@40044000 {
85 compatible = "fsl,vf610-qspi";
86 reg = <0x40044000 0x1000>,
87 <0x20000000 0x10000000>;
88 reg-names = "QuadSPI", "QuadSPI-memory";
92 gpio0: gpio@40049000 {
93 compatible = "fsl,vf610-gpio";
94 reg = <0x400ff000 0x40>;
98 gpio1: gpio@4004a000 {
99 compatible = "fsl,vf610-gpio";
100 reg = <0x400ff040 0x40>;
104 gpio2: gpio@4004b000 {
105 compatible = "fsl,vf610-gpio";
106 reg = <0x400ff080 0x40>;
110 gpio3: gpio@4004c000 {
111 compatible = "fsl,vf610-gpio";
112 reg = <0x400ff0c0 0x40>;
116 gpio4: gpio@4004d000 {
117 compatible = "fsl,vf610-gpio";
118 reg = <0x400ff100 0x40>;
122 ehci0: ehci@40034000 {
123 compatible = "fsl,vf610-usb";
124 reg = <0x40034000 0x800>;
129 aips1: aips-bus@40080000 {
130 compatible = "fsl,aips-bus", "simple-bus";
131 #address-cells = <1>;
135 uart4: serial@400a9000 {
136 compatible = "fsl,vf610-lpuart";
137 reg = <0x400a9000 0x1000>;
141 uart5: serial@400aa000 {
142 compatible = "fsl,vf610-lpuart";
143 reg = <0x400aa000 0x1000>;
147 ehci1: ehci@400b4000 {
148 compatible = "fsl,vf610-usb";
149 reg = <0x400b4000 0x800>;