2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+ or X11
6 /include/ "skeleton.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
31 compatible = "simple-bus";
34 aips0: aips-bus@40000000 {
35 compatible = "fsl,aips-bus", "simple-bus";
38 reg = <0x40000000 0x00070000>;
41 uart0: serial@40027000 {
42 compatible = "fsl,vf610-lpuart";
43 reg = <0x40027000 0x1000>;
47 uart1: serial@40028000 {
48 compatible = "fsl,vf610-lpuart";
49 reg = <0x40028000 0x1000>;
53 uart2: serial@40029000 {
54 compatible = "fsl,vf610-lpuart";
55 reg = <0x40029000 0x1000>;
59 uart3: serial@4002a000 {
60 compatible = "fsl,vf610-lpuart";
61 reg = <0x4002a000 0x1000>;
65 dspi0: dspi0@4002c000 {
68 compatible = "fsl,vf610-dspi";
69 reg = <0x4002c000 0x1000>;
74 dspi1: dspi1@4002d000 {
77 compatible = "fsl,vf610-dspi";
78 reg = <0x4002d000 0x1000>;
83 qspi0: quadspi@40044000 {
86 compatible = "fsl,vf610-qspi";
87 reg = <0x40044000 0x1000>,
88 <0x20000000 0x10000000>;
89 reg-names = "QuadSPI", "QuadSPI-memory";
93 gpio0: gpio@40049000 {
94 compatible = "fsl,vf610-gpio";
95 reg = <0x400ff000 0x40>;
99 gpio1: gpio@4004a000 {
100 compatible = "fsl,vf610-gpio";
101 reg = <0x400ff040 0x40>;
105 gpio2: gpio@4004b000 {
106 compatible = "fsl,vf610-gpio";
107 reg = <0x400ff080 0x40>;
111 gpio3: gpio@4004c000 {
112 compatible = "fsl,vf610-gpio";
113 reg = <0x400ff0c0 0x40>;
117 gpio4: gpio@4004d000 {
118 compatible = "fsl,vf610-gpio";
119 reg = <0x400ff100 0x40>;
123 ehci0: ehci@40034000 {
124 compatible = "fsl,vf610-usb";
125 reg = <0x40034000 0x800>;
130 aips1: aips-bus@40080000 {
131 compatible = "fsl,aips-bus", "simple-bus";
132 #address-cells = <1>;
134 reg = <0x40080000 0x0007f000>;
137 uart4: serial@400a9000 {
138 compatible = "fsl,vf610-lpuart";
139 reg = <0x400a9000 0x1000>;
143 uart5: serial@400aa000 {
144 compatible = "fsl,vf610-lpuart";
145 reg = <0x400aa000 0x1000>;
149 ehci1: ehci@400b4000 {
150 compatible = "fsl,vf610-usb";
151 reg = <0x400b4000 0x800>;