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[u-boot] / arch / arm / dts / zynq-zc702.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  Copyright (C) 2011 - 2015 Xilinx
4  *  Copyright (C) 2012 National Instruments Corp.
5  */
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8
9 / {
10         model = "Zynq ZC702 Development Board";
11         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
12
13         aliases {
14                 ethernet0 = &gem0;
15                 i2c0 = &i2c0;
16                 serial0 = &uart1;
17                 spi0 = &qspi;
18                 mmc0 = &sdhci0;
19         };
20
21         memory@0 {
22                 device_type = "memory";
23                 reg = <0x0 0x40000000>;
24         };
25
26         chosen {
27                 bootargs = "";
28                 stdout-path = "serial0:115200n8";
29         };
30
31         gpio-keys {
32                 compatible = "gpio-keys";
33                 #address-cells = <1>;
34                 #size-cells = <0>;
35                 autorepeat;
36                 sw14 {
37                         label = "sw14";
38                         gpios = <&gpio0 12 0>;
39                         linux,code = <108>; /* down */
40                         wakeup-source;
41                         autorepeat;
42                 };
43                 sw13 {
44                         label = "sw13";
45                         gpios = <&gpio0 14 0>;
46                         linux,code = <103>; /* up */
47                         wakeup-source;
48                         autorepeat;
49                 };
50         };
51
52         leds {
53                 compatible = "gpio-leds";
54
55                 ds23 {
56                         label = "ds23";
57                         gpios = <&gpio0 10 0>;
58                         linux,default-trigger = "heartbeat";
59                 };
60         };
61
62         usb_phy0: phy0 {
63                 compatible = "usb-nop-xceiv";
64                 #phy-cells = <0>;
65         };
66 };
67
68 &amba {
69         ocm: sram@fffc0000 {
70                 compatible = "mmio-sram";
71                 reg = <0xfffc0000 0x10000>;
72         };
73 };
74
75 &can0 {
76         status = "okay";
77         pinctrl-names = "default";
78         pinctrl-0 = <&pinctrl_can0_default>;
79 };
80
81 &clkc {
82         ps-clk-frequency = <33333333>;
83 };
84
85 &gem0 {
86         status = "okay";
87         phy-mode = "rgmii-id";
88         phy-handle = <&ethernet_phy>;
89         pinctrl-names = "default";
90         pinctrl-0 = <&pinctrl_gem0_default>;
91         phy-reset-gpio = <&gpio0 11 0>;
92         phy-reset-active-low;
93
94         ethernet_phy: ethernet-phy@7 {
95                 reg = <7>;
96                 device_type = "ethernet-phy";
97         };
98 };
99
100 &gpio0 {
101         pinctrl-names = "default";
102         pinctrl-0 = <&pinctrl_gpio0_default>;
103 };
104
105 &i2c0 {
106         status = "okay";
107         clock-frequency = <400000>;
108         pinctrl-names = "default", "gpio";
109         pinctrl-0 = <&pinctrl_i2c0_default>;
110         pinctrl-1 = <&pinctrl_i2c0_gpio>;
111         scl-gpios = <&gpio0 50 0>;
112         sda-gpios = <&gpio0 51 0>;
113
114         i2c-mux@74 {
115                 compatible = "nxp,pca9548";
116                 #address-cells = <1>;
117                 #size-cells = <0>;
118                 reg = <0x74>;
119
120                 i2c@0 {
121                         #address-cells = <1>;
122                         #size-cells = <0>;
123                         reg = <0>;
124                         si570: clock-generator@5d {
125                                 #clock-cells = <0>;
126                                 compatible = "silabs,si570";
127                                 temperature-stability = <50>;
128                                 reg = <0x5d>;
129                                 factory-fout = <156250000>;
130                                 clock-frequency = <148500000>;
131                         };
132                 };
133
134                 i2c@1 {
135                         #address-cells = <1>;
136                         #size-cells = <0>;
137                         reg = <1>;
138                         adv7511: hdmi-tx@39 {
139                                 compatible = "adi,adv7511";
140                                 reg = <0x39>;
141                                 adi,input-depth = <8>;
142                                 adi,input-colorspace = "yuv422";
143                                 adi,input-clock = "1x";
144                                 adi,input-style = <3>;
145                                 adi,input-justification = "right";
146                         };
147                 };
148
149                 i2c@2 {
150                         #address-cells = <1>;
151                         #size-cells = <0>;
152                         reg = <2>;
153                         eeprom@54 {
154                                 compatible = "atmel,24c08";
155                                 reg = <0x54>;
156                         };
157                 };
158
159                 i2c@3 {
160                         #address-cells = <1>;
161                         #size-cells = <0>;
162                         reg = <3>;
163                         gpio@21 {
164                                 compatible = "ti,tca6416";
165                                 reg = <0x21>;
166                                 gpio-controller;
167                                 #gpio-cells = <2>;
168                         };
169                 };
170
171                 i2c@4 {
172                         #address-cells = <1>;
173                         #size-cells = <0>;
174                         reg = <4>;
175                         rtc@51 {
176                                 compatible = "nxp,pcf8563";
177                                 reg = <0x51>;
178                         };
179                 };
180
181                 i2c@7 {
182                         #address-cells = <1>;
183                         #size-cells = <0>;
184                         reg = <7>;
185                         hwmon@52 {
186                                 compatible = "ti,ucd9248";
187                                 reg = <52>;
188                         };
189                         hwmon@53 {
190                                 compatible = "ti,ucd9248";
191                                 reg = <53>;
192                         };
193                         hwmon@54 {
194                                 compatible = "ti,ucd9248";
195                                 reg = <54>;
196                         };
197                 };
198         };
199 };
200
201 &pinctrl0 {
202         pinctrl_can0_default: can0-default {
203                 mux {
204                         function = "can0";
205                         groups = "can0_9_grp";
206                 };
207
208                 conf {
209                         groups = "can0_9_grp";
210                         slew-rate = <0>;
211                         io-standard = <1>;
212                 };
213
214                 conf-rx {
215                         pins = "MIO46";
216                         bias-high-impedance;
217                 };
218
219                 conf-tx {
220                         pins = "MIO47";
221                         bias-disable;
222                 };
223         };
224
225         pinctrl_gem0_default: gem0-default {
226                 mux {
227                         function = "ethernet0";
228                         groups = "ethernet0_0_grp";
229                 };
230
231                 conf {
232                         groups = "ethernet0_0_grp";
233                         slew-rate = <0>;
234                         io-standard = <4>;
235                 };
236
237                 conf-rx {
238                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
239                         bias-high-impedance;
240                         low-power-disable;
241                 };
242
243                 conf-tx {
244                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
245                         bias-disable;
246                         low-power-enable;
247                 };
248
249                 mux-mdio {
250                         function = "mdio0";
251                         groups = "mdio0_0_grp";
252                 };
253
254                 conf-mdio {
255                         groups = "mdio0_0_grp";
256                         slew-rate = <0>;
257                         io-standard = <1>;
258                         bias-disable;
259                 };
260         };
261
262         pinctrl_gpio0_default: gpio0-default {
263                 mux {
264                         function = "gpio0";
265                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
266                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
267                                  "gpio0_13_grp", "gpio0_14_grp";
268                 };
269
270                 conf {
271                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
272                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
273                                  "gpio0_13_grp", "gpio0_14_grp";
274                         slew-rate = <0>;
275                         io-standard = <1>;
276                 };
277
278                 conf-pull-up {
279                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
280                         bias-pull-up;
281                 };
282
283                 conf-pull-none {
284                         pins = "MIO7", "MIO8";
285                         bias-disable;
286                 };
287         };
288
289         pinctrl_i2c0_default: i2c0-default {
290                 mux {
291                         groups = "i2c0_10_grp";
292                         function = "i2c0";
293                 };
294
295                 conf {
296                         groups = "i2c0_10_grp";
297                         bias-pull-up;
298                         slew-rate = <0>;
299                         io-standard = <1>;
300                 };
301         };
302
303         pinctrl_i2c0_gpio: i2c0-gpio {
304                 mux {
305                         groups = "gpio0_50_grp", "gpio0_51_grp";
306                         function = "gpio0";
307                 };
308
309                 conf {
310                         groups = "gpio0_50_grp", "gpio0_51_grp";
311                         slew-rate = <0>;
312                         io-standard = <1>;
313                 };
314         };
315
316         pinctrl_sdhci0_default: sdhci0-default {
317                 mux {
318                         groups = "sdio0_2_grp";
319                         function = "sdio0";
320                 };
321
322                 conf {
323                         groups = "sdio0_2_grp";
324                         slew-rate = <0>;
325                         io-standard = <1>;
326                         bias-disable;
327                 };
328
329                 mux-cd {
330                         groups = "gpio0_0_grp";
331                         function = "sdio0_cd";
332                 };
333
334                 conf-cd {
335                         groups = "gpio0_0_grp";
336                         bias-high-impedance;
337                         bias-pull-up;
338                         slew-rate = <0>;
339                         io-standard = <1>;
340                 };
341
342                 mux-wp {
343                         groups = "gpio0_15_grp";
344                         function = "sdio0_wp";
345                 };
346
347                 conf-wp {
348                         groups = "gpio0_15_grp";
349                         bias-high-impedance;
350                         bias-pull-up;
351                         slew-rate = <0>;
352                         io-standard = <1>;
353                 };
354         };
355
356         pinctrl_uart1_default: uart1-default {
357                 mux {
358                         groups = "uart1_10_grp";
359                         function = "uart1";
360                 };
361
362                 conf {
363                         groups = "uart1_10_grp";
364                         slew-rate = <0>;
365                         io-standard = <1>;
366                 };
367
368                 conf-rx {
369                         pins = "MIO49";
370                         bias-high-impedance;
371                 };
372
373                 conf-tx {
374                         pins = "MIO48";
375                         bias-disable;
376                 };
377         };
378
379         pinctrl_usb0_default: usb0-default {
380                 mux {
381                         groups = "usb0_0_grp";
382                         function = "usb0";
383                 };
384
385                 conf {
386                         groups = "usb0_0_grp";
387                         slew-rate = <0>;
388                         io-standard = <1>;
389                 };
390
391                 conf-rx {
392                         pins = "MIO29", "MIO31", "MIO36";
393                         bias-high-impedance;
394                 };
395
396                 conf-tx {
397                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
398                                "MIO35", "MIO37", "MIO38", "MIO39";
399                         bias-disable;
400                 };
401         };
402 };
403
404 &qspi {
405         u-boot,dm-pre-reloc;
406         status = "okay";
407 };
408
409 &sdhci0 {
410         u-boot,dm-pre-reloc;
411         status = "okay";
412         pinctrl-names = "default";
413         pinctrl-0 = <&pinctrl_sdhci0_default>;
414 };
415
416 &uart1 {
417         u-boot,dm-pre-reloc;
418         status = "okay";
419         pinctrl-names = "default";
420         pinctrl-0 = <&pinctrl_uart1_default>;
421 };
422
423 &usb0 {
424         status = "okay";
425         dr_mode = "host";
426         usb-phy = <&usb_phy0>;
427         pinctrl-names = "default";
428         pinctrl-0 = <&pinctrl_usb0_default>;
429 };