git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynq-zc706.dts

   1 /*
   2  * Xilinx ZC706 board DTS
   3  *
   4  *  Copyright (C) 2011 - 2015 Xilinx
   5  *  Copyright (C) 2012 National Instruments Corp.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 /dts-v1/;
  10 #include "zynq-7000.dtsi"
  11
  12 / {
  13         model = "Zynq ZC706 Development Board";
  14         compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
  15
  16         aliases {
  17                 ethernet0 = &gem0;
  18                 i2c0 = &i2c0;
  19                 serial0 = &uart1;
  20                 spi0 = &qspi;
  21                 mmc0 = &sdhci0;
  22         };
  23
  24         memory {
  25                 device_type = "memory";
  26                 reg = <0x0 0x40000000>;
  27         };
  28
  29         chosen {
  30                 bootargs = "earlyprintk";
  31                 stdout-path = "serial0:115200n8";
  32         };
  33
  34         usb_phy0: phy0 {
  35                 compatible = "usb-nop-xceiv";
  36                 #phy-cells = <0>;
  37         };
  38 };
  39
  40 &clkc {
  41         ps-clk-frequency = <33333333>;
  42 };
  43
  44 &gem0 {
  45         status = "okay";
  46         phy-mode = "rgmii-id";
  47         phy-handle = <&ethernet_phy>;
  48         pinctrl-names = "default";
  49         pinctrl-0 = <&pinctrl_gem0_default>;
  50
  51         ethernet_phy: ethernet-phy@7 {
  52                 reg = <7>;
  53         };
  54 };
  55
  56 &gpio0 {
  57         pinctrl-names = "default";
  58         pinctrl-0 = <&pinctrl_gpio0_default>;
  59 };
  60
  61 &i2c0 {
  62         status = "okay";
  63         clock-frequency = <400000>;
  64         pinctrl-names = "default";
  65         pinctrl-0 = <&pinctrl_i2c0_default>;
  66
  67         i2cswitch@74 {
  68                 compatible = "nxp,pca9548";
  69                 #address-cells = <1>;
  70                 #size-cells = <0>;
  71                 reg = <0x74>;
  72
  73                 i2c@0 {
  74                         #address-cells = <1>;
  75                         #size-cells = <0>;
  76                         reg = <0>;
  77                         si570: clock-generator@5d {
  78                                 #clock-cells = <0>;
  79                                 compatible = "silabs,si570";
  80                                 temperature-stability = <50>;
  81                                 reg = <0x5d>;
  82                                 factory-fout = <156250000>;
  83                                 clock-frequency = <148500000>;
  84                         };
  85                 };
  86
  87                 i2c@2 {
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         reg = <2>;
  91                         eeprom@54 {
  92                                 compatible = "at,24c08";
  93                                 reg = <0x54>;
  94                         };
  95                 };
  96
  97                 i2c@3 {
  98                         #address-cells = <1>;
  99                         #size-cells = <0>;
 100                         reg = <3>;
 101                         gpio@21 {
 102                                 compatible = "ti,tca6416";
 103                                 reg = <0x21>;
 104                                 gpio-controller;
 105                                 #gpio-cells = <2>;
 106                         };
 107                 };
 108
 109                 i2c@4 {
 110                         #address-cells = <1>;
 111                         #size-cells = <0>;
 112                         reg = <4>;
 113                         rtc@51 {
 114                                 compatible = "nxp,pcf8563";
 115                                 reg = <0x51>;
 116                         };
 117                 };
 118
 119                 i2c@7 {
 120                         #address-cells = <1>;
 121                         #size-cells = <0>;
 122                         reg = <7>;
 123                         ucd90120@65 {
 124                                 compatible = "ti,ucd90120";
 125                                 reg = <0x65>;
 126                         };
 127                 };
 128         };
 129 };
 130
 131 &pinctrl0 {
 132         pinctrl_gem0_default: gem0-default {
 133                 mux {
 134                         function = "ethernet0";
 135                         groups = "ethernet0_0_grp";
 136                 };
 137
 138                 conf {
 139                         groups = "ethernet0_0_grp";
 140                         slew-rate = <0>;
 141                         io-standard = <4>;
 142                 };
 143
 144                 conf-rx {
 145                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 146                         bias-high-impedance;
 147                         low-power-disable;
 148                 };
 149
 150                 conf-tx {
 151                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 152                         low-power-enable;
 153                         bias-disable;
 154                 };
 155
 156                 mux-mdio {
 157                         function = "mdio0";
 158                         groups = "mdio0_0_grp";
 159                 };
 160
 161                 conf-mdio {
 162                         groups = "mdio0_0_grp";
 163                         slew-rate = <0>;
 164                         io-standard = <1>;
 165                         bias-disable;
 166                 };
 167         };
 168
 169         pinctrl_gpio0_default: gpio0-default {
 170                 mux {
 171                         function = "gpio0";
 172                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
 173                 };
 174
 175                 conf {
 176                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
 177                         slew-rate = <0>;
 178                         io-standard = <1>;
 179                 };
 180
 181                 conf-pull-up {
 182                         pins = "MIO46", "MIO47";
 183                         bias-pull-up;
 184                 };
 185
 186                 conf-pull-none {
 187                         pins = "MIO7";
 188                         bias-disable;
 189                 };
 190         };
 191
 192         pinctrl_i2c0_default: i2c0-default {
 193                 mux {
 194                         groups = "i2c0_10_grp";
 195                         function = "i2c0";
 196                 };
 197
 198                 conf {
 199                         groups = "i2c0_10_grp";
 200                         bias-pull-up;
 201                         slew-rate = <0>;
 202                         io-standard = <1>;
 203                 };
 204         };
 205
 206         pinctrl_sdhci0_default: sdhci0-default {
 207                 mux {
 208                         groups = "sdio0_2_grp";
 209                         function = "sdio0";
 210                 };
 211
 212                 conf {
 213                         groups = "sdio0_2_grp";
 214                         slew-rate = <0>;
 215                         io-standard = <1>;
 216                         bias-disable;
 217                 };
 218
 219                 mux-cd {
 220                         groups = "gpio0_14_grp";
 221                         function = "sdio0_cd";
 222                 };
 223
 224                 conf-cd {
 225                         groups = "gpio0_14_grp";
 226                         bias-high-impedance;
 227                         bias-pull-up;
 228                         slew-rate = <0>;
 229                         io-standard = <1>;
 230                 };
 231
 232                 mux-wp {
 233                         groups = "gpio0_15_grp";
 234                         function = "sdio0_wp";
 235                 };
 236
 237                 conf-wp {
 238                         groups = "gpio0_15_grp";
 239                         bias-high-impedance;
 240                         bias-pull-up;
 241                         slew-rate = <0>;
 242                         io-standard = <1>;
 243                 };
 244         };
 245
 246         pinctrl_uart1_default: uart1-default {
 247                 mux {
 248                         groups = "uart1_10_grp";
 249                         function = "uart1";
 250                 };
 251
 252                 conf {
 253                         groups = "uart1_10_grp";
 254                         slew-rate = <0>;
 255                         io-standard = <1>;
 256                 };
 257
 258                 conf-rx {
 259                         pins = "MIO49";
 260                         bias-high-impedance;
 261                 };
 262
 263                 conf-tx {
 264                         pins = "MIO48";
 265                         bias-disable;
 266                 };
 267         };
 268
 269         pinctrl_usb0_default: usb0-default {
 270                 mux {
 271                         groups = "usb0_0_grp";
 272                         function = "usb0";
 273                 };
 274
 275                 conf {
 276                         groups = "usb0_0_grp";
 277                         slew-rate = <0>;
 278                         io-standard = <1>;
 279                 };
 280
 281                 conf-rx {
 282                         pins = "MIO29", "MIO31", "MIO36";
 283                         bias-high-impedance;
 284                 };
 285
 286                 conf-tx {
 287                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 288                                "MIO35", "MIO37", "MIO38", "MIO39";
 289                         bias-disable;
 290                 };
 291         };
 292 };
 293
 294 &sdhci0 {
 295         u-boot,dm-pre-reloc;
 296         status = "okay";
 297         pinctrl-names = "default";
 298         pinctrl-0 = <&pinctrl_sdhci0_default>;
 299 };
 300
 301 &uart1 {
 302         u-boot,dm-pre-reloc;
 303         status = "okay";
 304         pinctrl-names = "default";
 305         pinctrl-0 = <&pinctrl_uart1_default>;
 306 };
 307
 308 &qspi {
 309         u-boot,dm-pre-reloc;
 310         status = "okay";
 311 };
 312
 313 &usb0 {
 314         status = "okay";
 315         dr_mode = "host";
 316         usb-phy = <&usb_phy0>;
 317         pinctrl-names = "default";
 318         pinctrl-0 = <&pinctrl_usb0_default>;
 319 };