git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynq-zc770-xm010.dts

   1 /*
   2  * Xilinx ZC770 XM010 board DTS
   3  *
   4  * Copyright (C) 2013 - 2015 Xilinx, Inc.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 /dts-v1/;
   9 #include "zynq-7000.dtsi"
  10
  11 / {
  12         compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
  13         model = "Xilinx Zynq";
  14
  15         aliases {
  16                 ethernet0 = &gem0;
  17                 i2c0 = &i2c0;
  18                 serial0 = &uart1;
  19                 spi0 = &qspi;
  20                 spi1 = &spi1;
  21         };
  22
  23         chosen {
  24                 bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
  25                 linux,stdout-path = &uart1;
  26                 stdout-path = &uart1;
  27         };
  28
  29         memory {
  30                 device_type = "memory";
  31                 reg = <0x0 0x40000000>;
  32         };
  33
  34         usb_phy0: phy0 {
  35                 compatible = "usb-nop-xceiv";
  36                 #phy-cells = <0>;
  37         };
  38 };
  39
  40 &spi1 {
  41         status = "okay";
  42         num-cs = <4>;
  43         is-decoded-cs = <0>;
  44         flash@0 {
  45                 compatible = "sst25wf080";
  46                 reg = <1>;
  47                 spi-max-frequency = <1000000>;
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 partition@test {
  51                         label = "spi-flash";
  52                         reg = <0x0 0x100000>;
  53                 };
  54         };
  55 };
  56
  57 &qspi {
  58         status = "okay";
  59 };
  60
  61 &can0 {
  62         status = "okay";
  63 };
  64
  65 &gem0 {
  66         status = "okay";
  67         phy-mode = "rgmii-id";
  68         phy-handle = <&ethernet_phy>;
  69
  70         ethernet_phy: ethernet-phy@7 {
  71                 reg = <7>;
  72         };
  73 };
  74
  75 &i2c0 {
  76         status = "okay";
  77         clock-frequency = <400000>;
  78
  79         m24c02_eeprom@52 {
  80                 compatible = "at,24c02";
  81                 reg = <0x52>;
  82         };
  83
  84 };
  85
  86 &sdhci0 {
  87         status = "okay";
  88 };
  89
  90 &uart1 {
  91         u-boot,dm-pre-reloc;
  92         status = "okay";
  93 };
  94
  95 &usb0 {
  96         status = "okay";
  97         dr_mode = "host";
  98         usb-phy = <&usb_phy0>;
  99 };