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[u-boot] / arch / arm / dts / zynq-zed.dts
1 /*
2  * Xilinx ZED board DTS
3  *
4  *  Copyright (C) 2011 - 2015 Xilinx
5  *  Copyright (C) 2012 National Instruments Corp.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 /dts-v1/;
10 #include "zynq-7000.dtsi"
11
12 / {
13         model = "Zynq Zed Development Board";
14         compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
15
16         aliases {
17                 ethernet0 = &gem0;
18                 serial0 = &uart1;
19                 spi0 = &qspi;
20                 mmc0 = &sdhci0;
21         };
22
23         memory {
24                 device_type = "memory";
25                 reg = <0x0 0x20000000>;
26         };
27
28         chosen {
29                 bootargs = "earlyprintk";
30                 stdout-path = "serial0:115200n8";
31         };
32
33         usb_phy0: phy0 {
34                 compatible = "usb-nop-xceiv";
35                 #phy-cells = <0>;
36         };
37 };
38
39 &clkc {
40         ps-clk-frequency = <33333333>;
41 };
42
43 &gem0 {
44         status = "okay";
45         phy-mode = "rgmii-id";
46         phy-handle = <&ethernet_phy>;
47
48         ethernet_phy: ethernet-phy@0 {
49                 reg = <0>;
50         };
51 };
52
53 &sdhci0 {
54         u-boot,dm-pre-reloc;
55         status = "okay";
56 };
57
58 &uart1 {
59         u-boot,dm-pre-reloc;
60         status = "okay";
61 };
62
63 &qspi {
64         u-boot,dm-pre-reloc;
65         status = "okay";
66 };
67
68 &usb0 {
69         status = "okay";
70         dr_mode = "host";
71         usb-phy = <&usb_phy0>;
72 };