1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP Mini Configuration
5 * (C) Copyright 2018, Xilinx, Inc.
7 * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
13 model = "ZynqMP MINI EMMC";
14 compatible = "xlnx,zynqmp";
25 stdout-path = "serial0:115200n8";
29 device_type = "memory";
30 reg = <0x0 0x0 0x0 0x20000000>;
34 compatible = "arm,dcc";
40 compatible = "simple-bus";
45 sdhci0: sdhci@ff160000 {
47 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
49 reg = <0x0 0xff160000 0x0 0x1000>;
50 clock-names = "clk_xin", "clk_ahb";
54 sdhci1: sdhci@ff170000 {
56 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
58 reg = <0x0 0xff170000 0x0 0x1000>;
59 clock-names = "clk_xin", "clk_ahb";