2 * dts file for Xilinx ZynqMP Mini Configuration
4 * (C) Copyright 2018, Xilinx, Inc.
6 * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
14 model = "ZynqMP MINI EMMC";
15 compatible = "xlnx,zynqmp";
26 stdout-path = "serial0:115200n8";
30 device_type = "memory";
31 reg = <0x0 0x0 0x0 0x20000000>;
35 compatible = "arm,dcc";
41 compatible = "simple-bus";
46 sdhci0: sdhci@ff160000 {
48 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
50 reg = <0x0 0xff160000 0x0 0x1000>;
51 clock-names = "clk_xin", "clk_ahb";
55 sdhci1: sdhci@ff170000 {
57 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
59 reg = <0x0 0xff170000 0x0 0x1000>;
60 clock-names = "clk_xin", "clk_ahb";