2 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
4 * (C) Copyright 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk.dtsi"
17 model = "ZynqMP zc1751-xm015-dc1 RevA";
18 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
33 bootargs = "earlycon";
34 stdout-path = "serial0:115200n8";
38 device_type = "memory";
39 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
43 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
46 xlnx,include-sg; /* for testing purpose */
47 xlnx,overfetch; /* for testing purpose */
48 xlnx,ratectrl = <0>; /* for testing purpose */
49 xlnx,src-issue = <31>;
54 xlnx,ratectrl = <100>; /* for testing purpose */
55 xlnx,src-issue = <4>; /* for testing purpose */
64 xlnx,include-sg; /* for testing purpose */
73 xlnx,include-sg; /* for testing purpose */
82 xlnx,include-sg; /* for testing purpose */
88 phy-mode = "rgmii-id";
104 clock-frequency = <400000>;
106 compatible = "at,24c64"; /* 24AA64 */
114 compatible = "m25p80"; /* Micron MT25QU512ABB8ESF */
115 #address-cells = <1>;
118 spi-tx-bus-width = <1>;
119 spi-rx-bus-width = <4>;
120 spi-max-frequency = <108000000>; /* Based on DC1 spec */
121 partition@qspi-fsbl-uboot { /* for testing purpose */
122 label = "qspi-fsbl-uboot";
123 reg = <0x0 0x100000>;
125 partition@qspi-linux { /* for testing purpose */
126 label = "qspi-linux";
127 reg = <0x100000 0x500000>;
129 partition@qspi-device-tree { /* for testing purpose */
130 label = "qspi-device-tree";
131 reg = <0x600000 0x20000>;
133 partition@qspi-rootfs { /* for testing purpose */
134 label = "qspi-rootfs";
135 reg = <0x620000 0x5E0000>;
146 /* SATA phy OOB timing settings */
147 ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
148 ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
149 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
150 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
151 ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
152 ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
153 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
154 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
164 /* SD1 with level shifter */
167 no-1-8-v; /* for 1.0 silicon */
175 /* ULPI SMSC USB3320 */
210 &xlnx_dp_snd_codec0 {