1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2018, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
16 model = "ZynqMP zc1751-xm016-dc2 RevA";
17 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
34 bootargs = "earlycon";
35 stdout-path = "serial0:115200n8";
39 device_type = "memory";
40 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
87 phy-mode = "rgmii-id";
90 ti,rx-internal-delay = <0x8>;
91 ti,tx-internal-delay = <0xa>;
92 ti,fifo-depth = <0x1>;
102 clock-frequency = <400000>;
104 tca6416_u26: gpio@20 {
105 compatible = "ti,tca6416";
109 /* IRQ not connected */
113 compatible = "dallas,ds1339";
123 partition@0 { /* for testing purpose */
124 label = "nand-fsbl-uboot";
125 reg = <0x0 0x0 0x400000>;
127 partition@1 { /* for testing purpose */
128 label = "nand-linux";
129 reg = <0x0 0x400000 0x1400000>;
131 partition@2 { /* for testing purpose */
132 label = "nand-device-tree";
133 reg = <0x0 0x1800000 0x400000>;
135 partition@3 { /* for testing purpose */
136 label = "nand-rootfs";
137 reg = <0x0 0x1C00000 0x1400000>;
139 partition@4 { /* for testing purpose */
140 label = "nand-bitstream";
141 reg = <0x0 0x3000000 0x400000>;
143 partition@5 { /* for testing purpose */
145 reg = <0x0 0x3400000 0xFCC00000>;
148 partition@6 { /* for testing purpose */
149 label = "nand1-fsbl-uboot";
150 reg = <0x1 0x0 0x400000>;
152 partition@7 { /* for testing purpose */
153 label = "nand1-linux";
154 reg = <0x1 0x400000 0x1400000>;
156 partition@8 { /* for testing purpose */
157 label = "nand1-device-tree";
158 reg = <0x1 0x1800000 0x400000>;
160 partition@9 { /* for testing purpose */
161 label = "nand1-rootfs";
162 reg = <0x1 0x1C00000 0x1400000>;
164 partition@10 { /* for testing purpose */
165 label = "nand1-bitstream";
166 reg = <0x1 0x3000000 0x400000>;
168 partition@11 { /* for testing purpose */
169 label = "nand1-misc";
170 reg = <0x1 0x3400000 0xFCC00000>;
181 spi0_flash0: spi0_flash0@0 {
182 compatible = "m25p80";
183 #address-cells = <1>;
185 spi-max-frequency = <50000000>;
189 label = "spi0_flash0";
190 reg = <0x0 0x100000>;
198 spi1_flash0: spi1_flash0@0 {
199 compatible = "mtd_dataflash";
200 #address-cells = <1>;
202 spi-max-frequency = <20000000>;
206 label = "spi1_flash0";
212 /* ULPI SMSC USB3320 */