git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynqmp-zcu106-revA.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * dts file for Xilinx ZynqMP ZCU106
   4  *
   5  * (C) Copyright 2016, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "zynqmp.dtsi"
  13 #include "zynqmp-clk-ccf.dtsi"
  14 #include <dt-bindings/input/input.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/phy/phy.h>
  17
  18 / {
  19         model = "ZynqMP ZCU106 RevA";
  20         compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
  21
  22         aliases {
  23                 ethernet0 = &gem3;
  24                 gpio0 = &gpio;
  25                 i2c0 = &i2c0;
  26                 i2c1 = &i2c1;
  27                 mmc0 = &sdhci1;
  28                 rtc0 = &rtc;
  29                 serial0 = &uart0;
  30                 serial1 = &uart1;
  31                 serial2 = &dcc;
  32                 spi0 = &qspi;
  33                 usb0 = &usb0;
  34         };
  35
  36         chosen {
  37                 bootargs = "earlycon";
  38                 stdout-path = "serial0:115200n8";
  39         };
  40
  41         memory@0 {
  42                 device_type = "memory";
  43                 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
  44         };
  45
  46         gpio-keys {
  47                 compatible = "gpio-keys";
  48                 #address-cells = <1>;
  49                 #size-cells = <0>;
  50                 autorepeat;
  51                 sw19 {
  52                         label = "sw19";
  53                         gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
  54                         linux,code = <KEY_DOWN>;
  55                         gpio-key,wakeup;
  56                         autorepeat;
  57                 };
  58         };
  59
  60         leds {
  61                 compatible = "gpio-leds";
  62                 heartbeat_led {
  63                         label = "heartbeat";
  64                         gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
  65                         linux,default-trigger = "heartbeat";
  66                 };
  67         };
  68 };
  69
  70 &can1 {
  71         status = "okay";
  72 };
  73
  74 &dcc {
  75         status = "okay";
  76 };
  77
  78 &fpd_dma_chan1 {
  79         status = "okay";
  80 };
  81
  82 &fpd_dma_chan2 {
  83         status = "okay";
  84 };
  85
  86 &fpd_dma_chan3 {
  87         status = "okay";
  88 };
  89
  90 &fpd_dma_chan4 {
  91         status = "okay";
  92 };
  93
  94 &fpd_dma_chan5 {
  95         status = "okay";
  96 };
  97
  98 &fpd_dma_chan6 {
  99         status = "okay";
 100 };
 101
 102 &fpd_dma_chan7 {
 103         status = "okay";
 104 };
 105
 106 &fpd_dma_chan8 {
 107         status = "okay";
 108 };
 109
 110 &gem3 {
 111         status = "okay";
 112         phy-handle = <&phy0>;
 113         phy-mode = "rgmii-id";
 114         phy0: phy@c {
 115                 reg = <0xc>;
 116                 ti,rx-internal-delay = <0x8>;
 117                 ti,tx-internal-delay = <0xa>;
 118                 ti,fifo-depth = <0x1>;
 119         };
 120 };
 121
 122 &gpio {
 123         status = "okay";
 124 };
 125
 126 &gpu {
 127         status = "okay";
 128 };
 129
 130 &i2c0 {
 131         status = "okay";
 132         clock-frequency = <400000>;
 133
 134         tca6416_u97: gpio@20 {
 135                 compatible = "ti,tca6416";
 136                 reg = <0x20>;
 137                 gpio-controller; /* interrupt not connected */
 138                 #gpio-cells = <2>;
 139                 /*
 140                  * IRQ not connected
 141                  * Lines:
 142                  * 0 - SFP_SI5328_INT_ALM
 143                  * 1 - HDMI_SI5328_INT_ALM
 144                  * 5 - IIC_MUX_RESET_B
 145                  * 6 - GEM3_EXP_RESET_B
 146                  * 10 - FMC_HPC0_PRSNT_M2C_B
 147                  * 11 - FMC_HPC1_PRSNT_M2C_B
 148                  * 2-4, 7, 12-17 - not connected
 149                  */
 150         };
 151
 152         tca6416_u61: gpio@21 {
 153                 compatible = "ti,tca6416";
 154                 reg = <0x21>;
 155                 gpio-controller;
 156                 #gpio-cells = <2>;
 157                 /*
 158                  * IRQ not connected
 159                  * Lines:
 160                  * 0 - VCCPSPLL_EN
 161                  * 1 - MGTRAVCC_EN
 162                  * 2 - MGTRAVTT_EN
 163                  * 3 - VCCPSDDRPLL_EN
 164                  * 4 - MIO26_PMU_INPUT_LS
 165                  * 5 - PL_PMBUS_ALERT
 166                  * 6 - PS_PMBUS_ALERT
 167                  * 7 - MAXIM_PMBUS_ALERT
 168                  * 10 - PL_DDR4_VTERM_EN
 169                  * 11 - PL_DDR4_VPP_2V5_EN
 170                  * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON
 171                  * 13 - PS_DIMM_SUSPEND_EN
 172                  * 14 - PS_DDR4_VTERM_EN
 173                  * 15 - PS_DDR4_VPP_2V5_EN
 174                  * 16 - 17 - not connected
 175                  */
 176         };
 177
 178         i2c-mux@75 { /* u60 */
 179                 compatible = "nxp,pca9544";
 180                 #address-cells = <1>;
 181                 #size-cells = <0>;
 182                 reg = <0x75>;
 183                 i2c@0 {
 184                         #address-cells = <1>;
 185                         #size-cells = <0>;
 186                         reg = <0>;
 187                         /* PS_PMBUS */
 188                         ina226@40 { /* u76 */
 189                                 compatible = "ti,ina226";
 190                                 reg = <0x40>;
 191                                 shunt-resistor = <5000>;
 192                         };
 193                         ina226@41 { /* u77 */
 194                                 compatible = "ti,ina226";
 195                                 reg = <0x41>;
 196                                 shunt-resistor = <5000>;
 197                         };
 198                         ina226@42 { /* u78 */
 199                                 compatible = "ti,ina226";
 200                                 reg = <0x42>;
 201                                 shunt-resistor = <5000>;
 202                         };
 203                         ina226@43 { /* u87 */
 204                                 compatible = "ti,ina226";
 205                                 reg = <0x43>;
 206                                 shunt-resistor = <5000>;
 207                         };
 208                         ina226@44 { /* u85 */
 209                                 compatible = "ti,ina226";
 210                                 reg = <0x44>;
 211                                 shunt-resistor = <5000>;
 212                         };
 213                         ina226@45 { /* u86 */
 214                                 compatible = "ti,ina226";
 215                                 reg = <0x45>;
 216                                 shunt-resistor = <5000>;
 217                         };
 218                         ina226@46 { /* u93 */
 219                                 compatible = "ti,ina226";
 220                                 reg = <0x46>;
 221                                 shunt-resistor = <5000>;
 222                         };
 223                         ina226@47 { /* u88 */
 224                                 compatible = "ti,ina226";
 225                                 reg = <0x47>;
 226                                 shunt-resistor = <5000>;
 227                         };
 228                         ina226@4a { /* u15 */
 229                                 compatible = "ti,ina226";
 230                                 reg = <0x4a>;
 231                                 shunt-resistor = <5000>;
 232                         };
 233                         ina226@4b { /* u92 */
 234                                 compatible = "ti,ina226";
 235                                 reg = <0x4b>;
 236                                 shunt-resistor = <5000>;
 237                         };
 238                 };
 239                 i2c@1 {
 240                         #address-cells = <1>;
 241                         #size-cells = <0>;
 242                         reg = <1>;
 243                         /* PL_PMBUS */
 244                         ina226@40 { /* u79 */
 245                                 compatible = "ti,ina226";
 246                                 reg = <0x40>;
 247                                 shunt-resistor = <2000>;
 248                         };
 249                         ina226@41 { /* u81 */
 250                                 compatible = "ti,ina226";
 251                                 reg = <0x41>;
 252                                 shunt-resistor = <5000>;
 253                         };
 254                         ina226@42 { /* u80 */
 255                                 compatible = "ti,ina226";
 256                                 reg = <0x42>;
 257                                 shunt-resistor = <5000>;
 258                         };
 259                         ina226@43 { /* u84 */
 260                                 compatible = "ti,ina226";
 261                                 reg = <0x43>;
 262                                 shunt-resistor = <5000>;
 263                         };
 264                         ina226@44 { /* u16 */
 265                                 compatible = "ti,ina226";
 266                                 reg = <0x44>;
 267                                 shunt-resistor = <5000>;
 268                         };
 269                         ina226@45 { /* u65 */
 270                                 compatible = "ti,ina226";
 271                                 reg = <0x45>;
 272                                 shunt-resistor = <5000>;
 273                         };
 274                         ina226@46 { /* u74 */
 275                                 compatible = "ti,ina226";
 276                                 reg = <0x46>;
 277                                 shunt-resistor = <5000>;
 278                         };
 279                         ina226@47 { /* u75 */
 280                                 compatible = "ti,ina226";
 281                                 reg = <0x47>;
 282                                 shunt-resistor = <5000>;
 283                         };
 284                 };
 285                 i2c@2 {
 286                         #address-cells = <1>;
 287                         #size-cells = <0>;
 288                         reg = <2>;
 289                         /* MAXIM_PMBUS - 00 */
 290                         max15301@a { /* u46 */
 291                                 compatible = "maxim,max15301";
 292                                 reg = <0xa>;
 293                         };
 294                         max15303@b { /* u4 */
 295                                 compatible = "maxim,max15303";
 296                                 reg = <0xb>;
 297                         };
 298                         max15303@10 { /* u13 */
 299                                 compatible = "maxim,max15303";
 300                                 reg = <0x10>;
 301                         };
 302                         max15301@13 { /* u47 */
 303                                 compatible = "maxim,max15301";
 304                                 reg = <0x13>;
 305                         };
 306                         max15303@14 { /* u7 */
 307                                 compatible = "maxim,max15303";
 308                                 reg = <0x14>;
 309                         };
 310                         max15303@15 { /* u6 */
 311                                 compatible = "maxim,max15303";
 312                                 reg = <0x15>;
 313                         };
 314                         max15303@16 { /* u10 */
 315                                 compatible = "maxim,max15303";
 316                                 reg = <0x16>;
 317                         };
 318                         max15303@17 { /* u9 */
 319                                 compatible = "maxim,max15303";
 320                                 reg = <0x17>;
 321                         };
 322                         max15301@18 { /* u63 */
 323                                 compatible = "maxim,max15301";
 324                                 reg = <0x18>;
 325                         };
 326                         max15303@1a { /* u49 */
 327                                 compatible = "maxim,max15303";
 328                                 reg = <0x1a>;
 329                         };
 330                         max15303@1b { /* u8 */
 331                                 compatible = "maxim,max15303";
 332                                 reg = <0x1b>;
 333                         };
 334                         max15303@1d { /* u18 */
 335                                 compatible = "maxim,max15303";
 336                                 reg = <0x1d>;
 337                         };
 338
 339                         max20751@72 { /* u95 */
 340                                 compatible = "maxim,max20751";
 341                                 reg = <0x72>;
 342                         };
 343                         max20751@73 { /* u96 */
 344                                 compatible = "maxim,max20751";
 345                                 reg = <0x73>;
 346                         };
 347                 };
 348                 /* Bus 3 is not connected */
 349         };
 350 };
 351
 352 &i2c1 {
 353         status = "okay";
 354         clock-frequency = <400000>;
 355
 356         /* PL i2c via PCA9306 - u45 */
 357         i2c-mux@74 { /* u34 */
 358                 compatible = "nxp,pca9548";
 359                 #address-cells = <1>;
 360                 #size-cells = <0>;
 361                 reg = <0x74>;
 362                 i2c@0 {
 363                         #address-cells = <1>;
 364                         #size-cells = <0>;
 365                         reg = <0>;
 366                         /*
 367                          * IIC_EEPROM 1kB memory which uses 256B blocks
 368                          * where every block has different address.
 369                          *    0 - 256B address 0x54
 370                          * 256B - 512B address 0x55
 371                          * 512B - 768B address 0x56
 372                          * 768B - 1024B address 0x57
 373                          */
 374                         eeprom: eeprom@54 { /* u23 */
 375                                 compatible = "atmel,24c08";
 376                                 reg = <0x54>;
 377                         };
 378                 };
 379                 i2c@1 {
 380                         #address-cells = <1>;
 381                         #size-cells = <0>;
 382                         reg = <1>;
 383                         si5341: clock-generator@36 { /* SI5341 - u69 */
 384                                 compatible = "si5341";
 385                                 reg = <0x36>;
 386                         };
 387
 388                 };
 389                 i2c@2 {
 390                         #address-cells = <1>;
 391                         #size-cells = <0>;
 392                         reg = <2>;
 393                         si570_1: clock-generator@5d { /* USER SI570 - u42 */
 394                                 #clock-cells = <0>;
 395                                 compatible = "silabs,si570";
 396                                 reg = <0x5d>;
 397                                 temperature-stability = <50>;
 398                                 factory-fout = <300000000>;
 399                                 clock-frequency = <300000000>;
 400                         };
 401                 };
 402                 i2c@3 {
 403                         #address-cells = <1>;
 404                         #size-cells = <0>;
 405                         reg = <3>;
 406                         si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
 407                                 #clock-cells = <0>;
 408                                 compatible = "silabs,si570";
 409                                 reg = <0x5d>;
 410                                 temperature-stability = <50>; /* copy from zc702 */
 411                                 factory-fout = <156250000>;
 412                                 clock-frequency = <148500000>;
 413                         };
 414                 };
 415                 i2c@4 {
 416                         #address-cells = <1>;
 417                         #size-cells = <0>;
 418                         reg = <4>;
 419                         si5328: clock-generator@69 {/* SI5328 - u20 */
 420                                 compatible = "silabs,si5328";
 421                                 reg = <0x69>;
 422                         };
 423                 };
 424                 i2c@5 {
 425                         #address-cells = <1>;
 426                         #size-cells = <0>;
 427                         reg = <5>; /* FAN controller */
 428                         temp@4c {/* lm96163 - u128 */
 429                                 compatible = "national,lm96163";
 430                                 reg = <0x4c>;
 431                         };
 432                 };
 433                 /* 6 - 7 unconnected */
 434         };
 435
 436         i2c-mux@75 {
 437                 compatible = "nxp,pca9548"; /* u135 */
 438                 #address-cells = <1>;
 439                 #size-cells = <0>;
 440                 reg = <0x75>;
 441
 442                 i2c@0 {
 443                         #address-cells = <1>;
 444                         #size-cells = <0>;
 445                         reg = <0>;
 446                         /* HPC0_IIC */
 447                 };
 448                 i2c@1 {
 449                         #address-cells = <1>;
 450                         #size-cells = <0>;
 451                         reg = <1>;
 452                         /* HPC1_IIC */
 453                 };
 454                 i2c@2 {
 455                         #address-cells = <1>;
 456                         #size-cells = <0>;
 457                         reg = <2>;
 458                         /* SYSMON */
 459                 };
 460                 i2c@3 {
 461                         #address-cells = <1>;
 462                         #size-cells = <0>;
 463                         reg = <3>;
 464                         /* DDR4 SODIMM */
 465                         dev@19 { /* u-boot detection */
 466                                 compatible = "xxx";
 467                                 reg = <0x19>;
 468                         };
 469                         dev@30 { /* u-boot detection */
 470                                 compatible = "xxx";
 471                                 reg = <0x30>;
 472                         };
 473                         dev@35 { /* u-boot detection */
 474                                 compatible = "xxx";
 475                                 reg = <0x35>;
 476                         };
 477                         dev@36 { /* u-boot detection */
 478                                 compatible = "xxx";
 479                                 reg = <0x36>;
 480                         };
 481                         dev@51 { /* u-boot detection - maybe SPD */
 482                                 compatible = "xxx";
 483                                 reg = <0x51>;
 484                         };
 485                 };
 486                 i2c@4 {
 487                         #address-cells = <1>;
 488                         #size-cells = <0>;
 489                         reg = <4>;
 490                         /* SEP 3 */
 491                 };
 492                 i2c@5 {
 493                         #address-cells = <1>;
 494                         #size-cells = <0>;
 495                         reg = <5>;
 496                         /* SEP 2 */
 497                 };
 498                 i2c@6 {
 499                         #address-cells = <1>;
 500                         #size-cells = <0>;
 501                         reg = <6>;
 502                         /* SEP 1 */
 503                 };
 504                 i2c@7 {
 505                         #address-cells = <1>;
 506                         #size-cells = <0>;
 507                         reg = <7>;
 508                         /* SEP 0 */
 509                 };
 510         };
 511 };
 512
 513 &qspi {
 514         status = "okay";
 515         is-dual = <1>;
 516         flash@0 {
 517                 compatible = "m25p80"; /* 32MB */
 518                 #address-cells = <1>;
 519                 #size-cells = <1>;
 520                 reg = <0x0>;
 521                 spi-tx-bus-width = <1>;
 522                 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
 523                 spi-max-frequency = <108000000>; /* Based on DC1 spec */
 524                 partition@qspi-fsbl-uboot { /* for testing purpose */
 525                         label = "qspi-fsbl-uboot";
 526                         reg = <0x0 0x100000>;
 527                 };
 528                 partition@qspi-linux { /* for testing purpose */
 529                         label = "qspi-linux";
 530                         reg = <0x100000 0x500000>;
 531                 };
 532                 partition@qspi-device-tree { /* for testing purpose */
 533                         label = "qspi-device-tree";
 534                         reg = <0x600000 0x20000>;
 535                 };
 536                 partition@qspi-rootfs { /* for testing purpose */
 537                         label = "qspi-rootfs";
 538                         reg = <0x620000 0x5E0000>;
 539                 };
 540         };
 541 };
 542
 543 &rtc {
 544         status = "okay";
 545 };
 546
 547 &sata {
 548         status = "okay";
 549         /* SATA OOB timing settings */
 550         ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
 551         ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
 552         ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 553         ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 554         ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
 555         ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
 556         ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 557         ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 558         phy-names = "sata-phy";
 559         phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
 560 };
 561
 562 /* SD1 with level shifter */
 563 &sdhci1 {
 564         status = "okay";
 565         no-1-8-v;
 566         xlnx,mio_bank = <1>;
 567 };
 568
 569 &serdes {
 570         status = "okay";
 571 };
 572
 573 &uart0 {
 574         status = "okay";
 575 };
 576
 577 &uart1 {
 578         status = "okay";
 579 };
 580
 581 /* ULPI SMSC USB3320 */
 582 &usb0 {
 583         status = "okay";
 584 };
 585
 586 &dwc3_0 {
 587         status = "okay";
 588         dr_mode = "host";
 589         snps,usb3_lpm_capable;
 590         phy-names = "usb3-phy";
 591         phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
 592 };
 593
 594 &watchdog0 {
 595         status = "okay";
 596 };