git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 / {
  11         compatible = "xlnx,zynqmp";
  12         #address-cells = <2>;
  13         #size-cells = <1>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "arm,cortex-a53", "arm,armv8";
  21                         device_type = "cpu";
  22                         enable-method = "psci";
  23                         reg = <0x0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         enable-method = "psci";
  30                         reg = <0x1>;
  31                 };
  32
  33                 cpu@2 {
  34                         compatible = "arm,cortex-a53", "arm,armv8";
  35                         device_type = "cpu";
  36                         enable-method = "psci";
  37                         reg = <0x2>;
  38                 };
  39
  40                 cpu@3 {
  41                         compatible = "arm,cortex-a53", "arm,armv8";
  42                         device_type = "cpu";
  43                         enable-method = "psci";
  44                         reg = <0x3>;
  45                 };
  46         };
  47
  48         pmu {
  49                 compatible = "arm,armv8-pmuv3";
  50                 interrupts = <0 143 4>,
  51                              <0 144 4>,
  52                              <0 145 4>,
  53                              <0 146 4>;
  54         };
  55
  56         psci {
  57                 compatible = "arm,psci-0.2";
  58                 method = "smc";
  59         };
  60
  61         firmware {
  62                 compatible = "xlnx,zynqmp-pm";
  63                 method = "smc";
  64         };
  65
  66         timer {
  67                 compatible = "arm,armv8-timer";
  68                 interrupt-parent = <&gic>;
  69                 interrupts = <1 13 0xf01>,
  70                              <1 14 0xf01>,
  71                              <1 11 0xf01>,
  72                              <1 10 0xf01>;
  73         };
  74
  75         amba_apu: amba_apu {
  76                 compatible = "simple-bus";
  77                 #address-cells = <2>;
  78                 #size-cells = <1>;
  79                 ranges;
  80
  81                 gic: interrupt-controller@f9010000 {
  82                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
  83                         #interrupt-cells = <3>;
  84                         reg = <0x0 0xf9010000 0x10000>,
  85                               <0x0 0xf902f000 0x2000>,
  86                               <0x0 0xf9040000 0x20000>,
  87                               <0x0 0xf906f000 0x2000>;
  88                         interrupt-controller;
  89                         interrupt-parent = <&gic>;
  90                         interrupts = <1 9 0xf04>;
  91                 };
  92         };
  93
  94         amba: amba {
  95                 compatible = "simple-bus";
  96                 #address-cells = <2>;
  97                 #size-cells = <1>;
  98                 ranges;
  99
 100                 can0: can@ff060000 {
 101                         compatible = "xlnx,zynq-can-1.0";
 102                         status = "disabled";
 103                         clock-names = "can_clk", "pclk";
 104                         reg = <0x0 0xff060000 0x1000>;
 105                         interrupts = <0 23 4>;
 106                         interrupt-parent = <&gic>;
 107                         tx-fifo-depth = <0x40>;
 108                         rx-fifo-depth = <0x40>;
 109                 };
 110
 111                 can1: can@ff070000 {
 112                         compatible = "xlnx,zynq-can-1.0";
 113                         status = "disabled";
 114                         clock-names = "can_clk", "pclk";
 115                         reg = <0x0 0xff070000 0x1000>;
 116                         interrupts = <0 24 4>;
 117                         interrupt-parent = <&gic>;
 118                         tx-fifo-depth = <0x40>;
 119                         rx-fifo-depth = <0x40>;
 120                 };
 121
 122                 /* GDMA */
 123                 fpd_dma_chan1: dma@fd500000 {
 124                         status = "disabled";
 125                         compatible = "xlnx,zynqmp-dma-1.0";
 126                         reg = <0x0 0xfd500000 0x1000>;
 127                         interrupt-parent = <&gic>;
 128                         interrupts = <0 124 4>;
 129                         xlnx,id = <0>;
 130                         xlnx,bus-width = <128>;
 131                 };
 132
 133                 fpd_dma_chan2: dma@fd510000 {
 134                         status = "disabled";
 135                         compatible = "xlnx,zynqmp-dma-1.0";
 136                         reg = <0x0 0xfd510000 0x1000>;
 137                         interrupt-parent = <&gic>;
 138                         interrupts = <0 125 4>;
 139                         xlnx,id = <1>;
 140                         xlnx,bus-width = <128>;
 141                 };
 142
 143                 fpd_dma_chan3: dma@fd520000 {
 144                         status = "disabled";
 145                         compatible = "xlnx,zynqmp-dma-1.0";
 146                         reg = <0x0 0xfd520000 0x1000>;
 147                         interrupt-parent = <&gic>;
 148                         interrupts = <0 126 4>;
 149                         xlnx,id = <2>;
 150                         xlnx,bus-width = <128>;
 151                 };
 152
 153                 fpd_dma_chan4: dma@fd530000 {
 154                         status = "disabled";
 155                         compatible = "xlnx,zynqmp-dma-1.0";
 156                         reg = <0x0 0xfd530000 0x1000>;
 157                         interrupt-parent = <&gic>;
 158                         interrupts = <0 127 4>;
 159                         xlnx,id = <3>;
 160                         xlnx,bus-width = <128>;
 161                 };
 162
 163                 fpd_dma_chan5: dma@fd540000 {
 164                         status = "disabled";
 165                         compatible = "xlnx,zynqmp-dma-1.0";
 166                         reg = <0x0 0xfd540000 0x1000>;
 167                         interrupt-parent = <&gic>;
 168                         interrupts = <0 128 4>;
 169                         xlnx,id = <4>;
 170                         xlnx,bus-width = <128>;
 171                 };
 172
 173                 fpd_dma_chan6: dma@fd550000 {
 174                         status = "disabled";
 175                         compatible = "xlnx,zynqmp-dma-1.0";
 176                         reg = <0x0 0xfd550000 0x1000>;
 177                         interrupt-parent = <&gic>;
 178                         interrupts = <0 129 4>;
 179                         xlnx,id = <5>;
 180                         xlnx,bus-width = <128>;
 181                 };
 182
 183                 fpd_dma_chan7: dma@fd560000 {
 184                         status = "disabled";
 185                         compatible = "xlnx,zynqmp-dma-1.0";
 186                         reg = <0x0 0xfd560000 0x1000>;
 187                         interrupt-parent = <&gic>;
 188                         interrupts = <0 130 4>;
 189                         xlnx,id = <6>;
 190                         xlnx,bus-width = <128>;
 191                 };
 192
 193                 fpd_dma_chan8: dma@fd570000 {
 194                         status = "disabled";
 195                         compatible = "xlnx,zynqmp-dma-1.0";
 196                         reg = <0x0 0xfd570000 0x1000>;
 197                         interrupt-parent = <&gic>;
 198                         interrupts = <0 131 4>;
 199                         xlnx,id = <7>;
 200                         xlnx,bus-width = <128>;
 201                 };
 202
 203                 gpu: gpu@fd4b0000 {
 204                         status = "disabled";
 205                         compatible = "arm,mali-400", "arm,mali-utgard";
 206                         reg = <0x0 0xfd4b0000 0x30000>;
 207                         interrupt-parent = <&gic>;
 208                         interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
 209                         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
 210                 };
 211
 212                 /* ADMA */
 213                 lpd_dma_chan1: dma@ffa80000 {
 214                         status = "disabled";
 215                         compatible = "xlnx,zynqmp-dma-1.0";
 216                         reg = <0x0 0xffa80000 0x1000>;
 217                         interrupt-parent = <&gic>;
 218                         interrupts = <0 77 4>;
 219                         xlnx,id = <0>;
 220                         xlnx,bus-width = <64>;
 221                 };
 222
 223                 lpd_dma_chan2: dma@ffa90000 {
 224                         status = "disabled";
 225                         compatible = "xlnx,zynqmp-dma-1.0";
 226                         reg = <0x0 0xffa90000 0x1000>;
 227                         interrupt-parent = <&gic>;
 228                         interrupts = <0 78 4>;
 229                         xlnx,id = <1>;
 230                         xlnx,bus-width = <64>;
 231                 };
 232
 233                 lpd_dma_chan3: dma@ffaa0000 {
 234                         status = "disabled";
 235                         compatible = "xlnx,zynqmp-dma-1.0";
 236                         reg = <0x0 0xffaa0000 0x1000>;
 237                         interrupt-parent = <&gic>;
 238                         interrupts = <0 79 4>;
 239                         xlnx,id = <2>;
 240                         xlnx,bus-width = <64>;
 241                 };
 242
 243                 lpd_dma_chan4: dma@ffab0000 {
 244                         status = "disabled";
 245                         compatible = "xlnx,zynqmp-dma-1.0";
 246                         reg = <0x0 0xffab0000 0x1000>;
 247                         interrupt-parent = <&gic>;
 248                         interrupts = <0 80 4>;
 249                         xlnx,id = <3>;
 250                         xlnx,bus-width = <64>;
 251                 };
 252
 253                 lpd_dma_chan5: dma@ffac0000 {
 254                         status = "disabled";
 255                         compatible = "xlnx,zynqmp-dma-1.0";
 256                         reg = <0x0 0xffac0000 0x1000>;
 257                         interrupt-parent = <&gic>;
 258                         interrupts = <0 81 4>;
 259                         xlnx,id = <4>;
 260                         xlnx,bus-width = <64>;
 261                 };
 262
 263                 lpd_dma_chan6: dma@ffad0000 {
 264                         status = "disabled";
 265                         compatible = "xlnx,zynqmp-dma-1.0";
 266                         reg = <0x0 0xffad0000 0x1000>;
 267                         interrupt-parent = <&gic>;
 268                         interrupts = <0 82 4>;
 269                         xlnx,id = <5>;
 270                         xlnx,bus-width = <64>;
 271                 };
 272
 273                 lpd_dma_chan7: dma@ffae0000 {
 274                         status = "disabled";
 275                         compatible = "xlnx,zynqmp-dma-1.0";
 276                         reg = <0x0 0xffae0000 0x1000>;
 277                         interrupt-parent = <&gic>;
 278                         interrupts = <0 83 4>;
 279                         xlnx,id = <6>;
 280                         xlnx,bus-width = <64>;
 281                 };
 282
 283                 lpd_dma_chan8: dma@ffaf0000 {
 284                         status = "disabled";
 285                         compatible = "xlnx,zynqmp-dma-1.0";
 286                         reg = <0x0 0xffaf0000 0x1000>;
 287                         interrupt-parent = <&gic>;
 288                         interrupts = <0 84 4>;
 289                         xlnx,id = <7>;
 290                         xlnx,bus-width = <64>;
 291                 };
 292
 293                 nand0: nand@ff100000 {
 294                         compatible = "arasan,nfc-v3p10";
 295                         status = "disabled";
 296                         reg = <0x0 0xff100000 0x1000>;
 297                         clock-names = "clk_sys", "clk_flash";
 298                         interrupt-parent = <&gic>;
 299                         interrupts = <0 14 4>;
 300                         #address-cells = <2>;
 301                         #size-cells = <1>;
 302                 };
 303
 304                 gem0: ethernet@ff0b0000 {
 305                         compatible = "cdns,gem";
 306                         status = "disabled";
 307                         interrupt-parent = <&gic>;
 308                         interrupts = <0 57 4>, <0 57 4>;
 309                         reg = <0x0 0xff0b0000 0x1000>;
 310                         clock-names = "pclk", "hclk", "tx_clk";
 311                         #address-cells = <1>;
 312                         #size-cells = <0>;
 313                         #stream-id-cells = <1>;
 314                         jumbo-max-len = <10240>;
 315                         jumbo-supported;
 316                 };
 317
 318                 gem1: ethernet@ff0c0000 {
 319                         compatible = "cdns,gem";
 320                         status = "disabled";
 321                         interrupt-parent = <&gic>;
 322                         interrupts = <0 59 4>, <0 59 4>;
 323                         reg = <0x0 0xff0c0000 0x1000>;
 324                         clock-names = "pclk", "hclk", "tx_clk";
 325                         #address-cells = <1>;
 326                         #size-cells = <0>;
 327                         #stream-id-cells = <1>;
 328                         jumbo-max-len = <10240>;
 329                         jumbo-supported;
 330                 };
 331
 332                 gem2: ethernet@ff0d0000 {
 333                         compatible = "cdns,gem";
 334                         status = "disabled";
 335                         interrupt-parent = <&gic>;
 336                         interrupts = <0 61 4>, <0 61 4>;
 337                         reg = <0x0 0xff0d0000 0x1000>;
 338                         clock-names = "pclk", "hclk", "tx_clk";
 339                         #address-cells = <1>;
 340                         #size-cells = <0>;
 341                         #stream-id-cells = <1>;
 342                         jumbo-max-len = <10240>;
 343                         jumbo-supported;
 344                 };
 345
 346                 gem3: ethernet@ff0e0000 {
 347                         compatible = "cdns,gem";
 348                         status = "disabled";
 349                         interrupt-parent = <&gic>;
 350                         interrupts = <0 63 4>, <0 63 4>;
 351                         reg = <0x0 0xff0e0000 0x1000>;
 352                         clock-names = "pclk", "hclk", "tx_clk";
 353                         #address-cells = <1>;
 354                         #size-cells = <0>;
 355                         #stream-id-cells = <1>;
 356                         jumbo-max-len = <10240>;
 357                         jumbo-supported;
 358                 };
 359
 360                 gpio: gpio@ff0a0000 {
 361                         compatible = "xlnx,zynqmp-gpio-1.0";
 362                         status = "disabled";
 363                         #gpio-cells = <0x2>;
 364                         interrupt-parent = <&gic>;
 365                         interrupts = <0 16 4>;
 366                         reg = <0x0 0xff0a0000 0x1000>;
 367                 };
 368
 369                 i2c0: i2c@ff020000 {
 370                         compatible = "cdns,i2c-r1p10";
 371                         status = "disabled";
 372                         interrupt-parent = <&gic>;
 373                         interrupts = <0 17 4>;
 374                         reg = <0x0 0xff020000 0x1000>;
 375                         #address-cells = <1>;
 376                         #size-cells = <0>;
 377                 };
 378
 379                 i2c1: i2c@ff030000 {
 380                         compatible = "cdns,i2c-r1p10";
 381                         status = "disabled";
 382                         interrupt-parent = <&gic>;
 383                         interrupts = <0 18 4>;
 384                         reg = <0x0 0xff030000 0x1000>;
 385                         #address-cells = <1>;
 386                         #size-cells = <0>;
 387                 };
 388
 389                 pcie: pcie@fd0e0000 {
 390                         compatible = "xlnx,nwl-pcie-2.11";
 391                         status = "disabled";
 392                         #address-cells = <3>;
 393                         #size-cells = <2>;
 394                         #interrupt-cells = <1>;
 395                         device_type = "pci";
 396                         interrupt-parent = <&gic>;
 397                         interrupts = < 0 118 4>,
 398                                      < 0 116 4>,
 399                                      < 0 115 4>,        /* MSI_1 [63...32] */
 400                                      < 0 114 4 >;       /* MSI_0 [31...0] */
 401                         interrupt-names = "misc", "intx", "msi_1", "msi_0";
 402                         reg = <0x0 0xfd0e0000 0x1000>,
 403                               <0x0 0xfd480000 0x1000>,
 404                               <0x0 0xe0000000 0x1000000>;
 405                         reg-names = "breg", "pcireg", "cfg";
 406                         ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
 407                 };
 408
 409                 qspi: spi@ff0f0000 {
 410                         compatible = "xlnx,zynqmp-qspi-1.0";
 411                         status = "disabled";
 412                         clock-names = "ref_clk", "pclk";
 413                         interrupts = <0 15 4>;
 414                         interrupt-parent = <&gic>;
 415                         num-cs = <1>;
 416                         reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
 417                         #address-cells = <1>;
 418                         #size-cells = <0>;
 419                 };
 420
 421                 rtc: rtc@ffa60000 {
 422                         compatible = "xlnx,zynqmp-rtc";
 423                         status = "disabled";
 424                         reg = <0x0 0xffa60000 0x100>;
 425                         interrupt-parent = <&gic>;
 426                         interrupts = <0 26 4>, <0 27 4>;
 427                         interrupt-names = "alarm", "sec";
 428                 };
 429
 430                 sata: ahci@fd0c0000 {
 431                         compatible = "ceva,ahci-1v84";
 432                         status = "disabled";
 433                         reg = <0x0 0xfd0c0000 0x2000>;
 434                         interrupt-parent = <&gic>;
 435                         interrupts = <0 133 4>;
 436                 };
 437
 438                 sdhci0: sdhci@ff160000 {
 439                         compatible = "arasan,sdhci-8.9a";
 440                         status = "disabled";
 441                         interrupt-parent = <&gic>;
 442                         interrupts = <0 48 4>;
 443                         reg = <0x0 0xff160000 0x1000>;
 444                         clock-names = "clk_xin", "clk_ahb";
 445                 };
 446
 447                 sdhci1: sdhci@ff170000 {
 448                         compatible = "arasan,sdhci-8.9a";
 449                         status = "disabled";
 450                         interrupt-parent = <&gic>;
 451                         interrupts = <0 49 4>;
 452                         reg = <0x0 0xff170000 0x1000>;
 453                         clock-names = "clk_xin", "clk_ahb";
 454                 };
 455
 456                 smmu: smmu@fd800000 {
 457                         compatible = "arm,mmu-500";
 458                         reg = <0x0 0xfd800000 0x20000>;
 459                         #global-interrupts = <1>;
 460                         interrupt-parent = <&gic>;
 461                         interrupts = <0 155 4>,
 462                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 463                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 464                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 465                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 466                         mmu-masters = < &gem0 0x874
 467                                         &gem1 0x875
 468                                         &gem2 0x876
 469                                         &gem3 0x877 >;
 470                 };
 471
 472                 spi0: spi@ff040000 {
 473                         compatible = "cdns,spi-r1p6";
 474                         status = "disabled";
 475                         interrupt-parent = <&gic>;
 476                         interrupts = <0 19 4>;
 477                         reg = <0x0 0xff040000 0x1000>;
 478                         clock-names = "ref_clk", "pclk";
 479                         #address-cells = <1>;
 480                         #size-cells = <0>;
 481                 };
 482
 483                 spi1: spi@ff050000 {
 484                         compatible = "cdns,spi-r1p6";
 485                         status = "disabled";
 486                         interrupt-parent = <&gic>;
 487                         interrupts = <0 20 4>;
 488                         reg = <0x0 0xff050000 0x1000>;
 489                         clock-names = "ref_clk", "pclk";
 490                         #address-cells = <1>;
 491                         #size-cells = <0>;
 492                 };
 493
 494                 ttc0: timer@ff110000 {
 495                         compatible = "cdns,ttc";
 496                         status = "disabled";
 497                         interrupt-parent = <&gic>;
 498                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 499                         reg = <0x0 0xff110000 0x1000>;
 500                         timer-width = <32>;
 501                 };
 502
 503                 ttc1: timer@ff120000 {
 504                         compatible = "cdns,ttc";
 505                         status = "disabled";
 506                         interrupt-parent = <&gic>;
 507                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 508                         reg = <0x0 0xff120000 0x1000>;
 509                         timer-width = <32>;
 510                 };
 511
 512                 ttc2: timer@ff130000 {
 513                         compatible = "cdns,ttc";
 514                         status = "disabled";
 515                         interrupt-parent = <&gic>;
 516                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 517                         reg = <0x0 0xff130000 0x1000>;
 518                         timer-width = <32>;
 519                 };
 520
 521                 ttc3: timer@ff140000 {
 522                         compatible = "cdns,ttc";
 523                         status = "disabled";
 524                         interrupt-parent = <&gic>;
 525                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 526                         reg = <0x0 0xff140000 0x1000>;
 527                         timer-width = <32>;
 528                 };
 529
 530                 uart0: serial@ff000000 {
 531                         compatible = "cdns,uart-r1p12";
 532                         status = "disabled";
 533                         interrupt-parent = <&gic>;
 534                         interrupts = <0 21 4>;
 535                         reg = <0x0 0xff000000 0x1000>;
 536                         clock-names = "uart_clk", "pclk";
 537                 };
 538
 539                 uart1: serial@ff010000 {
 540                         compatible = "cdns,uart-r1p12";
 541                         status = "disabled";
 542                         interrupt-parent = <&gic>;
 543                         interrupts = <0 22 4>;
 544                         reg = <0x0 0xff010000 0x1000>;
 545                         clock-names = "uart_clk", "pclk";
 546                 };
 547
 548                 usb0: usb@fe200000 {
 549                         compatible = "snps,dwc3";
 550                         status = "disabled";
 551                         interrupt-parent = <&gic>;
 552                         interrupts = <0 65 4>;
 553                         reg = <0x0 0xfe200000 0x40000>;
 554                         clock-names = "clk_xin", "clk_ahb";
 555                 };
 556
 557                 usb1: usb@fe300000 {
 558                         compatible = "snps,dwc3";
 559                         status = "disabled";
 560                         interrupt-parent = <&gic>;
 561                         interrupts = <0 70 4>;
 562                         reg = <0x0 0xfe300000 0x40000>;
 563                         clock-names = "clk_xin", "clk_ahb";
 564                 };
 565
 566                 watchdog0: watchdog@fd4d0000 {
 567                         compatible = "cdns,wdt-r1p2";
 568                         status = "disabled";
 569                         interrupt-parent = <&gic>;
 570                         interrupts = <0 113 1>;
 571                         reg = <0x0 0xfd4d0000 0x1000>;
 572                         timeout-sec = <10>;
 573                 };
 574
 575                 xilinx_drm: xilinx_drm {
 576                         compatible = "xlnx,drm";
 577                         status = "disabled";
 578                         xlnx,encoder-slave = <&xlnx_dp>;
 579                         xlnx,connector-type = "DisplayPort";
 580                         xlnx,dp-sub = <&xlnx_dp_sub>;
 581                         planes {
 582                                 xlnx,pixel-format = "rgb565";
 583                                 plane0 {
 584                                         dmas = <&xlnx_dpdma 3>;
 585                                         dma-names = "dma";
 586                                 };
 587                                 plane1 {
 588                                         dmas = <&xlnx_dpdma 0>;
 589                                         dma-names = "dma";
 590                                 };
 591                         };
 592                 };
 593
 594                 xlnx_dp: dp@43c00000 {
 595                         compatible = "xlnx,v-dp";
 596                         status = "disabled";
 597                         reg = <0x0 0xfd4a0000 0x1000>;
 598                         interrupts = <0 119 4>;
 599                         interrupt-parent = <&gic>;
 600                         clock-names = "aclk", "aud_clk";
 601                         xlnx,dp-version = "v1.2";
 602                         xlnx,max-lanes = <2>;
 603                         xlnx,max-link-rate = <540000>;
 604                         xlnx,max-bpc = <16>;
 605                         xlnx,enable-ycrcb;
 606                         xlnx,colormetry = "rgb";
 607                         xlnx,bpc = <8>;
 608                         xlnx,audio-chan = <2>;
 609                         xlnx,dp-sub = <&xlnx_dp_sub>;
 610                 };
 611
 612                 xlnx_dp_snd_card: dp_snd_card {
 613                         compatible = "xlnx,dp-snd-card";
 614                         status = "disabled";
 615                         xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
 616                         xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
 617                 };
 618
 619                 xlnx_dp_snd_codec0: dp_snd_codec0 {
 620                         compatible = "xlnx,dp-snd-codec";
 621                         status = "disabled";
 622                         clock-names = "aud_clk";
 623                 };
 624
 625                 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
 626                         compatible = "xlnx,dp-snd-pcm";
 627                         status = "disabled";
 628                         dmas = <&xlnx_dpdma 4>;
 629                         dma-names = "tx";
 630                 };
 631
 632                 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
 633                         compatible = "xlnx,dp-snd-pcm";
 634                         status = "disabled";
 635                         dmas = <&xlnx_dpdma 5>;
 636                         dma-names = "tx";
 637                 };
 638
 639                 xlnx_dp_sub: dp_sub@43c0a000 {
 640                         compatible = "xlnx,dp-sub";
 641                         status = "disabled";
 642                         reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>;
 643                         reg-names = "blend", "av_buf", "aud";
 644                         xlnx,output-fmt = "rgb";
 645                 };
 646
 647                 xlnx_dpdma: dma@fd4c0000 {
 648                         compatible = "xlnx,dpdma";
 649                         status = "disabled";
 650                         reg = <0x0 0xfd4c0000 0x1000>;
 651                         interrupts = <0 122 4>;
 652                         interrupt-parent = <&gic>;
 653                         clock-names = "axi_clk";
 654                         dma-channels = <6>;
 655                         #dma-cells = <1>;
 656                         dma-video0channel@43c10000 {
 657                                 compatible = "xlnx,video0";
 658                         };
 659                         dma-video1channel@43c10000 {
 660                                 compatible = "xlnx,video1";
 661                         };
 662                         dma-video2channel@43c10000 {
 663                                 compatible = "xlnx,video2";
 664                         };
 665                         dma-graphicschannel@43c10000 {
 666                                 compatible = "xlnx,graphics";
 667                         };
 668                         dma-audio0channel@43c10000 {
 669                                 compatible = "xlnx,audio0";
 670                         };
 671                         dma-audio1channel@43c10000 {
 672                                 compatible = "xlnx,audio1";
 673                         };
 674                 };
 675         };
 676 };